公开(公告)号：US06770547B1

公开(公告)日：2004-08-03

申请号：US09698186

申请日：2000-10-30

申请人： Kosuke Inoue ,  Hiroyuki Tenmei ,  Yoshihide Yamaguchi ,  Noriyuki Oroku ,  Hiroshi Hozoji ,  Shigeharu Tsunoda ,  Madoka Minagawa ,  Naoya Kanda ,  Ichiro Anjo ,  Asao Nishimura ,  Akira Yajima ,  Kenji Ujiie

发明人： Kosuke Inoue ,  Hiroyuki Tenmei ,  Yoshihide Yamaguchi ,  Noriyuki Oroku ,  Hiroshi Hozoji ,  Shigeharu Tsunoda ,  Madoka Minagawa ,  Naoya Kanda ,  Ichiro Anjo ,  Asao Nishimura ,  Akira Yajima ,  Kenji Ujiie

IPC分类号： H01L2120

CPC分类号： H01L23/3157 ,  H01L21/563 ,  H01L23/293 ,  H01L23/295 ,  H01L23/3114 ,  H01L2224/02377 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/06102 ,  H01L2224/1403 ,  H01L2224/14515 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/01033 ,  H01L2924/01034

摘要： A semiconductor apparatus in which flip chip bonding is enabled without any underfill, and which comprises a semiconductor device, an electrically insulating layer formed on the semiconductor device by mask-printing an electrically insulating material containing particles, and an external connection terminal formed on the electrically insulating layer and electrically connected with an electrode of the semiconductor device.

摘要翻译： 一种半导体装置，其中可以在没有任何底部填充的情况下进行倒装芯片接合，并且其包括半导体器件，通过掩模印刷含有颗粒的电绝缘材料在半导体器件上形成的电绝缘层，以及形成在电学上的外部连接端子 绝缘层并与半导体器件的电极电连接。

公开(公告)号：US07057283B2

公开(公告)日：2006-06-06

申请号：US10825436

申请日：2004-04-16

申请人： Kosuke Inoue ,  Hiroyuki Tenmei ,  Yoshihide Yamaguchi ,  Noriyuki Oroku ,  Hiroshi Hozoji ,  Shigeharu Tsunoda ,  Madoka Minagawa ,  Naoya Kanda ,  Ichiro Anjo ,  Asao Nishimura ,  Akira Yajima ,  Kenji Ujiie

发明人： Kosuke Inoue ,  Hiroyuki Tenmei ,  Yoshihide Yamaguchi ,  Noriyuki Oroku ,  Hiroshi Hozoji ,  Shigeharu Tsunoda ,  Madoka Minagawa ,  Naoya Kanda ,  Ichiro Anjo ,  Asao Nishimura ,  Akira Yajima ,  Kenji Ujiie

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L23/3157 ,  H01L21/563 ,  H01L23/293 ,  H01L23/295 ,  H01L23/3114 ,  H01L2224/02377 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/06102 ,  H01L2224/1403 ,  H01L2224/14515 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/01033 ,  H01L2924/01034

摘要： A semiconductor apparatus in which flip chip bonding is enabled without any underfill, and which comprises a semiconductor device, an electrically insulating layer formed on the semiconductor device by mask-printing an electrically insulating material containing particles, and an external connection terminal formed on the electrically insulating layer and electrically connected with an electrode of the semiconductor device. The electrically insulating layer is formed with a thickness so as to provide α-ray shielding of the semiconductor device.

摘要翻译： 一种半导体装置，其中可以在没有任何底部填充的情况下进行倒装芯片接合，并且其包括半导体器件，通过掩模印刷含有颗粒的电绝缘材料在半导体器件上形成的电绝缘层，以及形成在电学上的外部连接端子 绝缘层并与半导体器件的电极电连接。 电绝缘层形成为具有提供半导体器件的α射线屏蔽的厚度。

公开(公告)号：US06822317B1

公开(公告)日：2004-11-23

申请号：US09698168

申请日：2000-10-30

申请人： Kosuke Inoue ,  Hiroyuki Tenmei ,  Yoshihide Yamaguchi ,  Noriyuki Oroku ,  Hiroshi Hozoji ,  Shigeharu Tsunoda ,  Madoka Minagawa ,  Naoya Kanda ,  Ichiro Anjo ,  Asao Nishimura ,  Akira Yajima ,  Kenji Ujiie

发明人： Kosuke Inoue ,  Hiroyuki Tenmei ,  Yoshihide Yamaguchi ,  Noriyuki Oroku ,  Hiroshi Hozoji ,  Shigeharu Tsunoda ,  Madoka Minagawa ,  Naoya Kanda ,  Ichiro Anjo ,  Asao Nishimura ,  Akira Yajima ,  Kenji Ujiie

IPC分类号： H01L23495

CPC分类号： H01L23/3114 ,  H01L21/563 ,  H01L23/293 ,  H01L23/295 ,  H01L23/3157 ,  H01L2224/05001 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05569 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01034

摘要： A semiconductor apparatus comprising a semiconductor device, an electrically insulating layer formed on the semiconductor device, and an external connection terminal formed on the electrically insulating layer and electrically connected to an electrode of the semiconductor device, wherein a power/ground line and a signal line in a region of from an edge of the electrically insulating layer to a uniform-thickness flat portion of the electrically insulating layer are different in kind of wiring pattern from each other.

摘要翻译： 一种半导体器件，包括半导体器件，形成在半导体器件上的电绝缘层和形成在电绝缘层上并与半导体器件的电极电连接的外部连接端子，其中电源/接地线和信号线 在从电绝缘层的边缘到电绝缘层的均匀厚度平坦部分的区域中，布线图案的种类不同。

公开(公告)号：US06930388B2

公开(公告)日：2005-08-16

申请号：US09811401

申请日：2001-03-20

申请人： Yoshihide Yamaguchi ,  Hiroyuki Tenmei ,  Kosuke Inoue ,  Noriyuki Oroku ,  Hiroshi Hozoji ,  Shigeharu Tsunoda ,  Naoya Kanda ,  Madoka Minagawa ,  Ichiro Anjo ,  Asao Nishimura ,  Kenji Ujiie ,  Akira Yajima

发明人： Yoshihide Yamaguchi ,  Hiroyuki Tenmei ,  Kosuke Inoue ,  Noriyuki Oroku ,  Hiroshi Hozoji ,  Shigeharu Tsunoda ,  Naoya Kanda ,  Madoka Minagawa ,  Ichiro Anjo ,  Asao Nishimura ,  Kenji Ujiie ,  Akira Yajima

IPC分类号： H01L23/29 ,  H01L21/56 ,  H01L21/60 ,  H01L23/12 ,  H01L23/31 ,  H01L23/485 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/12 ,  H01L23/3114 ,  H01L23/3171 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05171 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2924/00011 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/01034 ,  H01L2924/00014

摘要： A semiconductor device is provided which enables a flip chip connection without use of underfill. The semiconductor device includes a semiconductor element having circuit electrodes and a circuit surface coated with a protecting film. A stress relaxation layer is provided by coating a cured thermoplastic resin onto the protecting film of the circuit surface in a manner which leaves the circuit electrodes exposed and curing it and having an inclination in the edge portion thereof. A wiring layer with wirings is connected to each of the circuit electrodes and disposed so as to make an electrical connection from the circuit electrodes, via the edge portion of the stress relaxation layer, and to a desired portion on the surface of the stress relaxation layer. A protecting film is provided thereon, and an external connection terminal is also provided.

摘要翻译： 提供一种半导体器件，其能够在不使用底部填充物的情况下实现倒装芯片连接。 半导体器件包括具有电路电极的半导体元件和涂有保护膜的电路表面。 通过将固化的热塑性树脂以使电路电极暴露并固化并且在其边缘部分具有倾斜的方式将固化的热塑性树脂涂覆到电路表面的保护膜上来提供应力松弛层。 具有布线的布线层连接到每个电路电极，并布置成经由应力松弛层的边缘部分和电路电极的电连接到应力松弛层的表面上的期望部分 。 在其上设置有保护膜，并且还设置有外部连接端子。

公开(公告)号：US06624504B1

公开(公告)日：2003-09-23

申请号：US09698185

申请日：2000-10-30

申请人： Kosuke Inoue ,  Hiroyuki Tenmei ,  Yoshihide Yamaguchi ,  Noriyuki Oroku ,  Hiroshi Hozoji ,  Shigeharu Tsunoda ,  Madoka Minagawa ,  Naoya Kanda ,  Ichiro Anjo ,  Asao Nishimura ,  Akira Yajima ,  Kenji Ujiie

发明人： Kosuke Inoue ,  Hiroyuki Tenmei ,  Yoshihide Yamaguchi ,  Noriyuki Oroku ,  Hiroshi Hozoji ,  Shigeharu Tsunoda ,  Madoka Minagawa ,  Naoya Kanda ,  Ichiro Anjo ,  Asao Nishimura ,  Akira Yajima ,  Kenji Ujiie

IPC分类号： H01L23495

CPC分类号： H01L23/293 ,  H01L21/563 ,  H01L23/295 ,  H01L23/3114 ,  H01L23/3157 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/01033 ,  H01L2924/01034

摘要： A semiconductor apparatus includes a semiconductor device having circuit electrodes aligned centrally of the semiconductor apparatus. A first electrically insulating layer is formed on said semiconductor device with said circuit electrodes being exposed from said first insulating layer. A second electrically insulating layer is formed on said first insulating layer, and external connection terminals are formed on said second insulating layer. A wiring is formed on said second insulating layer to electrically connect said external connect terminals to said circuit electrodes of said semiconductor device, and a third electrically insulating layer is formed on said second insulating layer and on said wiring. Particles are provided in the second insulating layer to control a shape of said second insulating layer.

摘要翻译： 半导体装置包括具有对准半导体装置中心的电路电极的半导体装置。 在所述半导体器件上形成第一电绝缘层，所述电路电极从所述第一绝缘层露出。 在所述第一绝缘层上形成第二电绝缘层，在所述第二绝缘层上形成外部连接端子。 在所述第二绝缘层上形成布线，以将所述外部连接端子电连接到所述半导体器件的所述电路电极，并且在所述第二绝缘层和所述布线上形成第三电绝缘层。 在第二绝缘层中提供颗粒以控制所述第二绝缘层的形状。

公开(公告)号：US20050245061A1

公开(公告)日：2005-11-03

申请号：US11168460

申请日：2005-06-29

申请人： Toshiya Satoh ,  Masahiko Ogino ,  Tadanori Segawa ,  Yoshihide Yamaguchi ,  Hiroyuki Tenmei ,  Atsushi Kazama ,  Ichiro Anjo ,  Asao Nishimura

发明人： Toshiya Satoh ,  Masahiko Ogino ,  Tadanori Segawa ,  Yoshihide Yamaguchi ,  Hiroyuki Tenmei ,  Atsushi Kazama ,  Ichiro Anjo ,  Asao Nishimura

IPC分类号： H01L23/29 ,  H01L21/301 ,  H01L21/3205 ,  H01L21/56 ,  H01L21/60 ,  H01L21/768 ,  H01L23/31 ,  H01L23/485 ,  H01L23/52 ,  H01L23/522 ,  H01L21/50

CPC分类号： H01L24/11 ,  H01L23/3192 ,  H01L24/13 ,  H01L2224/02125 ,  H01L2224/0231 ,  H01L2224/0236 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05171 ,  H01L2224/05548 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014

摘要： The present invention is a semiconductor device having the semiconductor element obtained by cutting a semiconductor wafer with the electrode pad formed on one side along a scribe line, a semiconductor element protective layer on the semiconductor element which has a opening on the pad, a stress cushioning layer on the layer which has the opening on the pad, a lead wire portion reaching the layer from the electrode pad via the openings, external electrodes on the lead wire portion, and the conductor protective layer on the layers, the layer and the conductor protective layer forming the respective end faces on the end surface of the semiconductor element inside the scribe line and exposing the range from the end face of the end surface to the inside of the scribe line.

摘要翻译： 本发明是一种具有半导体元件的半导体器件，该半导体器件通过沿着划线在一侧形成电极焊盘切割半导体晶片而获得，半导体元件保护层在半导体元件上具有在该焊盘上的开口，应力缓冲 在该焊盘上具有开口的层上的引线部分，经由开口从电极焊盘到达层的引线部分，引线部分上的外部电极和层上的导体保护层，层和导体保护层 层，形成在划线内的半导体元件的端面上的各个端面，并露出从端面的端面到划线的内侧的范围。

公开(公告)号：US07378333B2

公开(公告)日：2008-05-27

申请号：US11168460

申请日：2005-06-29

申请人： Toshiya Satoh ,  Masahiko Ogino ,  Tadanori Segawa ,  Yoshihide Yamaguchi ,  Hiroyuki Tenmei ,  Atsushi Kazama ,  Ichiro Anjo ,  Asao Nishimura

发明人： Toshiya Satoh ,  Masahiko Ogino ,  Tadanori Segawa ,  Yoshihide Yamaguchi ,  Hiroyuki Tenmei ,  Atsushi Kazama ,  Ichiro Anjo ,  Asao Nishimura

IPC分类号： H01L21/301

CPC分类号： H01L24/11 ,  H01L23/3192 ,  H01L24/13 ,  H01L2224/02125 ,  H01L2224/0231 ,  H01L2224/0236 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05171 ,  H01L2224/05548 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014

摘要： The present invention is a semiconductor device having the semiconductor element obtained by cutting a semiconductor wafer with the electrode pad formed on one side along a scribe line, a semiconductor element protective layer on the semiconductor element which has a opening on the pad, a stress cushioning layer on the layer which has the opening on the pad, a lead wire portion reaching the layer from the electrode pad via the openings, external electrodes on the lead wire portion, and the conductor protective layer on the layers, the layer and the conductor protective layer forming the respective end faces on the end surface of the semiconductor element inside the scribe line and exposing the range from the end face of the end surface to the inside of the scribe line.

摘要翻译： 本发明是一种具有半导体元件的半导体器件，该半导体器件通过沿着划线在一侧形成电极焊盘切割半导体晶片而获得，半导体元件保护层在半导体元件上具有在该焊盘上的开口，应力缓冲 在该焊盘上具有开口的层上的引线部分，经由开口从电极焊盘到达层的引线部分，引线部分上的外部电极和层上的导体保护层，层和导体保护层 层，形成在划线内的半导体元件的端面上的各个端面，并露出从端面的端面到划线的内侧的范围。

公开(公告)号：US06946723B2

公开(公告)日：2005-09-20

申请号：US09809181

申请日：2001-03-16

申请人： Toshiya Satoh ,  Masahiko Ogino ,  Tadanori Segawa ,  Yoshihide Yamaguchi ,  Hiroyuki Tenmei ,  Atsushi Kazama ,  Ichiro Anjo ,  Asao Nishimura

发明人： Toshiya Satoh ,  Masahiko Ogino ,  Tadanori Segawa ,  Yoshihide Yamaguchi ,  Hiroyuki Tenmei ,  Atsushi Kazama ,  Ichiro Anjo ,  Asao Nishimura

IPC分类号： H01L23/29 ,  H01L21/301 ,  H01L21/3205 ,  H01L21/56 ,  H01L21/60 ,  H01L21/768 ,  H01L23/31 ,  H01L23/485 ,  H01L23/52 ,  H01L23/522 ,  H01L23/495

CPC分类号： H01L24/11 ,  H01L23/3192 ,  H01L24/13 ,  H01L2224/02125 ,  H01L2224/0231 ,  H01L2224/0236 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05171 ,  H01L2224/05548 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor device having a semiconductor element is obtained by cutting a semiconductor wafer, having an electrode pad formed on one side thereof, along a scribe line. The semiconductor device has a semiconductor element protective layer on the semiconductor element so as to form an opening above the pad, a stress cushioning layer on the layer so as to form an opening on the pad, a lead wire portion reaching the layer from the electrode pad via the openings, external electrodes on the lead wire portion, and a conductor protective layer on the layer. The layer, the layer, and the conductor protective layer form respective end faces on the end surface of the semiconductor element inside the scribe line and expose a surface of the semiconductor element from the end face of the end surface to a point inside of the scribe line, thereby to expose the scribe line.

摘要翻译： 具有半导体元件的半导体器件通过沿着划线切割具有在其一侧形成的电极焊盘的半导体晶片来获得。 半导体器件在半导体元件上具有半导体元件保护层，以便在焊盘上形成开口，该层上的应力缓冲层在焊盘上形成开口，从电极到达该层的引线部分 通过开口焊盘，引线部分上的外部电极以及该层上的导体保护层。 层，层和导体保护层在划线内部的半导体元件的端面上形成相应的端面，并将半导体元件的表面从端表面的端面暴露于刻痕内侧 线，从而暴露划线。

公开(公告)号：US06531760B1

公开(公告)日：2003-03-11

申请号：US09558105

申请日：2000-04-25

申请人： Gen Murakami ,  Kunihiro Tsubosaki ,  Masahiro Ichitani ,  Kunihiko Nishi ,  Ichiro Anjo ,  Asao Nishimura ,  Makoto Kitano ,  Akihiro Yaguchi ,  Sueo Kawai ,  Masatsugu Ogata ,  Syuuji Eguchi ,  Hiroyoshi Kokaku ,  Masanori Segawa ,  Hiroshi Hozoji ,  Takashi Yokoyama ,  Noriyuki Kinjo ,  Aizo Kaneda ,  Junichi Saeki ,  Shozo Nakamura ,  Akio Hasebe ,  Hiroshi Kikuchi ,  Isamu Yoshida ,  Takashi Yamazaki ,  Kazuyoshi Oshima ,  Tetsuro Matsumoto

发明人： Gen Murakami ,  Kunihiro Tsubosaki ,  Masahiro Ichitani ,  Kunihiko Nishi ,  Ichiro Anjo ,  Asao Nishimura ,  Makoto Kitano ,  Akihiro Yaguchi ,  Sueo Kawai ,  Masatsugu Ogata ,  Syuuji Eguchi ,  Hiroyoshi Kokaku ,  Masanori Segawa ,  Hiroshi Hozoji ,  Takashi Yokoyama ,  Noriyuki Kinjo ,  Aizo Kaneda ,  Junichi Saeki ,  Shozo Nakamura ,  Akio Hasebe ,  Hiroshi Kikuchi ,  Isamu Yoshida ,  Takashi Yamazaki ,  Kazuyoshi Oshima ,  Tetsuro Matsumoto

IPC分类号： H01L23495

CPC分类号： H01L23/3107 ,  H01L23/4951 ,  H01L23/49555 ,  H01L23/49558 ,  H01L23/49568 ,  H01L23/49586 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/105 ,  H01L29/0657 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/16245 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/85205 ,  H01L2224/8592 ,  H01L2224/92147 ,  H01L2225/1005 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01039 ,  H01L2924/01043 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01092 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K1/144 ,  H05K1/181 ,  H05K3/3421 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/3512 ,  H01L2924/0695 ,  H01L2224/85399

摘要： As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the “Lead-On-Chip” or “Chip-On-Lead” structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

公开(公告)号：US06919622B2

公开(公告)日：2005-07-19

申请号：US10774405

申请日：2004-02-10

申请人： Gen Murakami ,  Kunihiro Tsubosaki ,  Masahiro Ichitani ,  Kunihiko Nishi ,  Ichiro Anjo ,  Asao Nishimura ,  Makoto Kitano ,  Akihiro Yaguchi ,  Sueo Kawai ,  Masatsugu Ogata ,  Syuuji Eguchi ,  Hiroyoshi Kokaku ,  Masanori Segawa ,  Hiroshi Hozoji ,  Takashi Yokoyama ,  Noriyuki Kinjo ,  Aizo Kaneda ,  Junichi Saeki ,  Shozo Nakamura ,  Akio Hasebe ,  Hiroshi Kikuchi ,  Isamu Yoshida ,  Takashi Yamazaki ,  Kazuyoshi Oshima ,  Tetsuro Matsumoto

发明人： Gen Murakami ,  Kunihiro Tsubosaki ,  Masahiro Ichitani ,  Kunihiko Nishi ,  Ichiro Anjo ,  Asao Nishimura ,  Makoto Kitano ,  Akihiro Yaguchi ,  Sueo Kawai ,  Masatsugu Ogata ,  Syuuji Eguchi ,  Hiroyoshi Kokaku ,  Masanori Segawa ,  Hiroshi Hozoji ,  Takashi Yokoyama ,  Noriyuki Kinjo ,  Aizo Kaneda ,  Junichi Saeki ,  Shozo Nakamura ,  Akio Hasebe ,  Hiroshi Kikuchi ,  Isamu Yoshida ,  Takashi Yamazaki ,  Kazuyoshi Oshima ,  Tetsuro Matsumoto

IPC分类号： H01L21/52 ,  H01L23/31 ,  H01L23/495 ,  H01L23/50 ,  H01L25/10 ,  H01L29/06 ,  H05K1/14 ,  H05K1/18 ,  H05K3/34

CPC分类号： H01L23/3107 ,  H01L23/4951 ,  H01L23/49555 ,  H01L23/49558 ,  H01L23/49568 ,  H01L23/49586 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/105 ,  H01L29/0657 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/16245 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/85205 ,  H01L2224/8592 ,  H01L2224/92147 ,  H01L2225/1005 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01039 ,  H01L2924/01043 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01092 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K1/144 ,  H05K1/181 ,  H05K3/3421 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/3512 ,  H01L2924/0695 ,  H01L2224/85399

摘要： As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the “Lead-On-Chip” or “Chip-On-Lead” structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

摘要翻译： 由于半导体芯片尺寸大，高集成度和加速度，所以难以将半导体芯片与包装中的引线组合在一起。 鉴于这种困难，已经采用称为半导体和引线堆叠和封装的称为“片上引线”或“引线芯片”结构的封装结构。 在该结构的封装中，根据本发明，内引线和半导体芯片的前端部之间的间隙比除引导端部和半导体芯片之外的内引线部分之间的间隙宽，从而减小 杂散容量，提高信号传输速率和减少电气噪声。