公开(公告)号：US20070114672A1

公开(公告)日：2007-05-24

申请号：US11583850

申请日：2006-10-20

申请人： Tomoko Higashino ,  Hirotaka Nishizawa ,  Tamaki Wada ,  Chuichi Miyazaki

发明人： Tomoko Higashino ,  Hirotaka Nishizawa ,  Tamaki Wada ,  Chuichi Miyazaki

IPC分类号： H01L23/52

CPC分类号： H01L25/0657 ,  H01L24/27 ,  H01L24/45 ,  H01L24/73 ,  H01L24/75 ,  H01L24/83 ,  H01L24/97 ,  H01L25/50 ,  H01L2221/68336 ,  H01L2224/05554 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/838 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512

摘要： The miniaturization of the system in package which laminates a plurality of semiconductor chips on a wiring substrate via a die attach film is promoted. In the system in package (SiP) which laminates memory chips and microcomputer chip via die attach film on wiring substrate, by forming metal plate in the chip mounting region of wiring substrate, and mounting memory chip of an undermost layer on this metal plate, the flatness of the chip mounting region of wiring substrate is secured, and die attach film which intervenes between metal plate and memory chip of an undermost layer is made the same quality as die attach film which intervenes between chips (between memory chips and between memory chip and microcomputer chips), and the same thickness.

摘要翻译： 促进了通过管芯附着膜在布线基板上层叠多个半导体芯片的封装体系的小型化。 在通过在布线基板上通过芯片安装膜层叠存储芯片和微型计算机芯片的系统（SiP）中，通过在布线基板的芯片安装区域中形成金属板，并在该金属板上安装最底层的存储芯片， 确保布线基板的芯片安装区域的平坦度，并且插入介于金属板和最下层的存储芯片之间的管芯附着膜与插入芯片之间的芯片附近的芯片（存储芯片之间以及存储芯片与 微型计算机芯片），厚度相同。

公开(公告)号：US20050094433A1

公开(公告)日：2005-05-05

申请号：US11002247

申请日：2004-12-03

申请人： Masachika Masuda ,  Tamaki Wada ,  Michiaki Sugiyama ,  Hirotaka Nishizawa ,  Toshio Sugano ,  Yasushi Takahashi ,  Masayasu Kawamura

发明人： Masachika Masuda ,  Tamaki Wada ,  Michiaki Sugiyama ,  Hirotaka Nishizawa ,  Toshio Sugano ,  Yasushi Takahashi ,  Masayasu Kawamura

IPC分类号： H01L25/18 ,  H01L23/495 ,  H01L25/065 ,  H01L25/07 ,  G11C11/00

CPC分类号： H01L24/06 ,  H01L23/4951 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/4826 ,  H01L2224/48599 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01055 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/3011 ,  Y10T29/49121 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399

摘要： A semiconductor device comprising a resin mold, two semiconductor chips positioned inside the resin mold and having front and back surfaces and external terminals formed on the front surfaces, and leads extending from the inside to the outside of the resin mold, wherein each of said leads is branched into two branch leads in at least the resin mold, the one branch lead is secured to the surface of the one semiconductor chip and is electrically connected to an external terminal on the surface thereof through a wire, the other branch lead is secured to the surface of the other semiconductor chip and is electrically connected to an external terminal on the surface thereof through a wire, and the two semiconductor chips are stacked one upon the other, with their back surfaces opposed to each other.

摘要翻译： 一种半导体器件，包括树脂模具，位于树脂模具内部的两个半导体芯片，具有形成在前表面上的前后表面和外部端子以及从树脂模具的内部延伸到外部的引线，其中每个所述引线 至少在树脂模具中分支成两个分支引线，一个分支引线固定到一个半导体芯片的表面，并通过导线与表面上的外部端子电连接，另一个分支引线被固定到 另一个半导体芯片的表面，并通过导线与表面上的外部端子电连接，并且两个半导体芯片彼此堆叠，并且它们的背面彼此相对。

公开(公告)号：US06853089B2

公开(公告)日：2005-02-08

申请号：US10225163

申请日：2002-08-22

申请人： Mikako Ujiie ,  Michiaki Sugiyama ,  Kazunari Suzuki ,  Masachika Masuda ,  Tamaki Wada

发明人： Mikako Ujiie ,  Michiaki Sugiyama ,  Kazunari Suzuki ,  Masachika Masuda ,  Tamaki Wada

IPC分类号： H01L23/12 ,  H01L21/56 ,  H01L21/58 ,  H01L21/60 ,  H01L23/28 ,  H01L23/498 ,  H01L23/48 ,  H01L21/44

CPC分类号： H01L21/561 ,  H01L21/56 ,  H01L23/49838 ,  H01L24/06 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/743 ,  H01L24/83 ,  H01L24/97 ,  H01L2221/68331 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/29011 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48599 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/743 ,  H01L2224/83051 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/83385 ,  H01L2224/8385 ,  H01L2224/85399 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/10161 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512

摘要： In the manufacture of a semiconductor device by adopting a block molding method wherein a semiconductor chip is fixed onto a wiring substrate through an adhesive, the occurrence of a defect caused by flowing-out of the adhesive is to be prevented. The semiconductor device according to the present invention comprises a wiring substrate, the wiring substrate having a main surface, an insulating film formed on the main surface, and electrodes formed on the main surface so as to be exposed from the insulating film, a semiconductor chip fixed through an adhesive onto the insulating film formed on the main surface of the wiring substrate, conductive wires for connecting the electrodes on the main surface of the wiring substrate and electrodes on the semiconductor chip with each other, and a seal member, i.e., a package, which covers the semiconductor chip, the main surface of the wiring substrate and the electrodes, wherein a groove is formed between the semiconductor chip and the electrodes and the seal member and the wiring substrate have side faces cut by dicing. A protruding portion of the adhesive (an insulating resin) stays within the groove without getting over the groove and does not reach the electrodes. The groove is formed by removing the insulating film partially in the full depth direction of the film so as to extend through the film.

摘要翻译： 在半导体器件的制造中，通过采用通过粘合剂将半导体芯片固定在布线基板上的嵌段成型方法，可以防止由粘合剂流出而引起的缺陷的发生。 根据本发明的半导体器件包括布线基板，具有主表面的布线基板，形成在主表面上的绝缘膜，以及形成在主表面上以从绝缘膜露出的电极，半导体芯片 通过粘合剂固定在形成在布线基板的主表面上的绝缘膜上，用于将布线基板的主表面上的电极和半导体芯片上的电极彼此连接的导线，以及密封件 封装，其覆盖半导体芯片，布线基板的主表面和电极，其中在半导体芯片和电极之间形成凹槽，并且密封构件和布线基板具有通过切割切割的侧面。 粘合剂（绝缘树脂）的突出部分保持在槽内而不越过槽并且不会到达电极。 通过在膜的整个深度方向上部分地去除绝缘膜以便延伸穿过膜而形成凹槽。

公开(公告)号：US06576994B2

公开(公告)日：2003-06-10

申请号：US10115986

申请日：2002-04-05

申请人： Akihiko Iwaya ,  Tamaki Wada ,  Masachika Masuda

发明人： Akihiko Iwaya ,  Tamaki Wada ,  Masachika Masuda

IPC分类号： H01L2348

CPC分类号： H01L24/06 ,  H01L21/565 ,  H01L23/4951 ,  H01L23/49551 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48599 ,  H01L2224/48647 ,  H01L2224/4866 ,  H01L2224/48699 ,  H01L2224/48747 ,  H01L2224/4876 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85447 ,  H01L2224/8546 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01055 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A LOC type semiconductor device comprises a semiconductor chip having a main surface in which semiconductor elements and a plurality of bonding pads are formed, and a back surface opposite the main surface; a plurality of leads each having an inner part and an outer part, and including a plurality of first leads having inner end portions extended on the main surface of the semiconductor chip and a plurality of second leads having inner end portions terminating near the semiconductor chip; bonding wires electrically connecting the bonding pads to bonding portions of the inner parts of the first and the second leads; and a sealing member sealing the semiconductor chip therein. A first bending portion is formed in the inner part of each second lead to prevent the sealing member from transformation by forming the sealing member in satisfactory resin balance between an upper portion and a lower portion of the sealing member.

公开(公告)号：US06297545B1

公开(公告)日：2001-10-02

申请号：US09563756

申请日：2000-05-01

申请人： Michiaki Sugiyama ,  Tamaki Wada ,  Masachika Masuda

发明人： Michiaki Sugiyama ,  Tamaki Wada ,  Masachika Masuda

IPC分类号： H01L23495

CPC分类号： H01L24/06 ,  H01L23/4951 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/06136 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/48824 ,  H01L2224/4899 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2224/451 ,  H01L2924/00 ,  H01L2924/00012

摘要： In a package of an LOC (Lead On Chip) structure in which inner lead portions are partially arranged over a major face of a semiconductor chip, there is disclosed a technique for thinning the package and speeding up signal transmission. Specifically, by partially reducing the thicknesses of the signal inner leads arranged over the major face of the semiconductor chip, the thickness of a sealing resin is reduced while ensuring the mechanical strength of the package. Moreover, the signal inner leads arranged over the major face of the semiconductor chip are arranged at predetermined spacings from the major face of the semiconductor chip. The power supplying inner leads are bonded to the major face of the semiconductor chip, thus providing a package having a reduced parasitic capacitance.

摘要翻译： 在其中内部引线部分布置在半导体芯片的主面上的LOC（片上芯片）结构的封装中，公开了一种用于使封装变薄和加速信号传输的技术。具体地，通过部分地减少 布置在半导体芯片的主面上的信号内部引线的厚度，密封树脂的厚度减小，同时确保封装的机械强度。此外，布置在半导体芯片的主表面上方的信号内部引线被布置 在距半导体芯片的主面的预定间隔处。 供电内引线被连接到半导体芯片的主面，从而提供具有减小的寄生电容的封装。

公开(公告)号：US06169325A

公开(公告)日：2001-01-02

申请号：US09210883

申请日：1998-12-15

申请人： Shuichiro Azuma ,  Takayuki Okinaga ,  Takashi Emata ,  Tomoaki Kudaishi ,  Tamaki Wada ,  Kunihiko Nishi ,  Masachika Masuda ,  Toshio Sugano

发明人： Shuichiro Azuma ,  Takayuki Okinaga ,  Takashi Emata ,  Tomoaki Kudaishi ,  Tamaki Wada ,  Kunihiko Nishi ,  Masachika Masuda ,  Toshio Sugano

IPC分类号： H01L2302

CPC分类号： H05K3/303 ,  H01L25/105 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/0002 ,  H05K2201/09781 ,  H05K2201/10462 ,  H05K2201/10484 ,  H05K2201/10568 ,  H05K2201/10681 ,  H05K2201/1078 ,  H05K2201/2036 ,  Y02P70/613 ,  H01L2924/00

摘要： To realize low-profile electronic apparatus (a memory module and a memory card) of a large storage size by mounting tape carrier packages (TCPs) with a memory chip encapsulated onto a wiring board in high density. To be more specific, a TCP is composed of an insulating tape, leads formed on one side thereof, a potting resin with a semiconductor chip encapsulated, and a pair of support leads arranged on two opposite short sides. The pair of support leads function to hold the TCP at a constant tilt angle relative to the mounting surface of the wiring board. By varying the length vertical to the mounting surface, the TCP can be mounted to a desired tilt angle.

摘要翻译： 通过将具有以高密度封装在布线板上的存储芯片的载带封装（TCP）安装在一起，实现了大型存储尺寸的小型电子设备（存储器模块和存储卡）。 更具体地说，TCP由绝缘带，在其一侧形成的引线，封装有半导体芯片的灌封树脂和布置在两个相对的短边上的一对支撑引线构成。 一对支撑引线用于将TCP保持在相对于布线板的安装表面的恒定倾斜角度。 通过改变垂直于安装表面的长度，可以将TCP安装到期望的倾斜角度。