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    Micromachine stacked wirebonded package
    101.
    发明授权
    Micromachine stacked wirebonded package 有权
    Micromachine堆叠线接封装

    公开(公告)号：US06522015B1

    公开(公告)日：2003-02-18

    申请号：US09670499

    申请日：2000-09-26

    Applicant: Thomas P. Glenn ,  Steven Webster ,  Roy Dale Hollaway

    Inventor： Thomas P. Glenn ,  Steven Webster ,  Roy Dale Hollaway

    IPC: H01L2940

    CPC classification number: B81B7/0077 ,  B81C1/0023 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/16145 ,  H01L2224/48227 ,  H01L2224/94 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2924/00014

    Abstract: A micromachine package includes a micromachine chip having a micromachine area in a front surface of the micromachine chip. The package further includes a controller chip having a rear surface and a front surface. Bond pads are on the front surface of the controller chip. A bead secures the rear surface of the controller chip to the front surface of the micromachine chip. By mounting the controller chip directly on the micromachine chip, the size of the package is minimized. Further, the bead and controller chip form an enclosure around the micromachine area. This enclosure protects the micromachine area from the ambient environment.

    Abstract translation: 微机械组件包括在微机械芯片的前表面中具有微机械区域的微机械芯片。 该封装还包括具有后表面和前表面的控制器芯片。 焊盘位于控制器芯片的前表面。 一个珠将控制器芯片的后表面固定到微机械芯片的前表面。 通过将控制器芯片直接安装在微机械芯片上，封装的尺寸最小化。 此外，珠和控制器芯片形成围绕微机械区域的外壳。 该外壳保护微机械区域免受周围环境的影响。

    Chip size image sensor in wirebond package with step-up ring for electrical contact
    102.
    发明授权
    Chip size image sensor in wirebond package with step-up ring for electrical contact 有权
    引线键盘封装中的芯片尺寸图像传感器，具有用于电接触的升压环

    公开(公告)号：US06509560B1

    公开(公告)日：2003-01-21

    申请号：US09711993

    申请日：2000-11-13

    Applicant: Thomas P. Glenn ,  Steven Webster ,  Markus K. Liebhard

    Inventor： Thomas P. Glenn ,  Steven Webster ,  Markus K. Liebhard

    IPC: H01J4014

    CPC classification number: H01L27/14618 ,  H01L27/14683 ,  H01L31/02005 ,  H01L31/0203 ,  H01L2224/94 ,  H01L2924/15151 ,  H01L2224/85 ,  H01L2224/81

    Abstract: An image sensor package includes an image sensor having an upper surface. The image sensor further includes an active area and bond pads on the upper surface. A window is supported above the active area by a window support. A step up ring is mounted above a noncritical region of the upper surface of the image sensor between the active area and the bond pads. Electrically conductive traces on the step up ring are electrically connected to the bond pads by bond wires. An inner package body is formed between the step up ring and the window support and mechanically locks the window in place. An outer package body is formed to enclose the bond wires, the bond pads, and outer sides of the step up ring. The outer package body has outer sides coplanar with sides of the image sensor such that the image sensor assembly is chip size.

    Abstract translation: 图像传感器封装包括具有上表面的图像传感器。 图像传感器还包括有效区域和上表面上的接合焊盘。 通过窗口支持在活动区域​​上方支持一个窗口。 升压环安装在图像传感器的上表面的非临界区域之间的有源区域和接合焊盘之间。 升压环上的导电迹线通过接合线电连接到接合焊盘。 内包装体形成在升压环和窗户支架之间，并将窗户机械地锁定在适当的位置。 外包装体形成为包围接合线，接合垫和升压环的外侧。 外包装体具有与图像传感器的侧面共面的外侧，使得图像传感器组件的芯片尺寸。

    Structure including electronic components singulated using laser cutting
    103.
    发明授权
    Structure including electronic components singulated using laser cutting 有权
    包括使用激光切割分割的电子元件的结构

    公开(公告)号：US06420776B1

    公开(公告)日：2002-07-16

    申请号：US09797759

    申请日：2001-03-01

    Applicant: Thomas P. Glenn ,  Steven Webster ,  Roy Dale Hollaway

    Inventor： Thomas P. Glenn ,  Steven Webster ,  Roy Dale Hollaway

    IPC: H01L21304

    CPC classification number: H01L21/3043 ,  B23K26/382 ,  B23K26/40 ,  B23K2103/50 ,  H01L21/78

    Abstract: A structure comprises a substrate with electronic components formed on a first surface of the substrate. The structure includes a scribe line on a first surface of the substrate. The structure includes a trench formed by a laser on the second or back-side surface of the substrate, thus protecting the front-side surface of the substrate and, more particularly, the electronic component such as an integrated circuit and/or functional unit on the front-side surface of the substrate during singulation. Since, according to the invention, no saw blade is used, the width of the scribe line does not need to be any larger than the width of the beam from the laser plus some minimal tolerance for alignment. As a result, using the invention, the width of scribe line is on the order of twenty-four times smaller than the width of scribe lines required by the prior art methods.

    Abstract translation: 结构包括具有形成在基板的第一表面上的电子部件的基板。 该结构包括在基板的第一表面上的划线。 该结构包括在基板的第二或背面表面上由激光形成的沟槽，从而保护基板的前侧表面，更具体地，保护诸如集成电路和/或功能单元之类的电子部件 在分割期间衬底的前侧表面。 由于根据本发明，没有使用锯片，划线的宽度不需要大于来自激光器的光束的宽度加上对准的一些最小公差。 结果，使用本发明，划线的宽度比现有技术方法所需的划线宽度小24倍。

    Wafer level production of chip size semiconductor packages
    104.
    发明授权
    Wafer level production of chip size semiconductor packages 有权
    晶圆级生产芯片尺寸半导体封装

    公开(公告)号：US06406934B1

    公开(公告)日：2002-06-18

    申请号：US09654978

    申请日：2000-09-05

    Applicant: Thomas P. Glenn ,  Steven Webster ,  Vincent DiCaprio

    Inventor： Thomas P. Glenn ,  Steven Webster ,  Vincent DiCaprio

    IPC: H01L2148

    CPC classification number: H01L21/76898 ,  H01L23/481 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

    Abstract: The invention provides a manufacturing process for making chip-size semi-conductor packages (“CSPs”) at the wafer-level without the added size, cost, and complexity of substrates in the packages or the need to overmold them with plastic. One embodiment of the method includes the provision of a semiconductor wafer with opposite top and bottom surfaces and a plurality of dies integrally defined therein. Each die has an electronic device formed in a top surface thereof, and one or more electrically conductive vias extending therethrough that electrically connect the electronic device to the bottom surface of the die. The openings for the vias are formed ablatively with a laser and plated through with a conductive material. In a BGA form of the CSP, the vias connects the electronic device to lands on the bottom surface of the die. The lands may each have a bump of a conductive metal, e.g., solder, attached to it that functions as an input-output terminal of the CSP. When fabrication of the wafer is complete, the finished packages are singulated from the wafer using conventional wafer cutting techniques.

    Abstract translation: 本发明提供了一种用于在晶片级制造芯片尺寸的半导体封装（“CSP”）的制造工艺，而不会增加封装中的基板的附加尺寸，成本和复杂性，或者需要用塑料覆盖它们。 该方法的一个实施例包括提供具有相对的顶表面和底表面的半导体晶片和在其中整体限定的多个模具。 每个管芯具有形成在其顶表面中的电子器件，以及一个或多个延伸穿过其中的导电通孔，其将电子器件电连接到管芯的底表面。 用于通孔的开口用激光器形成并通过导电材料电镀。 在CSP的BGA形式中，通孔将电子器件连接到管芯的底表面上的焊盘。 焊盘可以各自具有连接到其上的导电金属（例如焊料）的凸起，其用作CSP的输入 - 输出端子。 当晶片的制造完成时，使用常规的晶片切割技术从晶片上分离成品封装。

    Flip chip on glass image sensor package fabrication method
    105.
    发明授权
    Flip chip on glass image sensor package fabrication method 有权
    倒装芯片玻璃图像传感器封装制造方法

    公开(公告)号：US06342406B1

    公开(公告)日：2002-01-29

    申请号：US09714682

    申请日：2000-11-15

    Applicant: Thomas P. Glenn ,  Steven Webster ,  Roy Dale Hollaway

    Inventor： Thomas P. Glenn ,  Steven Webster ,  Roy Dale Hollaway

    IPC: H01L2100

    CPC classification number: H01L27/14636 ,  H01L27/14618 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05023 ,  H01L2224/05025 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2224/05099

    Abstract: Electrically conductive interior traces and exterior traces are formed on interior and exterior surfaces, respectively, of a window. The interior traces are electrically connected to the exterior traces by electrically conductive vias extending through the window. To mount the window to an image sensor, the interior traces are aligned with bond pads on a front surface of the image sensor. Flip chip bumps are formed between the interior traces and the bond pads thus mounting the window to the image sensor. A sealer is applied to form a seal between the window and the image sensor and to protect an active area of the image sensor.

    Abstract translation: 导电内部痕迹和外部痕迹分别形成在窗户的内表面和外表面上。 内部迹线通过延伸穿过窗口的导电通孔电连接到外部迹线。 为了将窗口安装到图像传感器上，内部迹线与图像传感器前表面上的接合垫对齐。 在内部迹线和接合焊盘之间形成翻转芯片凸块，从而将窗口安装到图像传感器。 施加密封器以在窗口和图像传感器之间形成密封并且保护图像传感器的有效区域。

    Digital camera module packaging method
    107.
    发明授权
    Digital camera module packaging method 有权
    数码相机模块包装方式

    公开(公告)号：US07646429B2

    公开(公告)日：2010-01-12

    申请号：US11595297

    申请日：2006-11-10

    Applicant: Steven Webster ,  Ying-Cheng Wu ,  Kun-Hsieh Liu

    Inventor： Steven Webster ,  Ying-Cheng Wu ,  Kun-Hsieh Liu

    IPC: H04N5/225

    CPC classification number: H04N5/2253 ,  H04N5/2254

    Abstract: A digital camera module packaging method includes: first, providing a carrier (20) including a base (21) defining a chamber (214) and a lead frame (23). The lead frame has a plurality of conduction pieces (233) embedded in the base. One end of each conduction piece is exposed at one surface of the base, and another end of the conduction piece is exposed at another surface of the base. An image sensor chip (30) with a photosensitive area (301) and a plurality of chip pads (302) is then mounted in the chamber. A plurality of wires (40) is then provided. Each wire electrically connects a corresponding chip pad of the image sensor chip and one exposed end of a corresponding conduction piece of the carrier. A holder (50) is then provided. The carrier is mounted to the holder. Finally, a lens module (70) is mounted on the holder.

    Abstract translation: 一种数字照相机模块封装方法，包括：首先，提供一个载体（20），其包括限定腔室（214）和引线框架（23）的底座（21）。 引线框具有嵌入基座中的多个导电片（233）。 每个导电件的一端在基座的一个表面露出，并且导电件的另一端暴露在基座的另一个表面。 然后将具有感光区域（301）和多个芯片焊盘（302）的图像传感器芯片（30）安装在室中。 然后提供多根电线（40）。 每条导线将图像传感器芯片的相应芯片焊盘和载体的相应导电片的一个暴露端部电连接。 然后提供支架（50）。 承载件安装在支架上。 最后，镜头模块（70）安装在支架上。

    Digital camera module
    109.
    发明授权
    Digital camera module 失效
    数码相机模组

    公开(公告)号：US07408205B2

    公开(公告)日：2008-08-05

    申请号：US11525447

    申请日：2006-09-22

    Applicant: Steven Webster ,  Ying-Cheng Wu

    Inventor： Steven Webster ,  Ying-Cheng Wu

    IPC: H01L29/22 ,  H01L33/00 ,  H01L29/227 ,  H01L29/24 ,  H01L23/495 ,  H01L23/02

    CPC classification number: H01L27/14618 ,  H01L24/73 ,  H01L27/14625 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/15311 ,  H04N5/2257 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

    Abstract: A digital camera module (200) includes a carrier (20), an image sensor chip (30), a number of wires (50), a holder (60), and a lens module (70). The carrier includes a base (21) and a leadframe (23) embedded in the base. The base includes a board (211), a sidewall (213) and a cavity (24). The leadframe includes a number of conductive leads (233) spaced from each other. Each lead has a first terminal portion (235), a second terminal portion (236), and an interconnecting portion (237) connecting the first and second terminal portions. The chip is mounted on the carrier, and has an active area (301). The wires electrically connect the chip and the leadframe. The holder is mounted to the carrier to close the cavity. The lens module is received in the holder and guides light to the active area of the chip.

    Abstract translation: 数字照相机模块（200）包括载体（20），图像传感器芯片（30），多个电线（50），保持器（60）和透镜模块（70）。 载体包括嵌入基座中的基座（21）和引线框架（23）。 基座包括板（211），侧壁（213）和空腔（24）。 引线框架包括彼此间隔开的多个导电引线（233）。 每个引线具有连接第一和第二端子部分的第一端子部分（235），第二端子部分（236）和互连部分（237）。 芯片安装在载体上，并具有有效区域（301）。 导线将芯片和引线框架电连接。 保持器安装到载体以封闭空腔。 透镜模块被容纳在保持器中并将光引导到芯片的有效区域。

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