公开(公告)号：US20180144928A1

公开(公告)日：2018-05-24

申请号：US15875788

申请日：2018-01-19

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Tsung-Han Ko ,  Ching-Yu Chang ,  Kuan-Hsin Lo

IPC: H01L21/027 ,  H01L21/02 ,  G03F7/00 ,  H01L21/311

CPC classification number: H01L21/0271 ,  B81C2201/0149 ,  G03F7/0002 ,  H01L21/02118 ,  H01L21/02315 ,  H01L21/02318 ,  H01L21/02356 ,  H01L21/31138

Abstract: Disclosed is a method of forming a semiconductor device using a self-assembly (DSA) patterning process. The method includes forming a patterned feature over a substrate; applying an orientation material that includes a first polymer and a second polymer over the substrate, wherein the first polymer has a first activation energy and the second polymer has a second activation energy; baking the substrate at first temperature thereby forming a first orientation layer that includes the first polymer; baking the substrate at second temperature thereby forming a second orientation layer that includes the second polymer; and performing a directed self-assembly (DSA) process over the first and the second orientation layers.

公开(公告)号：US09941157B2

公开(公告)日：2018-04-10

申请号：US14752097

申请日：2015-06-26

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Bo-Jiun Lin ,  Ching-Yu Chang ,  Hai-Ching Chen ,  Tien-I Bao

IPC: H01L21/31 ,  H01L21/4763 ,  H01L21/768 ,  H01L21/02 ,  H01L23/532

CPC classification number: H01L21/76837 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02282 ,  H01L21/7682 ,  H01L23/5329 ,  H01L2221/1047

Abstract: A method for semiconductor manufacturing includes receiving a device that includes a substrate and a first layer disposed over the substrate, wherein the first layer includes a trench. The method further includes applying a first material over the first layer and filling in the trench, wherein the first material contains a matrix and a porogen that is chemically bonded with the matrix. The method further includes curing the first material to form a porous material layer. The porous material layer has a first portion and a second portion. The first portion is disposed in the trench. The second portion is disposed over the first layer. The first and second portions contain substantially the same percentage of each of Si, O, and C. The first and second portions contain substantially the same level of porosity.

公开(公告)号：US09892914B2

公开(公告)日：2018-02-13

申请号：US14918310

申请日：2015-10-20

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Tsung-Han Ko ,  Ching-Yu Chang ,  Kuan-Hsin Lo

IPC: H01L21/311 ,  H01L21/027 ,  H01L21/02

CPC classification number: H01L21/0271 ,  B81C2201/0149 ,  G03F7/0002 ,  H01L21/02118 ,  H01L21/02315 ,  H01L21/02318 ,  H01L21/02356 ,  H01L21/31138

Abstract: Disclosed is a method of forming a semiconductor device using a self-assembly (DSA) patterning process. The method includes forming a patterned feature over a substrate; applying an orientation material that includes a first polymer and a second polymer over the substrate, wherein the first polymer has a first activation energy and the second polymer has a second activation energy; baking the substrate at first temperature thereby forming a first orientation layer that includes the first polymer; baking the substrate at second temperature thereby forming a second orientation layer that includes the second polymer; and performing a directed self-assembly (DSA) process over the first and the second orientation layers.

公开(公告)号：US09864275B2

公开(公告)日：2018-01-09

申请号：US14632793

申请日：2015-02-26

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ching-Yu Chang ,  Chien-Wei Wang ,  Hsueh-An Chen

IPC: G03F7/004 ,  G03F7/11 ,  H01L21/027 ,  G03F7/20 ,  G03F7/16 ,  G03F7/32 ,  G03F7/075 ,  C08F220/38 ,  C08L33/16 ,  C08F220/26 ,  H01L21/308 ,  C08F220/22 ,  C08F220/24

CPC classification number: G03F7/11 ,  C08F220/22 ,  C08F220/24 ,  C08F220/26 ,  C08F220/38 ,  C08L33/16 ,  C08L2205/025 ,  G03F7/004 ,  G03F7/0046 ,  G03F7/0758 ,  G03F7/168 ,  G03F7/20 ,  G03F7/2041 ,  G03F7/325 ,  H01L21/0274 ,  H01L21/3081

Abstract: An improved resist material and a technique for patterning a workpiece such as an integrated circuit workpiece that offers improved resistance to environmental contaminants is provided. In an exemplary embodiment, the method includes receiving a workpiece and applying to the workpiece a resist material containing a protectant disbursed throughout. A thermal process is performed on the workpiece that causes the protectant to become concentrated in an upper region of the resist material. The resist material is exposed in a lithographic process and the exposed resist material is developed to define a pattern within the resist material. In some such examples, the protectant is selected to reduce an effect of an environmental contaminant without affecting an acid/base ratio of the resist material. In some such embodiments, the protectant includes a hydrophobic functional group.

公开(公告)号：US09810990B2

公开(公告)日：2017-11-07

申请号：US14658354

申请日：2015-03-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Wei-Han Lai ,  Ching-Yu Chang ,  Cheng-Han Wu ,  Siao-Shan Wang ,  Chin-Hsiang Lin

IPC: G03F7/38 ,  G03F7/32 ,  G03F7/40 ,  G03F7/038

CPC classification number: G03F7/325 ,  G03F7/0382 ,  G03F7/38 ,  G03F7/40

Abstract: A material layer is formed over a substrate. A negative tone photoresist layer is formed over the material layer. An exposure process is performed to the negative tone photoresist layer. A post-exposure bake (PEB) process is performed to the negative tone photoresist layer. After the exposure process and the PEB process, the negative tone photoresist layer is treated with a solvent. The solvent contains a chemical having a greater dipole moment than n-butyl acetate (n-BA).

公开(公告)号：US20170176857A1

公开(公告)日：2017-06-22

申请号：US15443752

申请日：2017-02-27

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chen-Hau Wu ,  Wei-Han Lai ,  Ching-Yu Chang

IPC: G03F7/038 ,  G03F7/039 ,  G03F7/16 ,  H01L21/027 ,  G03F7/38 ,  G03F7/40 ,  G03F7/004 ,  G03F7/32 ,  G03F7/20

CPC classification number: G03F7/038 ,  G03F7/0045 ,  G03F7/039 ,  G03F7/16 ,  G03F7/168 ,  G03F7/2041 ,  G03F7/30 ,  G03F7/325 ,  G03F7/38 ,  G03F7/40 ,  H01L21/0274

Abstract: A photoresist with a group which will decompose bonded to a high etching resistance moiety is provided. Alternatively, the group which will decompose can additionally be attached to a re-attachment group that will re-attach to the polymer after the group which will decompose has cleaved from the polymer. The photoresist may also comprise a non-leaving monomer with a cross-linking site and a cross-linking agent.

公开(公告)号：US09678422B2

公开(公告)日：2017-06-13

申请号：US14869400

申请日：2015-09-29

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ching-Yu Chang ,  Chen-Yu Liu

IPC: H01L21/302 ,  G03F7/004 ,  H01L21/027 ,  H01L21/308 ,  G03F7/038 ,  G03F7/039 ,  G03F7/095

CPC classification number: G03F7/004 ,  G03F7/0045 ,  G03F7/0046 ,  G03F7/0382 ,  G03F7/0392 ,  G03F7/095 ,  H01L21/0271 ,  H01L21/3081

Abstract: Methods and materials for making a semiconductor device are described. The method includes providing a substrate, forming a middle layer comprising a floating additive polymer (FAP) at an upper surface of the middle layer, the FAP chemically bound to a photoacid generator (PAG) and including a fluorine-containing material over the substrate, forming a photoresist layer over the middle layer, exposing the photoresist layer and the middle layer to an exposure energy to produce acid bound to the middle layer in the exposed areas of the middle layer, and developing the photoresist layer.

公开(公告)号：US20170032961A1

公开(公告)日：2017-02-02

申请号：US14811955

申请日：2015-07-29

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： An-Ren Zi ,  Ching-Yu Chang

IPC: H01L21/027 ,  G03F7/039 ,  G03F7/32 ,  G03F7/38 ,  C08G63/685 ,  G03F7/20

CPC classification number: G03F7/2022 ,  G03F7/038 ,  G03F7/0382 ,  G03F7/039 ,  G03F7/0392 ,  G03F7/095 ,  G03F7/203 ,  G03F7/322 ,  G03F7/325 ,  H01L21/0271

Abstract: A method of making a semiconductor device is provided. The method includes forming a photoresist material over a substrate, the photoresist material having a polymer that includes a backbone having a segment and a linking group, the segment including a carbon chain and an ultraviolet (UV) curable group, the UV curable group coupled to the carbon chain and to the linking group; performing a first exposure process that breaks the backbone of the polymer via decoupling the linking group from the connected UV curable group of each segment; performing a second exposure process to form a patterned photoresist layer; and developing the patterned photoresist layer.

Abstract translation: 提供制造半导体器件的方法。 该方法包括在基底上形成光致抗蚀剂材料，光致抗蚀剂材料具有聚合物，该聚合物包括具有链段和连接基团的主链，所述链段包括碳链和紫外（UV）可固化基团，所述UV可固化基团连接到 碳链和连接基团; 执行第一曝光过程，其通过使连接基团与每个链段的连接的UV可固化基团脱钩来破坏聚合物的主链; 执行第二曝光处理以形成图案化的光致抗蚀剂层; 并显影图案化的光致抗蚀剂层。

公开(公告)号：US09543159B2

公开(公告)日：2017-01-10

申请号：US14671552

申请日：2015-03-27

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chien-Chih Chen ,  Chia-Wei Chen ,  Ching-Yu Chang ,  Shao-Jyun Wu

IPC: H01L21/30 ,  H01L21/02 ,  H01L21/308 ,  H01L21/266 ,  H01L21/027 ,  H01L21/32 ,  H01L21/67

CPC classification number: H01L21/3081 ,  G03F7/0751 ,  G03F7/0752 ,  G03F7/091 ,  G03F7/094 ,  H01L21/02126 ,  H01L21/0271 ,  H01L21/0274 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/266 ,  H01L21/3086 ,  H01L21/31111 ,  H01L21/31133 ,  H01L21/31138 ,  H01L21/32 ,  H01L21/67075

Abstract: A lithography method is provided in accordance with some embodiments. The lithography method includes forming an under layer of a polymeric material on a substrate; forming a silicon-containing middle layer on the under layer, wherein the silicon-containing middle layer has a silicon concentration in weight percentage less than 20% and is wet strippable; forming a patterned photosensitive layer on the silicon-containing middle layer; performing a first etching process to transfer a pattern of the patterned photosensitive layer to the silicon-containing middle layer; performing a second etching process to transfer the pattern to the under layer; and performing a wet stripping process to the silicon-containing middle layer and the under layer.

Abstract translation: 根据一些实施例提供光刻方法。 光刻方法包括在基底上形成聚合物材料的底层; 在所述下层上形成含硅中间层，其中，所述含硅中间层的硅浓度的重量百分比小于20％，并且是湿式可剥离的; 在含硅中间层上形成图案化感光层; 执行第一蚀刻工艺以将图案化感光层的图案转移到含硅中间层; 执行第二蚀刻工艺以将图案转印到下层; 并对含硅中间层和下层进行湿剥离处理。

公开(公告)号：US09460909B2

公开(公告)日：2016-10-04

申请号：US15017157

申请日：2016-02-05

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ching-Yu Chang ,  Chen-Yu Liu

IPC: G03F7/11 ,  H01L21/02 ,  H01L21/027 ,  H01L29/66 ,  H01L21/311 ,  C08F220/22 ,  C08F220/18 ,  C11D11/00

CPC classification number: H01L21/0206 ,  C08F220/18 ,  C08F220/22 ,  C11D11/0047 ,  G03F7/11 ,  G03F7/40 ,  G03F7/425 ,  H01L21/0212 ,  H01L21/02343 ,  H01L21/02359 ,  H01L21/0276 ,  H01L21/31111 ,  H01L21/31133 ,  H01L29/66795

Abstract: A system and method for anti-reflective layers is provided. In an embodiment the anti-reflective layer comprises a floating component in order to form a floating region along a top surface of the anti-reflective layer after the anti-reflective layer has dispersed. The floating component may be a floating cross-linking agent, a floating polymer resin, or a floating catalyst. The floating cross-linking agent, the floating polymer resin, or the floating catalyst may comprise a fluorine atom. The anti-reflective layers are removed using a fluid.