公开(公告)号：US09773675B2

公开(公告)日：2017-09-26

申请号：US15432368

申请日：2017-02-14

Applicant: Applied Materials, Inc.

Inventor： Ludovic Godet ,  Srinivas D. Nemani ,  Erica Chen ,  Jun Xue ,  Ellie Y. Yieh ,  Gary E. Dickerson

IPC: H01L21/033 ,  H01L27/088 ,  H01L27/092 ,  H01L29/78 ,  H01L21/3105 ,  H01L27/108 ,  H01L27/12

CPC classification number: H01L21/0337 ,  H01J2237/24528 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31155 ,  H01L21/32 ,  H01L21/76205 ,  H01L21/7624 ,  H01L21/823431 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/10879 ,  H01L27/1211 ,  H01L29/66795 ,  H01L29/66803 ,  H01L29/7831

Abstract: Embodiments of the present disclosure relate to precision material modification of three dimensional (3D) features or advanced processing techniques. Directional ion implantation methods are utilized to selectively modify desired regions of a material layer to improve etch characteristics of the modified material. For example, a modified region of a material layer may exhibit improved etch selectivity relative to an unmodified region of the material layer. Methods described herein are useful for manufacturing 3D hardmasks which may be advantageously utilized in various integration schemes, such as fin isolation and gate-all-around, among others. Multiple directional ion implantation processes may also be utilized to form dopant gradient profiles within a modified layer to further influence etching processes.

公开(公告)号：US09754791B2

公开(公告)日：2017-09-05

申请号：US14680879

申请日：2015-04-07

Applicant: Applied Materials, Inc.

Inventor： Ludovic Godet ,  Yin Fan ,  Ellie Y. Yieh ,  Srinivas D. Nemani

IPC: H01L21/44 ,  H01L21/285 ,  H01L21/02 ,  H01L21/027 ,  H01L21/033 ,  H01L21/311 ,  H01L21/3115 ,  H01L21/768 ,  C23C14/04 ,  C23C14/48 ,  C23C16/04 ,  C23C16/455 ,  H01J37/32 ,  H01L21/265

CPC classification number: H01L21/28562 ,  C23C14/04 ,  C23C14/48 ,  C23C16/04 ,  C23C16/45525 ,  H01J37/32412 ,  H01J37/32422 ,  H01J37/3244 ,  H01J37/32449 ,  H01J37/32623 ,  H01L21/02175 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/0274 ,  H01L21/0337 ,  H01L21/2236 ,  H01L21/265 ,  H01L21/28568 ,  H01L21/31111 ,  H01L21/31133 ,  H01L21/31155 ,  H01L21/76879

Abstract: Methods for selectively depositing different materials at different locations on a substrate are provided. A selective deposition process may form different materials on different surfaces, e.g., different portions of the substrate, depending on the material properties of the underlying layer being deposited on. Ion implantation processes may be used to modify materials disposed on the substrate. The ions modify surface properties of the substrate to enable the subsequent selective deposition process. A substrate having a mask disposed thereon may be subjected to an on implantation process to modify the mask and surfaces of the substrate exposed by the mask. The mask may be removed which results in a substrate having regions of implanted and non-implanted materials. A subsequent deposition process may be performed to selectively deposit on either the implanted or non-implanted regions of the substrate.

公开(公告)号：US09620407B2

公开(公告)日：2017-04-11

申请号：US14613545

申请日：2015-02-04

Applicant: Applied Materials, Inc.

Inventor： Ludovic Godet ,  Srinivas D. Nemani ,  Erica Chen ,  Jun Xue ,  Ellie Y. Yieh ,  Gary E. Dickerson

IPC: H01L21/762 ,  H01L21/84 ,  H01L21/82 ,  H01L27/092 ,  H01L21/311 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/033 ,  H01L21/8238 ,  H01L21/3115 ,  H01L21/32

CPC classification number: H01L21/0337 ,  H01J2237/24528 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31155 ,  H01L21/32 ,  H01L21/76205 ,  H01L21/7624 ,  H01L21/823431 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/10879 ,  H01L27/1211 ,  H01L29/66795 ,  H01L29/66803 ,  H01L29/7831

Abstract: Embodiments of the present disclosure relate to precision material modification of three dimensional (3D) features or advanced processing techniques. Directional ion implantation methods are utilized to selectively modify desired regions of a material layer to improve etch characteristics of the modified material. For example, a modified region of a material layer may exhibit improved etch selectivity relative to an unmodified region of the material layer. Methods described herein are useful for manufacturing 3D hardmasks which may be advantageously utilized in various integration schemes, such as fin isolation and gate-all-around, among others. Multiple directional ion implantation processes may also be utilized to form dopant gradient profiles within a modified layer to further influence etching processes.

公开(公告)号：US09613859B2

公开(公告)日：2017-04-04

申请号：US14975231

申请日：2015-12-18

Applicant: Applied Materials, Inc.

Inventor： Annamalai Lakshmanan ,  Bencherki Mebarki ,  Kaushal K. Singh ,  Paul F. Ma ,  Mehul B. Naik ,  Andrew Cockburn ,  Ludovic Godet

IPC: H01L21/768 ,  H01L21/285 ,  H01L21/3205 ,  H01L23/532

CPC classification number: H01L21/76879 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/32053 ,  H01L21/76802 ,  H01L21/76876 ,  H01L21/76886 ,  H01L21/76889 ,  H01L23/53257 ,  H01L23/53271 ,  H01L2221/1094

Abstract: Methods for direct deposition of a metal silicide nanowire for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes positioning a substrate in a processing region of a process chamber, the substrate having a first surface comprising a non-dielectric material; and a dielectric layer formed on the first surface. An opening is formed in the dielectric layer, the opening exposing at least a portion of the first surface, the opening having sidewalls. A metal silicide seed is deposited in the opening using a PVD process, wherein the PVD process is performed with either no bias or a bias which creates deposition on the sidewall which is less than 1% of the deposition on the first surface. A metal silicide layer is then selectively deposited on the metal silicide seed using a metal-silicon organic precursor, creating the metal silicide nanowire.

公开(公告)号：US20160276150A1

公开(公告)日：2016-09-22

申请号：US15073444

申请日：2016-03-17

Applicant: APPLIED MATERIALS, INC.

Inventor： Jun Xue ,  Ludovic Godet ,  Srinivas Nemani ,  Michael W. Stowell ,  Qiwei Liang ,  Douglas A. Buchberger

IPC: H01L21/02

CPC classification number: H01L21/02274 ,  H01L21/0217 ,  H01L21/02329 ,  H01L21/0234 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76831

Abstract: Methods of processing a substrate are provided herein. In some embodiments, a method of processing a substrate disposed in a processing chamber includes: (a) depositing a layer of material on a substrate by exposing the substrate to a first reactive species generated from a remote plasma source and to a first precursor, wherein the first reactive species reacts with the first precursor; and (b) treating all, or substantially all, of the deposited layer of material by exposing the substrate to a plasma generated within the processing chamber from a second plasma source; wherein at least one of the remote plasma source or the second plasma source is pulsed to control periods of depositing and periods of treating.

Abstract translation: 本文提供了处理基板的方法。 在一些实施例中，处理设置在处理室中的衬底的方法包括：（a）通过将衬底暴露于从远程等离子体源产生的第一反应物质和第一前体而在衬底上沉积材料层，其中 第一活性物质与第一前体反应; 和（b）通过将衬底暴露于处理室内从等离子体源产生的等离子体处理所有或基本上全部沉积的材料层; 其中所述远程等离子体源或所述第二等离子体源中的至少一个被脉冲以控制沉积周期和处理周期。

公开(公告)号：US09385219B2

公开(公告)日：2016-07-05

申请号：US14754042

申请日：2015-06-29

Applicant: Applied Materials, Inc.

Inventor： Ellie Y. Yieh ,  Srinivas D. Nemani ,  Ludovic Godet ,  Yin Fan ,  Tristan Ma

IPC: H01L21/02 ,  H01L29/66 ,  H01L21/265 ,  H01L21/223 ,  H01L21/266 ,  C23C16/455

CPC classification number: H01L29/66803 ,  C23C16/0227 ,  C23C16/04 ,  C23C16/455 ,  C23C16/45525 ,  C23C16/45536 ,  H01J37/32403 ,  H01J37/32422 ,  H01J37/32623 ,  H01L21/02057 ,  H01L21/0228 ,  H01L21/02296 ,  H01L21/02315 ,  H01L21/02334 ,  H01L21/0262 ,  H01L21/2236 ,  H01L21/26513 ,  H01L21/266

Abstract: Methods for forming fin structures with desired materials formed on different locations of the fin structure using a selective deposition process for fin field effect transistors (FinFETs) are provided. In one embodiment, a method of forming a structure with desired materials on a substrate includes depositing a first material on a substrate having a three-dimensional (3D) structure formed thereon while performing an implantation process to dope a first region of the 3D structure. The first material may be removed and a second material may be deposited on the 3D structure. The second material may selectively grow on a second region of the 3D structure.

Abstract translation: 提供了使用鳍式场效应晶体管（FinFET）的选择性沉积工艺在翅片结构的不同位置形成所需材料的翅片结构的方法。 在一个实施例中，在衬底上形成具有期望材料的结构的方法包括在执行植入工艺以掺杂3D结构的第一区域的同时，在其上形成有三维（3D）结构的衬底上沉积第一材料。 可以去除第一材料并且可以将第二材料沉积在3D结构上。 第二材料可以选择性地在3D结构的第二区域上生长。

公开(公告)号：US20160099154A1

公开(公告)日：2016-04-07

申请号：US14506536

申请日：2014-10-03

Applicant: Applied Materials, Inc.

Inventor： Jun Xue ,  Ludovic Godet ,  Martin A. Hilkene ,  Matthew D. Scotney-Castle

IPC: H01L21/306 ,  H01J37/32 ,  C23C16/50 ,  H01L21/02 ,  C23C14/48

CPC classification number: H01L21/02527 ,  C23C14/046 ,  H01J37/321 ,  H01J37/32422 ,  H01L21/02274 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02532 ,  H01L21/02631 ,  H01L21/02639 ,  H01L21/033 ,  H01L21/67253

Abstract: Ion species are supplied to a workpiece comprising a pattern layer over a substrate. A material layer is deposited on the pattern layer using an implantation process of the ion species. In one embodiment, the deposited material layer has an etch selectivity to the pattern layer. In one embodiment, a trench is formed on the pattern layer. The trench comprises a bottom and a sidewall. The material layer is deposited into the trench using the ion implantation process. The material layer is deposited on the bottom of the trench in a direction along the sidewall.

Abstract translation: 离子物质被供给到包括衬底上的图案层的工件。 使用离子种类的注入工艺将材料层沉积在图案层上。 在一个实施例中，沉积的材料层对图案层具有蚀刻选择性。 在一个实施例中，在图案层上形成沟槽。 沟槽包括底部和侧壁。 使用离子注入工艺将材料层沉积到沟槽中。 材料层沿着侧壁的方向沉积在沟槽的底部上。

公开(公告)号：US12225641B2

公开(公告)日：2025-02-11

申请号：US17119377

申请日：2020-12-11

Applicant: Applied Materials, Inc.

Inventor： Hiram Cervera ,  Yongan Xu ,  Ludovic Godet

IPC: H05B3/74 ,  F27D5/00 ,  H05B3/28 ,  H05B3/62

Abstract: Embodiments of the present disclosure relate to bake apparatuses for handling and uniform baking of substrates and methods for the handling and the uniform baking of substrates. The bake apparatuses allow the substrates to be heated to a temperature greater than 50° C. without bowing of about 1 mm to about 2 mm from the edge of the substrates to the center of the substrates. The bake apparatuses heat the substrates uniformly or substantially uniformly to improve substrate quality.

公开(公告)号：US12208637B2

公开(公告)日：2025-01-28

申请号：US18167682

申请日：2023-02-10

Applicant: Applied Materials, Inc.

Inventor： Yingdong Luo ,  Jinyu Lu ,  Takashi Kuratomi ,  Alexia Adilene Portillo Rivera ,  Xiaopei Deng ,  Zhengping Yao ,  Daihua Zhang ,  Rami Hourani ,  Ludovic Godet

IPC: B41M3/00 ,  B41J11/00 ,  G02B27/01

Abstract: Embodiments of the present disclosure generally relate to optical devices. More specifically, embodiments described herein relate to optical devices and methods of manufacturing a patterned optical device film on an optical device substrate. According to certain embodiments, an inkjet deposition process is used to deposit a patterned inkjet coating layer on the optical device substrate. A deposition process may then be used to deposit an optical device material on the patterned inkjet coating and the optical device substrate. The patterned inkjet coating on the optical device substrate may then be washed with an appropriate detergent to lift-off the patterned inkjet coating layer from the optical device substrate to form the patterned optical device film.

公开(公告)号：US12140494B2

公开(公告)日：2024-11-12

申请号：US18397977

申请日：2023-12-27

Applicant: Applied Materials, Inc.

Inventor： Jinxin Fu ,  Kang Luo ,  Fariah Hayee ,  Ludovic Godet

IPC: G01M11/02

Abstract: A method of optical device metrology is provided. The method includes introducing a first type of light into a first optical device during a first time period, the first optical device including an optical substrate and an optical film disposed on the optical substrate, the first optical device further including a first surface, a second surface, and one or more sides connecting the first surface with the second surface; and measuring, during the first time period, a quantity of the first type of light transmitted from a plurality of locations on the first surface or the second surface during the first time period, wherein the measuring is performed by a detector coupled to one or more fiber heads positioned to collect the light transmitted from the plurality of locations.