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公开(公告)号：US20200039820A1
公开(公告)日：2020-02-06
申请号：US16595532
申请日：2019-10-08
发明人： Claus Waechter , Edward Fuergut , Bernd Goller , Michael Ledutke , Dominic Maier
摘要： The method comprises fabricating a semiconductor panel comprising a plurality of semiconductor devices, fabricating a cap panel comprising a plurality of caps, bonding the cap panel onto the semiconductor panel so that each one of the caps covers one or more of the semiconductor devices, and singulating the bonded panels into a plurality of semiconductor modules.
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公开(公告)号：US10549985B2
公开(公告)日：2020-02-04
申请号：US15692938
申请日：2017-08-31
发明人： Dominic Maier , Matthias Steiert , Chau Fatt Chiang , Christian Geissler , Bernd Goller , Thomas Kilger , Johannes Lodermeyer , Franz-Xaver Muehlbauer , Chee Yang Ng , Beng Keh See , Claus Waechter
摘要： A semiconductor package includes a semiconductor die having a sensor structure disposed at a first side of the semiconductor die, and a first port extending through the semiconductor die from the first side to a second side of the semiconductor die opposite the first side, so as to provide a link to the outside environment. Corresponding methods of manufacture are also provided.
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公开(公告)号：US10435292B2
公开(公告)日：2019-10-08
申请号：US15651522
申请日：2017-07-17
发明人： Claus Waechter , Edward Fuergut , Bernd Goller , Michael Ledutke , Dominic Maier
摘要： The method comprises fabricating a semiconductor panel comprising a plurality of semiconductor devices, fabricating a cap panel comprising a plurality of caps, bonding the cap panel onto the semiconductor panel so that each one of the caps covers one or more of the semiconductor devices, and singulating the bonded panels into a plurality of semiconductor modules.
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公开(公告)号：US10186468B2
公开(公告)日：2019-01-22
申请号：US15086573
申请日：2016-03-31
发明人： Stephan Pindl , Daniel Lugauer , Dominic Maier , Alfons Dehe
IPC分类号： H01L23/31 , H01L21/20 , H01L21/18 , H01L33/00 , H01L21/762 , H01L23/057 , H01L23/053 , G01N27/02 , G01N33/00 , H01L21/56 , H01L23/538 , H05K1/18 , G01N27/12 , H01L23/00 , H01L23/29
摘要： According to an embodiment, a sensor package includes an electrically insulating substrate including a cavity in the electrically insulating substrate, an ambient sensor, an integrated circuit die embedded in the electrically insulating substrate, and a plurality of conductive interconnect structures coupling the ambient sensor to the integrated circuit die. The ambient sensor is supported by the electrically insulating substrate and arranged adjacent the cavity.
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公开(公告)号：US09981843B2
公开(公告)日：2018-05-29
申请号：US15138313
申请日：2016-04-26
发明人： Dominic Maier , Alfons Dehe , Thomas Kilger , Markus Menath , Franz Xaver Muehlbauer , Daniel Porwol , Juergen Wagner
CPC分类号： B81C1/00896 , B81C1/00269 , B81C1/00801 , B81C2201/0194 , B81C2201/053
摘要： A method of producing a chip package is described. A plurality of chips is provided on a first wafer. Each chip has a cavity which opens to a first main face of the chip. The cavities are filled or covered temporarily. The chips are then singulated. The singulated chips are embedded in an encapsulation material, and then the cavities are re-exposed.
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公开(公告)号：US08890284B2
公开(公告)日：2014-11-18
申请号：US13774541
申请日：2013-02-22
发明人： Thomas Kilger , Ulrich Wachter , Dominic Maier , Gottfried Beer
IPC分类号： H01L29/00 , H01L49/02 , H01L23/538 , H01L21/82 , H01L27/04
CPC分类号： H01L21/561 , H01L21/568 , H01L21/78 , H01L21/82 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/5384 , H01L23/5389 , H01L24/19 , H01L24/24 , H01L24/25 , H01L24/82 , H01L25/50 , H01L27/04 , H01L28/00 , H01L2224/04105 , H01L2224/12105 , H01L2224/16145 , H01L2224/16225 , H01L2224/24137 , H01L2224/2518 , H01L2224/73267 , H01L2924/12042 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/1461 , H01L2924/15311 , H01L2924/19105 , H01L2924/00
摘要： A number of semiconductor chips each include a first main face and a second main face opposite to the first main face. A first encapsulation layer is applied over the second main faces of the semiconductor chips. An electrical wiring layer is applied over the first main faces of the first semiconductor chips. A second encapsulation layer is applied over the electrical wiring layer. The thickness of the first encapsulation layer and the thicknesses of the first semiconductor chips is reduced. The structure can be singulated to obtain a plurality of semiconductor devices.
摘要翻译： 多个半导体芯片各自包括与第一主面相对的第一主面和第二主面。 在半导体芯片的第二主面上施加第一封装层。 在第一半导体芯片的第一主面上施加电布线层。 将第二封装层施加在电布线层上。 第一封装层的厚度和第一半导体芯片的厚度减小。 可以将该结构单个化以获得多个半导体器件。
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17.发明授权公开(公告)号：US10056295B2
公开(公告)日：2018-08-21
申请号：US15002009
申请日：2016-01-20
发明人： Georg Meyer-Berg , Claus von Waechter , Michael Bauer , Holger Doepke , Dominic Maier , Daniel Porwol , Tobias Schmidt
CPC分类号： H01L21/78 , B32B37/26 , H01L21/565 , H01L21/6835 , H01L23/562 , H01L2221/68318 , H01L2221/68327 , H01L2221/68381 , H05K3/007 , Y10S156/93 , Y10S156/941
摘要： A method for handling a product substrate includes bonding a carrier to the product substrate. A layer of a permanent adhesive is applied onto a surface of the carrier. A structured intermediate layer is provided. The applied permanent adhesive bonds the carrier to the product substrate. The structured intermediate layer is arranged between the product substrate and the carrier. A surface of the structured intermediate layer and a surface of the permanent adhesive are in direct contact to a surface of the product substrate. The structured intermediate layer decreases a bonding strength between the product substrate and the carrier.
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公开(公告)号：US20180022601A1
公开(公告)日：2018-01-25
申请号：US15651522
申请日：2017-07-17
发明人： Claus Waechter , Edward Fuergut , Bernd Goller , Michael Ledutke , Dominic Maier
摘要： The method comprises fabricating a semiconductor panel comprising a plurality of semiconductor devices, fabricating a cap panel comprising a plurality of caps, bonding the cap panel onto the semiconductor panel so that each one of the caps covers one or more of the semiconductor devices, and singulating the bonded panels into a plurality of semiconductor modules.
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公开(公告)号：US09806056B2
公开(公告)日：2017-10-31
申请号：US15044021
申请日：2016-02-15
发明人： Ulrich Wachter , Dominic Maier , Thomas Kilger
CPC分类号： H01L24/96 , H01L21/561 , H01L21/568 , H01L21/76838 , H01L23/31 , H01L23/3114 , H01L23/48 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/48 , H01L24/85 , H01L2224/02317 , H01L2224/02331 , H01L2224/02379 , H01L2224/03462 , H01L2224/0347 , H01L2224/03828 , H01L2224/0401 , H01L2224/04042 , H01L2224/04105 , H01L2224/05008 , H01L2224/05147 , H01L2224/05548 , H01L2224/05553 , H01L2224/05655 , H01L2224/1132 , H01L2224/1134 , H01L2224/11849 , H01L2224/12105 , H01L2224/13024 , H01L2224/131 , H01L2224/96 , H01L2924/00014 , H01L2924/10161 , H01L2924/181 , H01L2924/19107 , H01L2924/00 , H01L2224/03 , H01L2224/11 , H01L2924/014 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Integrated circuits are packaged by placing a plurality of semiconductor dies on a support substrate, each one of the semiconductor dies having a plurality of terminals at a side facing the support substrate and covering the semiconductor dies with a molding compound to form a molded structure. The support substrate is then removed from the molded structure to expose the side of the semiconductor dies with the terminals, and a metal redistribution layer is formed on the molded structure and in direct contact with the terminals of the semiconductor dies and the molding compound. The redistribution layer is formed without first forming a dielectric layer on a side of the molded structure with the terminals of the semiconductor dies. A corresponding molded substrate and individual molded semiconductor packages are also disclosed.
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公开(公告)号：US20170284951A1
公开(公告)日：2017-10-05
申请号：US15086573
申请日：2016-03-31
发明人： Stephan Pindl , Daniel Lugauer , Dominic Maier , Alfons Dehe
IPC分类号： G01N27/02 , H01L21/56 , H01L23/538 , H05K1/18 , H01L23/31
CPC分类号： H01L23/315 , G01N27/028 , G01N27/128 , G01N33/0036 , H01L21/185 , H01L21/187 , H01L21/2007 , H01L21/561 , H01L21/568 , H01L21/7624 , H01L23/053 , H01L23/057 , H01L23/291 , H01L23/295 , H01L23/296 , H01L23/31 , H01L23/3107 , H01L23/3128 , H01L23/5386 , H01L24/19 , H01L24/24 , H01L24/96 , H01L33/0079 , H01L2224/04105 , H01L2224/12105 , H01L2224/24137 , H01L2224/73267 , H01L2924/14 , H01L2924/1433 , H01L2924/1461 , H01L2924/1815 , H01L2924/18162 , H01L2924/3025 , H05K1/181
摘要： According to an embodiment, a sensor package includes an electrically insulating substrate including a cavity in the electrically insulating substrate, an ambient sensor, an integrated circuit die embedded in the electrically insulating substrate, and a plurality of conductive interconnect structures coupling the ambient sensor to the integrated circuit die. The ambient sensor is supported by the electrically insulating substrate and arranged adjacent the cavity.
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