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    DIRECT DIGITAL SYNTHESIS OF SIGNALS USING MAXIMUM LIKELIHOOD BIT-STREAM ENCODING
    11.
    发明申请
    DIRECT DIGITAL SYNTHESIS OF SIGNALS USING MAXIMUM LIKELIHOOD BIT-STREAM ENCODING 审中-公开
    使用最大似然比特流编码的信号的直接数字合成

    公开(公告)号：US20160072647A1

    公开(公告)日：2016-03-10

    申请号：US14944184

    申请日：2015-11-17

    Applicant: Intel Corporation

    Inventor： Kameran Azadet ,  Steven C. Pinault

    IPC: H04L25/03

    CPC classification number: G06F9/3001 ,  G06F5/01 ,  G06F9/30036 ,  G06F17/15 ,  H03F1/0288 ,  H03F1/3241 ,  H03F1/3258 ,  H03F3/189 ,  H03F3/24 ,  H03F2200/336 ,  H03F2201/3209 ,  H03F2201/3212 ,  H03F2201/3224 ,  H03F2201/3233 ,  H03H17/06 ,  H03M3/30 ,  H04B1/0003 ,  H04B1/0475 ,  H04B1/62 ,  H04B2001/0408 ,  H04L1/0054 ,  H04L25/02 ,  H04L25/03 ,  H04L25/03178 ,  H04L25/03216 ,  H04L25/4917 ,  H04L27/2334

    Abstract: Maximum likelihood bit-stream generation and detection techniques are provided using the M-algorithm and Infinite Impulse Response (IIR) filtering. The M-Algorithm is applied to a target input signal X to perform Maximum Likelihood Sequence Estimation on the target input signal X to produce a digital bit stream B, such that after filtering by an IIR filter, the produced digital stream Y produces an error signal satisfying one or more predefined requirements. The predefined requirements comprise, for example, a substantially minimum error. In an exemplary bit detection implementation, the target input signal X comprises an observed analog signal and the produced digital stream Y comprises a digitized output of a receive channel corresponding to a transmitted bit stream. In an exemplary bit stream generation implementation, the target input signal X comprises a desired transmit signal and the produced digital stream Y comprises an estimate of the desired transmit signal.

    Abstract translation: 使用M算法和无限脉冲响应（IIR）滤波提供最大似然比特流生成和检测技术。 将M算法应用于目标输入信号X以对目标输入信号X执行最大似然序列估计，以产生数字比特流B，使得在由IIR滤波器滤波之后，产生的数字流Y产生误差信号 满足一个或多个预定义的要求。 预定义的要求包括例如基本上最小的误差。 在示例性比特检测实现中，目标输入信号X包括观察到的模拟信号，并且所产生的数字流Y包括与发送的比特流相对应的接收信道的数字化输出。 在示例性比特流生成实现中，目标输入信号X包括期望的发射信号，并且所产生的数字流Y包括所需发射信号的估计。

    Semiconductor devices, transceiver, base station and mobile device
    12.
    发明授权
    Semiconductor devices, transceiver, base station and mobile device 有权

    公开(公告)号：US12170526B2

    公开(公告)日：2024-12-17

    申请号：US18054628

    申请日：2022-11-11

    Applicant: Intel Corporation

    Inventor： Daniel Gruber ,  Kameran Azadet ,  Martin Clara ,  Marc Jan Georges Tiebout

    IPC: H03M1/66 ,  H03D7/16 ,  H04B1/00 ,  H04B1/04

    Abstract: A semiconductor device comprising at least one transmit path is provided. The transmit path comprises an input node for receiving a digital baseband signal. Further, the transmit path comprises digital mixer circuitry coupled to the input node and configured to generate an upconverted digital baseband signal by upconverting a frequency of the digital baseband signal. Additionally, the transmit path comprises Digital-to-Analog Converter (DAC) circuitry coupled to the digital mixer circuitry and configured to generate an analog radio frequency signal based on the upconverted digital baseband signal. The transmit path comprises first analog mixer circuitry coupleable to an output of the DAC circuitry, and second analog mixer circuitry coupleable to the output of the DAC circuitry. Further, the transmit path comprises a first output node coupleable to an output of the first analog mixer circuitry, and a second output node coupleable to an output of the second analog mixer circuitry.

    Wireless communication system and base station
    13.
    发明授权
    Wireless communication system and base station 有权

    公开(公告)号：US12057871B2

    公开(公告)日：2024-08-06

    申请号：US18062030

    申请日：2022-12-06

    Applicant: Intel Corporation

    Inventor： Marc Jan Georges Tiebout ,  Hazar Yuksel ,  Kameran Azadet

    IPC: H04B1/04 ,  H04W16/28

    CPC classification number: H04B1/0475 ,  H04W16/28 ,  H04B2001/0425

    Abstract: A wireless communication system including a phased array comprising a plurality of antennas configured to emit a respective radio wave based on a respective antenna signal. Further, the system includes a plurality of power amplifiers each coupled to one of the plurality of antennas via a feed line and configured to output the antenna signal to the feed line. Also, the system includes a plurality of directional couplers each coupled into one of the feed lines and comprising a third port configured to output a fraction of a power received at a first port coupled to the power amplifier via the feed line, likewise a fourth port configured to output a fraction of a power received at a second port. Additionally, the system includes switching circuitry configured to alternately couple the third port to a first feedback receiver, and to alternately couple the fourth port to a second feedback receiver.

    Analog-to-digital converter system, transceiver, base station and mobile device
    16.
    发明授权
    Analog-to-digital converter system, transceiver, base station and mobile device 有权

    公开(公告)号：US11528182B2

    公开(公告)日：2022-12-13

    申请号：US17351288

    申请日：2021-06-18

    Applicant: Intel Corporation

    Inventor： Kameran Azadet ,  Martin Clara ,  Daniel Gruber ,  Christian Lindholm ,  Hundo Shin

    IPC: H03M1/10 ,  H04L27/36 ,  H03M1/06 ,  H04B1/04

    Abstract: An Analog-to-Digital Converter, ADC, system is provided. The ADC system comprises a plurality of ADC circuits and a first input for receiving a transmit signal of a transceiver. One ADC circuit of the plurality of ADC circuits is coupled to the first input and configured to provide first digital data based on the transmit signal. The ADC system further comprises a second input for receiving a receive signal of the transceiver. The other ADC circuits of the plurality of ADC circuits are coupled to the second input, wherein the other ADC circuits of the plurality of ADC circuits are time-interleaved and configured to provide second digital data based on the receive signal. Additionally, the ADC system comprises a first output configured to output digital feedback data based on the first digital data, and a second output configured to output digital receive data based on the second digital data.

    Apparatus and method for analog-to-digital conversion
    17.
    发明授权
    Apparatus and method for analog-to-digital conversion 有权

    公开(公告)号：US11038516B1

    公开(公告)日：2021-06-15

    申请号：US16886817

    申请日：2020-05-29

    Applicant: Intel Corporation

    Inventor： Kameran Azadet ,  Ramon Sanchez ,  Albert Molina ,  Martin Clara ,  Daniel Gruber ,  Matteo Camponeschi

    IPC: H03M1/10 ,  H03M1/34 ,  H03M1/06

    Abstract: An apparatus and method for analog-to-digital conversion. The apparatus includes a first analog-to-digital converter (ADC), a second ADC, and a calibration unit. The first ADC is configured to sample an input analog signal at a first sampling frequency. The second ADC is configured to sample the input analog signal at a second sampling frequency. The second sampling frequency is a fraction of the first sampling frequency. The calibration unit is configured to correct a distortion incurred in an output of the first ADC based on an output of the second ADC. The first ADC may be a time-interleaved ADC. The second ADC may be an extra sub-ADC of the time-interleaved ADC. The second ADC may be configured to sample the input analog signal at random sampling phases. A dithering noise may be added to the input analog signal of the second ADC. The calibration unit may be a non-linear equalizer.

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