公开(公告)号：US20240429190A1

公开(公告)日：2024-12-26

申请号：US18827181

申请日：2024-09-06

Applicant: Micron Technology, Inc.

Inventor： Aibin Yu ,  Wei Zhou ,  Zhaohui Ma

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/48 ,  H01L25/065

Abstract: A bond pad with micro-protrusions for direct metallic bonding. In one embodiment, a semiconductor device comprises a semiconductor substrate, a through-silicon via (TSV) extending through the semiconductor substrate, and a copper pad electrically connected to the TSV and having a coupling side. The semiconductor device further includes a copper element that projects away from the coupling side of the copper pad. In another embodiment, a bonded semiconductor assembly comprises a first semiconductor substrate with a first TSV and a first copper pad electrically coupled to the first TSV, wherein the first copper pad has a first coupling side. The bonded semiconductor assembly further comprises a second semiconductor substrate, opposite to the first semiconductor substrate, the second semiconductor substrate comprising a second copper pad having a second coupling side. A plurality of copper connecting elements extend between the first and second coupling sides of the first and second copper pads.

公开(公告)号：US11024595B2

公开(公告)日：2021-06-01

申请号：US15625676

申请日：2017-06-16

Applicant: Micron Technology, Inc.

Inventor： Benjamin L. McClain ,  Brandon P. Wirz ,  Zhaohui Ma

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/00

Abstract: A bond tip for thermocompression bonding a bottom surface includes a die contact area and a low surface energy material covering at least a portion of the bottom surface. The low surface energy material may cover substantially all of the bottom surface, or only a peripheral portion surrounding the die contact area. The die contact area may be recessed with respect to the peripheral portion a depth at least as great as a thickness of a semiconductor die to be received in the recessed die contact area. A method of thermocompression bonding is also disclosed.

公开(公告)号：US20190109019A1

公开(公告)日：2019-04-11

申请号：US16203538

申请日：2018-11-28

Applicant: Micron Technology, Inc.

Inventor： Wei Zhou ,  Zhaohui Ma ,  Aibin Yu

IPC: H01L21/48 ,  H01L25/00 ,  H01L23/373 ,  H01L25/065 ,  H01L23/433 ,  H01L21/56 ,  H01L23/00 ,  H01L25/18 ,  H01L23/367 ,  H01L23/31 ,  H01L21/78

Abstract: Methods for forming semiconductor die assemblies with heat transfer features are disclosed herein. In some embodiments, the methods comprise providing a wafer having a first side and a second side opposite the first side, attaching a semiconductor die stack to the first side of the wafer, and forming a plurality of heat transfer features at the second side of the wafer. The heat transfer features can be defined by a plurality of grooves that define an exposed continuous surface of the wafer at the second side compared to a planar surface of the wafer.

公开(公告)号：US20180366434A1

公开(公告)日：2018-12-20

申请号：US15625676

申请日：2017-06-16

Applicant: Micron Technology, Inc.

Inventor： Benjamin L. McClain ,  Brandon P. Wirz ,  Zhaohui Ma

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: A bond tip for thermocompression bonding a bottom surface includes a die contact area and a low surface energy material covering at least a portion of the bottom surface. The low surface energy material may cover substantially all of the bottom surface, or only a peripheral portion surrounding the die contact area. The die contact area may be recessed with respect to the peripheral portion a depth at least as great as a thickness of a semiconductor die to be received in the recessed die contact area. A method of thermocompression bonding is also disclosed.

公开(公告)号：US20160358898A1

公开(公告)日：2016-12-08

申请号：US14730681

申请日：2015-06-04

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Wei Zhou ,  Aibin Yu ,  Zhaohui Ma ,  Sony Varghese ,  Jonathan S. Hacker ,  Bret K. Street ,  Shijian Luo

IPC: H01L25/18 ,  H01L25/065 ,  H01L23/31 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L25/00 ,  H01L21/683

CPC classification number: H01L25/18 ,  H01L21/561 ,  H01L21/563 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/544 ,  H01L24/81 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/18161 ,  H01L2224/03 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014

Abstract: Methods of making semiconductor device packages may involve attaching a first semiconductor die to a carrier wafer, an inactive surface of the first semiconductor die facing the carrier wafer. One or more additional semiconductor die may be stacked on the first semiconductor die on a side of the first semiconductor die opposite the carrier wafer to form a stack of semiconductor dice. A protective material may be positioned over the stack of semiconductor dice, a portion of the protective material extending along side surfaces of the first semiconductor die to a location proximate the inactive surface of the first semiconductor die. The carrier wafer may be detached from the first semiconductor die.

Abstract translation: 制造半导体器件封装的方法可以包括将第一半导体管芯附接到载体晶片，第一半导体管芯的面向载体晶片的非活性表面。 一个或多个附加的半导体管芯可以在第一半导体管芯上与第一半导体管芯的与载体晶片相对的一侧堆叠以形成半导体管芯堆叠。 保护材料可以位于半导体管芯的堆叠之上，保护材料的一部分沿着第一半导体管芯的侧表面延伸到接近第一半导体管芯的非活性表面的位置。 载体晶片可以与第一半导体管芯分离。

公开(公告)号：US20160233110A1

公开(公告)日：2016-08-11

申请号：US15134788

申请日：2016-04-21

Applicant: Micron Technology, Inc.

Inventor： Wei Zhou ,  Zhaohui Ma ,  Aibin Yu

IPC: H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L21/4882 ,  H01L21/4878 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/367 ,  H01L23/3731 ,  H01L23/3738 ,  H01L23/4334 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/06181 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/17519 ,  H01L2224/29191 ,  H01L2224/293 ,  H01L2224/29393 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/83104 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/014 ,  H01L2924/05432 ,  H01L2924/15311 ,  H01L2924/15738 ,  H01L2924/15787

Abstract: Semiconductor die assemblies with heat sinks are disclosed herein. In one embodiment, a semiconductor die assembly includes a stack of semiconductor dies and a mold material surrounding at least a portion of the stack of semiconductor dies. A heat sink is disposed on the stack of semiconductor dies and adjacent the mold material. The heat sink includes an exposed surface and a plurality of heat transfer features along the exposed surface that are configured to increase an exposed surface area compared to a planar surface.

公开(公告)号：US20160079094A1

公开(公告)日：2016-03-17

申请号：US14485973

申请日：2014-09-15

Applicant: Micron Technology, Inc.

Inventor： Wei Zhou ,  Aibin Yu ,  Zhaohui Ma

IPC: H01L21/56 ,  H01L23/31 ,  H01L21/324 ,  H01L21/311 ,  H01L21/306

CPC classification number: H01L21/565 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/324 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3157 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of processing semiconductor wafers may involve, for example, encapsulating an active surface and each side surface of a wafer of semiconductor material, a plurality of semiconductor devices located on the active surface of the wafer, an exposed side surface of an adhesive material located on a back side surface of the wafer, and at least a portion of a side surface of a carrier substrate secured to the wafer by the adhesive material in an encapsulation material. At least a portion of the side surface of the adhesive material may be exposed by removing at least a portion of the encapsulation material. The carrier substrate may be detached from the wafer. Processing systems and in-process semiconductor wafers are also disclosed.

Abstract translation: 处理半导体晶片的方法可以包括例如封装半导体材料晶片的活性表面和每个侧表面，位于晶片的有效表面上的多个半导体器件，位于 晶片的背面表面和载体基板的侧表面的至少一部分通过胶粘材料固定在晶片上。 粘合剂材料的侧表面的至少一部分可以通过去除包封材料的至少一部分而暴露。 载体衬底可以从晶片分离。 还公开了处理系统和工艺中半导体晶片。

公开(公告)号：US11670612B2

公开(公告)日：2023-06-06

申请号：US17176095

申请日：2021-02-15

Applicant: Micron Technology, Inc.

Inventor： Brandon P. Wirz ,  Benjamin L. McClain ,  Jeremy E. Minnich ,  Zhaohui Ma

IPC: H01L21/48 ,  H01L23/00 ,  H01L21/033 ,  H01L21/60

CPC classification number: H01L24/17 ,  H01L21/0337 ,  H01L24/14 ,  H01L24/81 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2021/60007 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81024 ,  H01L2224/81141 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/92125 ,  H01L2224/92125 ,  H01L2224/73204 ,  H01L2224/32225 ,  H01L2224/16225 ,  H01L2924/00012 ,  H01L2224/73204 ,  H01L2224/32225 ,  H01L2224/16225 ,  H01L2924/00012 ,  H01L2224/13101 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor device assembly that includes a semiconductor device positioned over a substrate with a number of electrical interconnections formed between the semiconductor device and the substrate. The surface of the substrate includes a plurality of discrete solder mask standoffs that extend towards the semiconductor device. A thermal compression bonding process is used to melt solder to form the electrical interconnects, which lowers the semiconductor device to contact and be supported by the plurality of discrete solder mask standoffs. The solder mask standoffs permit the application of a higher pressure during the bonding process than using traditional solder masks. The solder mask standoffs may have various polygonal or non-polygonal shapes and may be positioned in pattern to protect sensitive areas of the semiconductor device and/or the substrate. The solder mask standoffs may be an elongated shape that protects areas of the semiconductor device and/or substrate.

公开(公告)号：US20210233887A1

公开(公告)日：2021-07-29

申请号：US17301843

申请日：2021-04-15

Applicant: Micron Technology, Inc.

Inventor： Benjamin L. McClain ,  Brandon P. Wirz ,  Zhaohui Ma

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: A bond tip for thermocompression bonding a bottom surface includes a die contact area and a low surface energy material covering at least a portion of the bottom surface. The low surface energy material may cover substantially all of the bottom surface, or only a peripheral portion surrounding the die contact area. The die contact area may be recessed with respect to the peripheral portion a depth at least as great as a thickness of a semiconductor die to be received in the recessed die contact area. A method of thermocompression bonding is also disclosed.

公开(公告)号：US10312226B2

公开(公告)日：2019-06-04

申请号：US15728043

申请日：2017-10-09

Applicant: Micron Technology, Inc.

Inventor： Zhaohui Ma ,  Wei Zhou ,  Chee Chung So ,  Soo Loo Ang ,  Aibin Yu

IPC: H01L25/18 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/544 ,  H01L21/683 ,  H01L21/78

Abstract: Methods of protecting semiconductor devices may involve cutting partially through a thickness of a semiconductor wafer to form trenches between stacks of semiconductor dice on regions of integrated circuitry of the semiconductor wafer. A protective material may be dispensed into the trenches and to a level at least substantially the same as a height of the stacks of semiconductor dice. Material of the semiconductor wafer may be removed from a back side thereof at least to a depth sufficient to expose the protective material in the trenches. A remaining thickness of the protective material between the stacks of semiconductor dice may be cut through.