公开(公告)号：US09847289B2

公开(公告)日：2017-12-19

申请号：US14291466

申请日：2014-05-30

Applicant: Applied Materials, Inc.

Inventor： Mehul Naik ,  Paul F. Ma ,  Srinivas D. Nemani

IPC: H01L21/02 ,  H01L21/3065 ,  H01L23/522 ,  H01L23/528 ,  H01L21/306 ,  H01L21/768 ,  H01L23/532 ,  H01J37/32

CPC classification number: H01L23/5226 ,  H01J37/32091 ,  H01L21/02068 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/76807 ,  H01L21/76846 ,  H01L21/76877 ,  H01L23/528 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Exemplary methods of forming a semiconductor structure may include etching a via through a semiconductor structure to expose a first circuit layer interconnect metal. The methods may include forming a layer of a material overlying the exposed first circuit layer interconnect metal. The methods may also include forming a barrier layer within the via having minimal coverage along the bottom of the via. The methods may additionally include forming a second circuit layer interconnect metal overlying the layer of material.

公开(公告)号：US09847252B2

公开(公告)日：2017-12-19

申请号：US15453675

申请日：2017-03-08

Applicant: APPLIED MATERIALS, INC.

Inventor： Bencherki Mebarki ,  Srinivas D. Nemani ,  Mehul Naik

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L23/528

CPC classification number: H01L21/76897 ,  H01L21/76834 ,  H01L21/76883

Abstract: A method of processing a substrate includes: depositing an etch stop layer atop a first dielectric layer; forming a feature in the etch stop layer and the first dielectric layer; depositing a first metal layer to fill the feature; etching the first metal layer to form a recess; depositing a second dielectric layer to fill the recess wherein the second dielectric layer is a low-k material suitable as a metal and oxygen diffusion barrier; forming a patterned mask layer atop the substrate to expose a portion of the second dielectric layer and the etch stop layer; etching the exposed portion of the second dielectric layer to a top surface of the first metal layer to form a via in the second dielectric layer; and depositing a second metal layer atop the substrate, wherein the second metal layer is connected to the first metal layer by the via.

公开(公告)号：US09748366B2

公开(公告)日：2017-08-29

申请号：US14491828

申请日：2014-09-19

Applicant: Applied Materials, Inc.

Inventor： Jong Mun Kim ,  Kenny L. Doan ,  Li Ling ,  Jairaj Payyapilly ,  Srinivas D. Nemani ,  Daisuke Shimizu ,  Yuju Huang

IPC: H01L21/31 ,  H01L29/66 ,  H01L21/311

CPC classification number: H01L29/66833 ,  H01L21/31116

Abstract: An article having alternating oxide layers and nitride layers is etched by an etch process. The etch process includes providing a first gas comprising C4F6H2 in a chamber of an etch reactor, ionizing the C4F6H2 containing gas to produce a plasma comprising a plurality of ions, and etching the article using the plurality of ions.

公开(公告)号：US09716005B1

公开(公告)日：2017-07-25

申请号：US15075046

申请日：2016-03-18

Applicant: APPLIED MATERIALS, INC.

Inventor： Ludovic Godet ,  Srinivas D. Nemani ,  Tobin Kaufman-Osborn

IPC: H01L21/02 ,  H01L21/027 ,  H01L21/285 ,  H01L21/263

CPC classification number: H01L21/263 ,  H01L21/0228 ,  H01L21/02315 ,  H01L21/0243 ,  H01L21/02639 ,  H01L21/0274 ,  H01L21/28556 ,  H01L21/3105 ,  H01L21/321

Abstract: Atomic layer deposition in selected zones of a workpiece surface is accomplished by transforming the surfaces outside the selected zones to a hydrophobic state while the materials in the selected zones remain hydrophilic.

公开(公告)号：US09698015B2

公开(公告)日：2017-07-04

申请号：US14505154

申请日：2014-10-02

Applicant: Applied Materials, Inc.

Inventor： Srinivas D. Nemani

IPC: H01L21/31 ,  H01L21/033

CPC classification number: H01L21/0337

Abstract: Embodiments of the present disclosure provide methods for patterning rectangular features with a sequence of lithography, atomic layer deposition (ALD) and etching. Embodiment of the present disclosure includes forming first line clusters along a first direction and second line clusters over the first line clusters in a direction traversing the first direction. The first and second line clusters both include core lines formed from a core material, spacers formed from first and second materials by ALD and etching. After formation of the first and second line clusters, rectangular openings can be formed by selectively etching one or two of the core material, the first material or the second material.

公开(公告)号：US20170154797A1

公开(公告)日：2017-06-01

申请号：US14989488

申请日：2016-01-06

Applicant: Applied Materials, Inc.

Inventor： Viachslav Babayan ,  Douglas A. Buchberger, JR. ,  Qiwei Liang ,  Ludovic Godet ,  Srinivas D. Nemani ,  Daniel J. Woodruff ,  Randy Harris ,  Robert B. Moore

IPC: H01L21/67 ,  G03F7/20

CPC classification number: G03F7/2035 ,  G03F7/168 ,  G03F7/26 ,  G03F7/38 ,  H01L21/68764

Abstract: Embodiments described herein relate to methods and apparatus for performing immersion field guided post exposure bake processes. Embodiments of apparatus described herein include a chamber body defining a processing volume. A pedestal may be disposed within the processing volume and a first electrode may be coupled to the pedestal. A moveable stem may extend through the chamber body opposite the pedestal and a second electrode may be coupled to the moveable stem. In certain embodiments, a fluid containment ring may be coupled to the pedestal and a dielectric containment ring may be coupled to the second electrode.

公开(公告)号：US20170096740A1

公开(公告)日：2017-04-06

申请号：US15383556

申请日：2016-12-19

Applicant: Applied Materials, Inc.

Inventor： Benjamin Schmiege ,  Nitin K. Ingle ,  Srinivas D. Nemani ,  Jeffrey W. Anthis ,  Xikun Wang ,  Jie Liu ,  David Benjaminson

IPC: C23F1/12 ,  H01J37/32

CPC classification number: C23F1/12 ,  C23F4/00 ,  C30B33/12 ,  H01J37/32009 ,  H01J2237/334

Abstract: Provided are methods for etching films comprising transition metals which help to minimize higher etch rates at the grain boundaries of polycrystalline materials. Certain methods pertain to amorphization of the polycrystalline material, other pertain to plasma treatments, and yet other pertain to the use of small doses of halide transfer agents in the etch process.

公开(公告)号：US20170092470A1

公开(公告)日：2017-03-30

申请号：US14867240

申请日：2015-09-28

Applicant: APPLIED MATERIALS, INC.

Inventor： Kartik Ramaswamy ,  Lawrence Wong ,  Steven Lane ,  Yang Yang ,  Srinivas D. Nemani ,  Praburam Gopalraja

IPC: H01J37/32

CPC classification number: H01J37/32449 ,  H01J37/32091 ,  H01J37/3211 ,  H01J37/32422 ,  H01J37/3244 ,  H01J2237/3323 ,  H01J2237/334

Abstract: A plasma source consisting of an array of plasma point sources that controls generation of charged particles and radicals spatially and temporally over a user defined region.

公开(公告)号：US09543163B2

公开(公告)日：2017-01-10

申请号：US14059416

申请日：2013-10-21

Applicant: Applied Materials, Inc.

Inventor： Mang-Mang Ling ,  Jungmin Ko ,  Sean S. Kang ,  Jeremiah T. Pender ,  Srinivas D. Nemani ,  Bradley Howard

IPC: H01L21/302 ,  H01L21/311 ,  H01L21/768

CPC classification number: H01L21/31116 ,  H01J2237/334 ,  H01L21/76802

Abstract: Methods for etching a material layer disposed on the substrate using a combination of a main etching step and a cyclical etching process are provided. The method includes performing a main etching process in a processing chamber to an oxide layer, forming a feature with a first predetermined depth in the oxide layer, performing a treatment process on the substrate by supplying a treatment gas mixture into the processing chamber to treat the etched feature in the oxide layer, performing a chemical etching process on the substrate by supplying a chemical etching gas mixture into the processing chamber, wherein the chemical etching gas includes at least an ammonium gas and a nitrogen trifluoride, wherein the chemical etching process further etches the feature to a second predetermined depth, and performing a transition process on the etched substrate by supplying a transition gas mixture into the processing chamber.

Abstract translation: 提供了使用主蚀刻步骤和循环蚀刻工艺的组合蚀刻设置在基板上的材料层的方法。 该方法包括在处理室中对氧化物层进行主蚀刻处理，在氧化物层中形成具有第一预定深度的特征，通过将处理气体混合物供应到处理室中来对衬底进行处理，以处理 在所述氧化物层中蚀刻特征，通过向所述处理室中提供化学蚀刻气体混合物，在所述基板上进行化学蚀刻处理，其中所述化学蚀刻气体至少包含铵气体和三氟化氮，其中所述化学蚀刻工艺进一步蚀刻 将特征提供到第二预定深度，并且通过将过渡气体混合物供应到处理室中来对蚀刻的基板执行转变处理。

公开(公告)号：US09508561B2

公开(公告)日：2016-11-29

申请号：US14276879

申请日：2014-05-13

Applicant: Applied Materials, Inc.

Inventor： Mehul B. Naik ,  Srinivas D. Nemani ,  Takehito Koshizawa ,  He Ren

IPC: H01L21/02 ,  H01L21/768 ,  H01L21/3213 ,  H01L21/67 ,  H01J37/32

CPC classification number: H01L21/32136 ,  H01J37/321 ,  H01J37/32357 ,  H01J37/3244 ,  H01L21/02071 ,  H01L21/02274 ,  H01L21/32139 ,  H01L21/67184 ,  H01L21/67207 ,  H01L21/76834 ,  H01L21/7685 ,  H01L21/76885

Abstract: Embodiments of the present invention provide methods for forming an interconnection structure in semiconductor devices without breaking vacuum with minimum oxidation/atmosphere exposure. In one embodiment, a method for forming an interconnection structure for semiconductor devices includes supplying a barrier layer etching gas mixture into a first processing chamber having a substrate disposed therein to etch portions of a barrier layer exposed by a patterned metal layer until the underlying substrate is exposed, the first processing chamber disposed in a processing system, and forming a liner layer on the substrate covering the etched barrier layer in a second processing chamber disposed in the processing system.

Abstract translation: 本发明的实施例提供了在半导体器件中形成互连结构而不破坏最小氧化/大气暴露的真空的方法。 在一个实施例中，用于形成用于半导体器件的互连结构的方法包括将阻挡层蚀刻气体混合物供应到具有设置在其中的衬底的第一处理室中，以蚀刻由图案化金属层暴露的阻挡层的部分，直到下面的衬底为 暴露的第一处理室，设置在处理系统中，并且在布置在处理系统中的第二处理室中，在覆盖蚀刻的阻挡层的基板上形成衬垫层。