公开(公告)号：US20010032388A1

公开(公告)日：2001-10-25

申请号：US09885851

申请日：2001-06-20

Inventor： Terrel L. Morris

IPC: H01K003/10 ,  B23B039/00 ,  H05K003/02

CPC classification number: H05K3/3421 ,  H05K1/112 ,  H05K3/429 ,  H05K3/4623 ,  H05K2201/09472 ,  H05K2201/09536 ,  H05K2201/09845 ,  H05K2201/10704 ,  H05K2203/0455 ,  Y02P70/613 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: The present invention relates to the production of an improved via for attaching electrical connection pins to printed circuit boards. The inventive via provides a connection having robust mechanical attachment and minimal capacitance effects. The via provides a wide diameter for accepting an electrical connection pin and a reduced diameter along other portions of the length of the via for reduced capacitance and reduced electrical discontinuity.

Abstract translation: 本发明涉及一种用于将电连接引脚连接到印刷电路板的改进的通孔的制造。 本发明的通孔提供具有坚固的机械附接和最小的电容效应的连接。 通孔提供宽直径，用于接受电连接销，并且沿着通孔长度的其他部分减小直径，以减小电容量并减小电气不连续性。

公开(公告)号：US06304450B1

公开(公告)日：2001-10-16

申请号：US09353428

申请日：1999-07-15

Applicant: Joseph Ted Dibene, II ,  David Hartke

Inventor： Joseph Ted Dibene, II ,  David Hartke

IPC: H05K720

CPC classification number: H05K7/20509 ,  G06F1/18 ,  G06F1/182 ,  G06F1/189 ,  H01L2924/15192 ,  H05K1/0206 ,  H05K1/0263 ,  H05K1/141 ,  H05K1/144 ,  H05K3/368 ,  H05K2201/10325 ,  H05K2201/10598 ,  H05K2201/10704 ,  H05K2201/10734

Abstract: An encapsulated circuit assembly and a method for making an encapsulated circuit assembly are disclosed. The assembly comprises a first printed circuit board, a second printed circuit board, and a heat transfer device. The second printed circuit board comprises a heatsink, and the heat transfer device couples between a device mounted on the first printed circuit board and the second printed circuit board for transferring heat from the device to the heatsink of the second printed circuit board.

公开(公告)号：US06271480B1

公开(公告)日：2001-08-07

申请号：US09073854

申请日：1998-05-07

Applicant: Yukio Yamaguti ,  Hironobu Ikeda

Inventor： Yukio Yamaguti ,  Hironobu Ikeda

IPC: H01L2348

CPC classification number: H05K3/303 ,  H01L23/32 ,  H01L2924/0002 ,  H05K1/181 ,  H05K3/308 ,  H05K3/3415 ,  H05K3/3421 ,  H05K2201/10545 ,  H05K2201/10659 ,  H05K2201/10704 ,  H05K2203/167 ,  Y02P70/613 ,  Y10T29/53174 ,  H01L2924/00

Abstract: The electronic device is provide that includes a body having an underside; a plurality of conducting members for transferring electronic signals; and at least two alignment pins mounted perpendicularly on the underside. Each of the alignment pins has a flexible portion that is more easily bendable than the other portions.

Abstract translation: 该电子装置的设置包括具有下侧的主体; 用于传送电子信号的多个导电构件; 以及垂直安装在下侧上的至少两个对准销。 每个对准销具有比其他部分更容易弯曲的柔性部分。

公开(公告)号：US20010001889A1

公开(公告)日：2001-05-31

申请号：US09754714

申请日：2001-01-04

Applicant: Intel Corporation.

Inventor： Cheryl M. Waldron-Floyde ,  Brad C. Irwin

IPC: B23K031/02 ,  B23K037/00

CPC classification number: H05K13/0465 ,  H05K3/303 ,  H05K2201/10318 ,  H05K2201/10424 ,  H05K2201/10704 ,  H05K2203/0278 ,  H05K2203/167 ,  Y02P70/613 ,  Y10T29/49149 ,  Y10T29/53978

Abstract: An alignment weight is provided. The alignment weight includes a body of material having first and second opposing surfaces. A number of depressions are formed in the first surface. The depressions receive pins of a floating pin field when placed on a floating pin field during connection of the floating pin field to a printed circuit board.

公开(公告)号：US06206272B1

公开(公告)日：2001-03-27

申请号：US09288486

申请日：1999-04-08

Applicant: Cheryl M. Waldron-Floyde ,  Brad C. Irwin

Inventor： Cheryl M. Waldron-Floyde ,  Brad C. Irwin

IPC: B23Q128

CPC classification number: H05K13/0465 ,  H05K3/303 ,  H05K2201/10318 ,  H05K2201/10424 ,  H05K2201/10704 ,  H05K2203/0278 ,  H05K2203/167 ,  Y02P70/613 ,  Y10T29/49149 ,  Y10T29/53978

Abstract: An alignment weight is provided. The alignment weight includes a body of material having first and second opposing surfaces. A number of depressions are formed in the first surface. The depressions receive pins of a floating pin field when placed on a floating pin field during connection of the floating pin field to a printed circuit board.

Abstract translation: 提供了对准重量。 对准重量包括具有第一和第二相对表面的材料体。 在第一表面形成多个凹陷。 当将浮动引脚字段连接到印刷电路板时，凹陷接收浮置引脚的引脚。

公开(公告)号：US6122695A

公开(公告)日：2000-09-19

申请号：US25722

申请日：1998-02-18

Applicant: Jeffrey J. Cronin

Inventor： Jeffrey J. Cronin

IPC: G06F13/40 ,  H05K1/02 ,  H05K1/14 ,  H05K7/14 ,  G06F13/38

CPC classification number: H05K1/0246 ,  G06F13/4086 ,  H05K7/1431 ,  H05K1/0231 ,  H05K1/14 ,  H05K1/141 ,  H05K1/142 ,  H05K2201/044 ,  H05K2201/10022 ,  H05K2201/10325 ,  H05K2201/10704

Abstract: A device for terminating a bus configured to have one or more processors coupled thereto. The device comprises a support member having a termination circuit which is coupled to a conductor of the bus when the support member is coupled to the bus. In one embodiment, the support member is coupled between the bus and the processor. In another embodiment, the support member is connected to the bus separately from the processor. The support member may include an auxiliary circuit in addition to the termination circuit which may be used to correct, supply, or update signals transmitted on the bus.

Abstract translation: 一种用于终止被配置为具有与其耦合的一个或多个处理器的总线的设备。 该装置包括支撑构件，该支撑构件具有当支撑构件联接到总线时耦合到总线的导体的终端电路。 在一个实施例中，支撑构件耦合在总线和处理器之间。 在另一个实施例中，支撑构件与处理器分开连接到总线。 除了可用于校正，提供或更新在总线上发送的信号的终端电路之外，支持构件可以包括辅助电路。

公开(公告)号：US6018465A

公开(公告)日：2000-01-25

申请号：US777251

申请日：1996-12-31

Applicant: Shekhar Yeshwant Borkar ,  Robert S. Dreyer ,  Hans Mulder ,  Naomi Obinata ,  Calvin E. Wells

Inventor： Shekhar Yeshwant Borkar ,  Robert S. Dreyer ,  Hans Mulder ,  Naomi Obinata ,  Calvin E. Wells

IPC: G06F1/18 ,  H01L23/40 ,  H05K1/02 ,  H05K7/20

CPC classification number: H05K1/0263 ,  G06F1/183 ,  H01L23/4006 ,  H01L2023/4087 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/15174 ,  H05K2201/10272 ,  H05K2201/10424 ,  H05K2201/10492 ,  H05K2201/10704 ,  H05K2201/10734

Abstract: An apparatus is provided for mounting a Very Large Scale Integration (VLSI) chip such as a microprocessor on the back plane of a computer chassis. In one embodiment, the mounting on the computer chassis is configured to provide a current supply connection for delivering a high level of current to the microprocessor from a current source through the computer chassis. Also provided is an apparatus for mounting a VLSI chip such as a microprocessor on the chassis of a computer system in order to dissipate heat from the VLSI chip to the ambient outside the computer system through the computer chassis. Also provided is an apparatus for signal interconnections among one or several VLSI chips such as microprocessors mounted on the chassis of a computer to provide signal capacity with strong integrity. Also provided is an apparatus for mounting a power supply for a VLSI chip package on the back chassis of a computer.

Abstract translation: 提供了一种用于在计算机机箱的背面上安装诸如微处理器的超大规模集成（VLSI）芯片的装置。 在一个实施例中，计算机机箱上的安装被配置为提供电流供应连接，用于通过计算机机箱从当前源将高电平的电流传送到微处理器。 还提供了一种用于将诸如微处理器的VLSI芯片安装在计算机系统的底盘上的装置，以便通过计算机机箱从VLSI芯片散发到计算机系统外部的环境。 还提供了一种用于一个或多个VLSI芯片之间的信号互连的装置，例如安装在计算机的机架上的微处理器，以提供具有强烈完整性的信号容量。 还提供了一种用于在计算机的后机箱上安装用于VLSI芯片封装的电源的装置。

公开(公告)号：US5743009A

公开(公告)日：1998-04-28

申请号：US627459

申请日：1996-04-04

Applicant: Kiyoshi Matsui ,  Takayuki Ono ,  Kenichi Kasai ,  Tsutomu Imai ,  Morio Suzuki ,  Hideyuki Fukasawa ,  Mitugu Shirai ,  Toshitaka Murakawa ,  Takeji Siokawa ,  Takeshi Kuroda

Inventor： Kiyoshi Matsui ,  Takayuki Ono ,  Kenichi Kasai ,  Tsutomu Imai ,  Morio Suzuki ,  Hideyuki Fukasawa ,  Mitugu Shirai ,  Toshitaka Murakawa ,  Takeji Siokawa ,  Takeshi Kuroda

IPC: H01R12/04 ,  H01R43/02 ,  H05K3/30 ,  H05K7/10 ,  H01R9/06

CPC classification number: H05K3/303 ,  H01R43/0256 ,  H05K7/1084 ,  H05K2201/09472 ,  H05K2201/10704 ,  H05K2203/0195 ,  H05K2203/167 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49149

Abstract: Ends of contact pins are inserted into bottomed connection holes which are in desired positions on a printed board, so that the contact pins are arrayed in the desired form. By effecting solder reflow in this state, the contact pins are fixedly soldered to the connection holes. A multi-pin connector is thus provided, which can be manufactured with ease in a short period of time and which can have any pitch, any number of pins and any shape.

Abstract translation: 接触针的端部插入到印刷电路板上所需位置的有底连接孔中，使得接触针以期望的形式排列。 通过在该状态下进行焊料回流，接触​​销固定地焊接到连接孔。 因此提供了一种多针连接器，其可以在短时间内容易地制造，并且可以具有任何间距，任意数量的销和任何形状。

公开(公告)号：US5712768A

公开(公告)日：1998-01-27

申请号：US548674

申请日：1995-10-26

Applicant: William E. Werther

Inventor： William E. Werther

IPC: H05K1/02 ,  H05K1/14 ,  H05K3/34 ,  H05K3/36 ,  H05K7/10 ,  H01R23/68 ,  H05K1/11

CPC classification number: H05K1/141 ,  H05K3/3415 ,  H05K7/1084 ,  H05K7/1092 ,  H05K1/0262 ,  H05K2201/049 ,  H05K2201/10196 ,  H05K2201/10318 ,  H05K2201/10325 ,  H05K2201/10424 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2203/1476 ,  H05K2203/1572 ,  H05K3/3421 ,  H05K3/3447 ,  H05K3/368 ,  Y02P70/613 ,  Y10T29/49144 ,  Y10T29/49149

Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.

公开(公告)号：US5659953A

公开(公告)日：1997-08-26

申请号：US464384

申请日：1995-06-05

Applicant: Stanford W. Crane, Jr. ,  Maria M. Portuondo

Inventor： Stanford W. Crane, Jr. ,  Maria M. Portuondo

IPC: H05K1/18 ,  H01L23/498 ,  H05K1/11 ,  H05K3/30 ,  H05K3/32 ,  H05K3/34 ,  H05K3/46 ,  H01R9/00 ,  H05K3/00

CPC classification number: H01L23/49861 ,  H01L23/49811 ,  H05K1/112 ,  H05K3/308 ,  H05K3/3421 ,  H05K3/4623 ,  H01L2924/0002 ,  H05K2201/09472 ,  H05K2201/09536 ,  H05K2201/09645 ,  H05K2201/10189 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10704 ,  H05K2201/10772 ,  H05K2201/10893 ,  H05K3/321 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149

Abstract: An apparatus comprising a multi-layer substrate including a plurality of layers of insulative material, at least one well formed in at least one of the layers, the well extending from an outer surface of the multi-layer substrate to an inner surface of the multi-layer substrate, and an electrically conductive component formed within the well on the inner surface of the multi-layer substrate; and a device having at least one electrically conductive lead or wire extending into the well and being in direct physical contact with the electrically conductive component formed on the inner surface of the multi-layer substrate. Also, a method of manufacturing an apparatus comprising the steps of forming a multi-layer substrate including a plurality of layers of insulative material, at least one well formed in at least one of the layers, the well extending from an outer surface of the multi-layer substrate to an inner surface of the multi-layer substrate, and an electrically conductive component formed within the well on the inner surface of the multi-layer substrate; and extending at least one electrically conductive lead or wire from a device into the well such that the lead or wire is in direct physical contact with the electrically conductive component formed on the inner surface of the multi-layer substrate.

Abstract translation: 一种包括多层衬底的装置，所述多层衬底包括多层绝缘材料，至少一个阱形成在至少一层中，所述阱从所述多层衬底的外表面延伸到所述多层衬底的内表面 以及在所述多层基板的内表面上的所述阱内形成的导电部件; 以及具有延伸到阱中的至少一个导电引线或导线并与形成在多层基板的内表面上的导电部件直接物理接触的器件。 另外，制造装置的方法包括以下步骤：形成包括多层绝缘材料的多层基板，至少一层形成在至少一层中的阱，所述阱从所述多层的外表面延伸 在多层基板的内表面上形成有在多层基板的内表面上的导电部件， 并且将至少一个导电引线或线从器件延伸到阱中，使得引线或引线与形成在多层衬底的内表面上的导电部件直接物理接触。