公开(公告)号：US07250684B2

公开(公告)日：2007-07-31

申请号：US10881741

申请日：2004-06-30

Applicant: Robert Nickerson ,  Brian Taggart ,  Hai Ding

Inventor： Robert Nickerson ,  Brian Taggart ,  Hai Ding

IPC: H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC classification number: B23K20/004 ,  B23K2101/42 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5386 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49052 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/4943 ,  H01L2224/85205 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  Y10T428/249921 ,  Y10T428/26 ,  H01L2224/78 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A wire-bonding substrate includes a curvilinear wire-bond pad. The curvilinear wire-bond pad is used in reverse wire bonding to couple a die with the substrate. A curvilinear wire-bond pad is also disclosed that is located directly above the via in the substrate. A wire-bonding substrate includes a first wire-bond pad and a first via that is disposed directly below the first wire-bond pad in the wire-bonding substrate. A package is includes a chip stack with a total die-side characteristic dimension, and a total substrate-side characteristic dimension that is smaller than the total die-side characteristic dimension. A computing system includes the curvilinear wire-bond pad.

Abstract translation: 引线键合衬底包括曲线性引线键合焊盘。 曲线引线接合焊盘用于反向引线接合以将管芯与衬底耦合。 还公开了一种曲线形接合焊盘，其位于衬底中的通孔正上方。 引线键合衬底包括第一引线接合焊盘和布线键合衬底中的第一引线接合焊盘正下方的第一通孔。 封装包括具有总模侧特性尺寸的芯片堆叠，以及小于总模侧特征尺寸的总基板侧特征尺寸。 一种计算系统包括曲线性的接线焊盘。

公开(公告)号：US20070126094A1

公开(公告)日：2007-06-07

申请号：US11292705

申请日：2005-12-01

Applicant: Saeed Shojaie ,  Brian Taggart ,  Dale Hackitt

Inventor： Saeed Shojaie ,  Brian Taggart ,  Dale Hackitt

IPC: H01L23/495

CPC classification number: H01L23/3107 ,  H01L21/568 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method of forming a leadframe package, a leadframe package formed according to the method, and a system incorporating the leadframe package. The leadframe package includes: a metallization layer comprising a paddle portion and a contact portion including contact leads; a die mounted onto the paddle portion; wirebonds connected between the die and respective ones of the contact leads; an overmold encapsulating the die, the paddle portion, the contact leads and the wirebonds; and a stiffening element encapsulated in the overmold and unconnected to electrical pathways within the leadframe package.

Abstract translation: 一种形成引线框封装的方法，根据该方法形成的引线框封装以及结合引线框封装的系统。 引线框封装包括：金属化层，其包括桨状部分和包括接触引线的接触部分; 安装在所述桨部上的模具; 连接在管芯和相应的接触引线之间的引线; 封装模具，桨形部分，接触引线和引线键的包覆模制; 以及封装在包覆模制中且与引线框封装内的电路不连接的加强元件。

公开(公告)号：US07190068B2

公开(公告)日：2007-03-13

申请号：US10877586

申请日：2004-06-25

Applicant: Dale Hackitt ,  Robert Nickerson ,  Brian Taggart

Inventor： Dale Hackitt ,  Robert Nickerson ,  Brian Taggart

IPC: H01L23/10 ,  H01L23/34 ,  H01L21/50

CPC classification number: H01L25/0657 ,  H01L23/367 ,  H01L23/4334 ,  H01L24/48 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Embodiments of the invention provide a microelectronic device having a heat spreader positioned between a chip and substrate to which the chip is electrically connected. For one embodiment of the invention, the heat spreader is a thermal slug having a coefficient of thermal expansion approximately equal to the coefficient of thermal expansion of the chip.

Abstract translation: 本发明的实施例提供了一种微电子器件，其具有位于芯片与芯片电连接的芯片和衬底之间的散热器。 对于本发明的一个实施例，散热器是具有近似等于芯片的热膨胀系数的热膨胀系数的热塞。

公开(公告)号：US20060091508A1

公开(公告)日：2006-05-04

申请号：US10977908

申请日：2004-10-28

Applicant: Brian Taggart ,  Robert Nickerson ,  Ronald Spreitzer

Inventor： Brian Taggart ,  Robert Nickerson ,  Ronald Spreitzer

IPC: H01L23/02

CPC classification number: H01L23/50 ,  H01L23/5387 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06579 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01077 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A device includes a folded flex substrate. A memory die is connected to a first side of the folded flex substrate. A logic die is connected to a second side of the folded flex substrate. A trace routing pattern of source voltage signals is identical to a trace routing pattern of collector voltage signals.

Abstract translation: 一种装置包括折叠的柔性基底。 存储芯片连接到折叠的柔性基板的第一侧。 逻辑裸片连接到折叠的柔性基板的第二侧。 源电压信号的跟踪路由模式与集电极电压信号的跟踪路由模式相同。

公开(公告)号：US20060077644A1

公开(公告)日：2006-04-13

申请号：US10964790

申请日：2004-10-13

Applicant: Robert Nickerson ,  Ronald Spreitzer ,  John Conner ,  Brian Taggart

Inventor： Robert Nickerson ,  Ronald Spreitzer ,  John Conner ,  Brian Taggart

IPC: H05K7/06

CPC classification number: H01L23/5387 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06579 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/141 ,  H05K1/147 ,  H05K1/189 ,  H05K7/1061 ,  H05K2201/056 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49144 ,  Y10T29/49146 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In one embodiment, a package-to-package stack is assembled comprising a first integrated circuit package, and a second integrated circuit package which are mechanically and electrically connected using an interposer and a substrate folded around the interposer. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，组装包装堆叠包括第一集成电路封装和第二集成电路封装，所述第一集成电路封装使用中介层和围绕插入件折叠的衬底机械地和电连接。 描述和要求保护其他实施例。

公开(公告)号：US20050230850A1

公开(公告)日：2005-10-20

申请号：US10829039

申请日：2004-04-20

Applicant: Brian Taggart ,  Robert Nickerson ,  Ronald Spreitzer

Inventor： Brian Taggart ,  Robert Nickerson ,  Ronald Spreitzer

IPC: H01L23/48 ,  H01L23/498 ,  H01L23/52

CPC classification number: H01L24/49 ,  H01L23/49833 ,  H01L23/52 ,  H01L24/06 ,  H01L24/48 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/4911 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A microelectronic assembly is provided, having redistribution conductors that are formed over a microelectronic die of the assembly instead of through a substrate to which the microelectronic die is mounted. A redistribution conductor is formed by a pair of contacts on the die and a conductive portion connecting the contacts to one another. A wirebonding wire is attached to each contact. One of the wirebonding wires may be used to connect to a terminal on the substrate, a terminal on another die, or to another contact on the same die.

Abstract translation: 提供了一种微电子组件，其具有形成在组件的微电子管芯上的再分布导体，而不是通过安装微电子管芯的衬底。 再分配导体由芯片上的一对触点和将触点彼此连接的导电部分形成。 每个触点附着有引线键合线。 引线接合线之一可以用于连接到基板上的端子，在另一个管芯上的端子，或者连接到同一管芯上的另一接触件。