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150 条记录 (耗时 0.033 秒)

    Interposer and manufacturing method thereof
    24.
    发明授权
    Interposer and manufacturing method thereof 有权
    插件及其制造方法

    公开(公告)号：US08692284B2

    公开(公告)日：2014-04-08

    申请号：US13484140

    申请日：2012-05-30

    申请人： Ying-Nan Wen ,  Chien-Hung Liu ,  Wei-Chung Yang

    发明人： Ying-Nan Wen ,  Chien-Hung Liu ,  Wei-Chung Yang

    IPC分类号： H01L29/72

    CPC分类号： H05K3/185 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/1461 ,  H01L2924/181 ,  H05K1/115 ,  H05K3/0023 ,  H05K3/426 ,  H05K2201/10378 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

    摘要： An embodiment of the present invention provides a manufacturing method of an interposer including: providing a semiconductor substrate having a first surface, a second surface and at least a through hole connecting the first surface to the second surface; electrocoating a polymer layer on the first surface, the second surface and an inner wall of the through hole; and forming a wiring layer on the electrocoating polymer layer, wherein the wiring layer extends from the first surface to the second surface via the inner wall of the through hole. Another embodiment of the present invention provides an interposer.

    摘要翻译： 本发明的一个实施例提供了一种内插器的制造方法，包括：提供具有第一表面，第二表面和至少连接第一表面与第二表面的通孔的半导体衬底; 在第一表面，第二表面和通孔的内壁上电聚合聚合物层; 以及在所述电涂层聚合物层上形成布线层，其中所述布线层经由所述通孔的内壁从所述第一表面延伸到所述第二表面。 本发明的另一实施例提供一种插入器。

    Package structure and method for making the same
    25.
    发明授权
    Package structure and method for making the same 有权
    包装结构和制作方法

    公开(公告)号：US08624351B2

    公开(公告)日：2014-01-07

    申请号：US13117151

    申请日：2011-05-27

    申请人： Chien-Hung Liu ,  Shu-Ming Chang

    发明人： Chien-Hung Liu ,  Shu-Ming Chang

    IPC分类号： H01L29/02 ,  H01L21/78

    CPC分类号： H01L21/6835 ,  H01L2221/68331 ,  H01L2221/68345 ,  H01L2224/11

    摘要： A package structure which includes a non-conductive substrate, a conductive element, a passivation, a jointed side, a conductive layer, a solder and a solder mask is disclosed. The conductive element is disposed on a surface of the non-conductive substrate and consists of a passive element and a corresponding circuit. The passivation completely covers the conductive element and the non-conductive substrate so that the conductive element is sandwiched between the passivation and the non-conductive substrate. The conductive layer covers the jointed side which exposes part of the corresponding circuit, extends beyond the jointed side and is electrically connected to the corresponding circuit. The solder mask which completely covers the jointed side and the conductive layer selectively exposes the solder which is disposed outside the jointed side and electrically connected to the conductive layer.

    摘要翻译： 公开了一种包括非导电衬底，导电元件，钝化层，接合侧，导电层，焊料和焊料掩模的封装结构。 导电元件设置在非导电衬底的表面上，由无源元件和相应的电路构成。 钝化完全覆盖导电元件和非导电衬底，使得导电元件夹在钝化层和非导电衬底之间。 导电层覆盖接合侧，露出相应电路的一部分，延伸超过接合侧并与相应的电路电连接。 完全覆盖接合侧的焊料掩模和导电层选择性地暴露设置在接合侧外侧并与导电层电连接的焊料。

    Manufacturing-process equipment
    26.
    发明授权
    Manufacturing-process equipment 失效
    制造加工设备

    公开(公告)号：US08575791B2

    公开(公告)日：2013-11-05

    申请号：US12971466

    申请日：2010-12-17

    申请人： Wen-Yuh Jywe ,  Jing-Chung Shen ,  Chin-Tien Yang ,  Chien-Hung Liu ,  Jau-Jiu Ju ,  Chia-Hung Wu ,  Chun-Chieh Huang ,  Lili Duan ,  Yuan-Chin Lee

    发明人： Wen-Yuh Jywe ,  Jing-Chung Shen ,  Chin-Tien Yang ,  Chien-Hung Liu ,  Jau-Jiu Ju ,  Chia-Hung Wu ,  Chun-Chieh Huang ,  Lili Duan ,  Yuan-Chin Lee

    IPC分类号： G01B11/02 ,  H02K41/02

    CPC分类号： B23K26/0853

    摘要： A manufacturing-process equipment has a platform assembly, a measurement feedback assembly and a laser-working assembly. The platform assembly has a base and a hybrid-moving platform. The base has a mounting frame. The hybrid-moving platform is mounted on the base and has a long-stroke moving stage and a piezo-driven micro-stage. The long-stroke moving stage has a benchmark set and a driving device. The piezo-driven micro-stage is connected to the long-stroke moving stage and has a working platform. The measurement feedback assembly is securely mounted on the platform assembly and has a laser interferometer, a reflecting device and a signal-receiving device. The laser-working assembly is mounted on the platform assembly, is electrically connected to the measurement feedback assembly and has a laser direct-writing head, a controlling interface device and a positioning interface device.

    摘要翻译： 制造过程设备具有平台组件，测量反馈组件和激光加工组件。 平台组件具有基座和混合动力平台。 底座有一个安装架。 混合动力平台安装在基座上，具有长行程移动台和压电驱动微型平台。 长冲程移动台具有基准组和驱动装置。 压电驱动微型平台连接到长行程移动台，并具有工作平台。 测量反馈组件牢固地安装在平台组件上，并具有激光干涉仪，反射装置和信号接收装置。 激光加工组件安装在平台组件上，电连接到测量反馈组件，并具有激光直写头，控制接口装置和定位接口装置。

    CHIP PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
    27.
    发明申请
    CHIP PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME 有权
    芯片包装结构及其形成方法

    公开(公告)号：US20130020693A1

    公开(公告)日：2013-01-24

    申请号：US13548663

    申请日：2012-07-13

    申请人： Ho-Yin Yiu ,  Chien-Hung Liu ,  Tsang-Yu Liu ,  Ying-Nan Wen ,  Yen-Shih Ho

    发明人： Ho-Yin Yiu ,  Chien-Hung Liu ,  Tsang-Yu Liu ,  Ying-Nan Wen ,  Yen-Shih Ho

    IPC分类号： H01L29/02 ,  H01L21/50 ,  H01L21/02

    CPC分类号： B81B3/0051 ,  B81B2201/025 ,  H01L27/14618 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A chip package structure and a method for forming the chip package structure are disclosed. At least a block is formed on a surface of a cover, the cover is mounted on a substrate having a sensing device formed thereon for covering the sensing device, and the block is disposed between the cover and the sensing device. In the present invention, the block is mounted on the cover, there is no need to etch the cover to form a protruding portion, and thus the method of the present invention is simple and has low cost.

    摘要翻译： 公开了一种用于形成芯片封装结构的芯片封装结构和方法。 至少一个块形成在盖的表面上，盖安装在其上形成有感测装置的基板上，用于覆盖感测装置，并且该块设置在盖和感测装置之间。 在本发明中，该块安装在盖上，不需要蚀刻盖以形成突出部分，因此本发明的方法简单且成本低。

    Electronic device wafer level scale packages and fabrication methods thereof
    28.
    发明授权
    Electronic device wafer level scale packages and fabrication methods thereof 有权
    电子装置晶圆级规包装及其制造方法

    公开(公告)号：US08309398B2

    公开(公告)日：2012-11-13

    申请号：US13152891

    申请日：2011-06-03

    申请人： Chien-Hung Liu ,  Sih-Dian Lee

    发明人： Chien-Hung Liu ,  Sih-Dian Lee

    IPC分类号： H01L21/00 ,  H01L21/78

    CPC分类号： H01L31/0203 ,  H01L23/3114 ,  H01L24/05 ,  H01L24/13 ,  H01L24/97 ,  H01L27/14618 ,  H01L27/14687 ,  H01L29/0657 ,  H01L2224/0401 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/00

    摘要： Electronic device wafer level scale packages and fabrication methods thereof. A semiconductor wafer with a plurality of electronic devices formed thereon is provided. The semiconductor wafer is bonded with a supporting substrate. The back of the semiconductor substrate is thinned. A first trench is formed by etching the semiconductor exposing an inter-layered dielectric layer. An insulating layer is conformably deposited on the back of the semiconductor substrate. The insulating layer on the bottom of the first trench is removed to create a second trench. The insulating layer and the ILD layer are sequentially removed exposing part of a pair of contact pads. A conductive layer is conformably formed on the back of the semiconductor. After the conductive layer is patterned, the conductive layer and the contact pads construct an S-shaped connection. Next, an exterior connection and terminal contact pads are subsequently formed.

    摘要翻译： 电子装置晶圆级规包装及其制造方法。 提供了形成有多个电子器件的半导体晶片。 半导体晶片与支撑基板结合。 半导体衬底的背面变薄。 通过蚀刻暴露层间电介质层的半导体形成第一沟槽。 绝缘层顺应地沉积在半导体衬底的背面上。 去除第一沟槽底部的绝缘层以产生第二沟槽。 依次去除绝缘层和ILD层，暴露一对接触焊盘的一部分。 导电层顺应地形成在半导体的背面上。 导电层被图案化之后，导电层和接触垫构成S形连接。 接下来，随后形成外部连接和端子接触焊盘。

    Printed circuit board
    29.
    发明授权
    Printed circuit board 有权
    印刷电路板

    公开(公告)号：US08203082B2

    公开(公告)日：2012-06-19

    申请号：US12272797

    申请日：2008-11-18

    申请人： Yu-Chang Pai ,  Shou-Kuo Hsu ,  Chien-Hung Liu ,  Ying-Tso Lai

    发明人： Yu-Chang Pai ,  Shou-Kuo Hsu ,  Chien-Hung Liu ,  Ying-Tso Lai

    IPC分类号： H05K1/11

    CPC分类号： H05K1/116 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/165 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/09281 ,  H05K2201/09636

    摘要： A printed circuit board includes a first layout layer, a second layout layer, a copper foil layer, a first via and a second via. The first layout layer has a first signal line and a second signal line, each of which has a curved first portion. The second layout layer has a third signal line and a fourth signal line, each of which also has a curved first portion. The curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line are coupled to the first via and the second via. In this case, the curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line cooperatively generate spiral inductance characteristic.

    摘要翻译： 印刷电路板包括第一布局层，第二布局层，铜箔层，第一通孔和第二通孔。 第一布局层具有第一信号线和第二信号线，每条信号线都具有弯曲的第一部分。 第二布局层具有第三信号线和第四信号线，每条信号线还具有弯曲的第一部分。 第一信号线，第二信号线，第三信号线和第四信号线的弯曲的第一部分耦合到第一通孔和第二通孔。 在这种情况下，第一信号线，第二信号线，第三信号线和第四信号线的弯曲的第一部分协同地产生螺旋电感特性。

    ENCLOSURE OF ELECTRONIC DEVICE
    30.
    发明申请
    ENCLOSURE OF ELECTRONIC DEVICE 失效
    电子设备外壳

    公开(公告)号：US20110299263A1

    公开(公告)日：2011-12-08

    申请号：US12855903

    申请日：2010-08-13

    申请人： Yu-Chang Pai ,  Po-Chuan Hsieh ,  Chien-Hung Liu ,  Shou-Kuo Hsu

    发明人： Yu-Chang Pai ,  Po-Chuan Hsieh ,  Chien-Hung Liu ,  Shou-Kuo Hsu

    IPC分类号： H05K9/00

    CPC分类号： H05K9/0041

    摘要： An enclosure includes a plate. The plate defines a number of through holes. A hollow shield extends from the edges bounding each through hole. A top side of the shield opposite to the plate is smaller than a bottom side of the shield which is connected to the edges of the through hole. The enclosure can better shield electromagnetic interference (EMI) from the electronic device.

    摘要翻译： 外壳包括一个板。 该板限定了多个通孔。 中空的护罩从每个通孔的边缘延伸。 屏蔽件与板的相对的顶侧小于屏蔽件的底部侧，该底部侧连接到通孔的边缘。 外壳可以更好地屏蔽电子设备的电磁干扰（EMI）。