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    Semiconductor device embedded with pressure sensor and manufacturing method thereof
    21.
    发明申请
    Semiconductor device embedded with pressure sensor and manufacturing method thereof 有权

    公开(公告)号：US20070262401A1

    公开(公告)日：2007-11-15

    申请号：US11878243

    申请日：2007-07-23

    申请人： Natsuki Yokoyama ,  Shuntaro Machida ,  Yasushi Goto

    发明人： Natsuki Yokoyama ,  Shuntaro Machida ,  Yasushi Goto

    IPC分类号： H01L29/84

    CPC分类号： G01L9/0073

    摘要： The method for promoting the size reduction, the performance improvement and the reliability improvement of a semiconductor device embedded with pressure sensor is provided. In a semiconductor device embedded with pressure sensor, a part of an uppermost wiring is used as a lower electrode of a pressure detecting unit. A part of a silicon oxide film formed on the lower electrode is a cavity. On a tungsten silicide film formed on the silicon oxide film, a silicon nitride film is formed. The silicon nitride film has a function to fill a hole or holes and suppress immersion of moisture from outside to the semiconductor device embedded with pressure sensor. A laminated film of the silicon nitride film and the tungsten silicide film forms a diaphragm of the pressure sensor.

    Device and method of manufacturing the same
    22.
    发明申请
    Device and method of manufacturing the same 审中-公开
    装置及其制造方法

    公开(公告)号：US20070102831A1

    公开(公告)日：2007-05-10

    申请号：US10583862

    申请日：2003-12-24

    申请人： Shuntaro Machida ,  Natsuki Yokoyama ,  Yasushi Goto

    发明人： Shuntaro Machida ,  Natsuki Yokoyama ,  Yasushi Goto

    IPC分类号： H01L21/66 ,  H01L23/28

    CPC分类号： H01L21/78 ,  H01L2224/48091 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/00014 ,  H01L2924/00

    摘要： The present invention has a object to enhance the yield and facilitate bonding in a device provided with micro-mechanical elements formed by a MEMS technique. According to the inveniton, when a first wafer having a plurality of areas in which micro-mechanical elements and pads are formed and a second wafer in which an aperture is formed are to be glued together, the aperture is shared by the pads in the plurality of areas. This makes it possible for individual chips, into which the wafer is cut out, to be bonded with a conventionally used wire bonder because a sufficient aperture is provided above the pads. Further according to the invention, at the step of dicing two glued wafers into individual chips, the two wafers are separately cut. This enables chipping of the wafers to be reduced and the yield at the dicing step to be enhanced.

    摘要翻译： 本发明的目的是提高在通过MEMS技术形成的微机械元件的装置中的产量和促进结合。 根据本发明，当具有其中形成有微机械元件和焊盘的多个区域的第一晶片和其中形成有孔的第二晶片将被胶合在一起时，该孔由多个焊盘共享 的地区。 这使得可以用常规使用的引线接合器将切割出晶片的各个芯片结合，因为在焊盘上方设置足够的孔。 此外，根据本发明，在将两个胶合晶片切割成单个芯片的步骤中，两个晶片被分开切割。 这样可以削减晶片的碎裂并提高切割步骤的成品率。

    Semiconductor device and method for manufacturing thereof
    24.
    发明授权
    Semiconductor device and method for manufacturing thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US06982468B2

    公开(公告)日：2006-01-03

    申请号：US10942014

    申请日：2004-09-16

    申请人： Shimpei Tsujikawa ,  Toshiyuki Mine ,  Jiro Yugami ,  Natsuki Yokoyama ,  Tsuyoshi Yamauchi

    发明人： Shimpei Tsujikawa ,  Toshiyuki Mine ,  Jiro Yugami ,  Natsuki Yokoyama ,  Tsuyoshi Yamauchi

    IPC分类号： H01L29/76

    CPC分类号： H01L21/823857 ,  H01L21/823462

    摘要： A semiconductor device and a method for manufacturing the same of forming a silicon nitride film selectively without giving damages or contaminations to a surface of the silicon substrate thereby forming different types of gate dielectrics in one identical silicon substrate, are obtained by forming a silicon dioxide on the surface of a silicon substrate, then removing a portion thereof, forming a silicon nitride film to the surface of the substrate from which the silicon dioxide has been removed and, simultaneously, introducing nitrogen to the surface of the silicon dioxide which is left not being removed or, alternatively, depositing a silicon dioxide on the surface of the silicon substrate by chemical vapor deposition, then removing a portion thereof, forming a silicon nitride film on the surface of a substrate from which the silicon dioxide has been removed, and, simultaneously, introducing nitrogen to the surface of the silicon dioxide left not being removed, successively, dissolving and removing nitrogen-introduced silicon oxide film to expose the surface of the substrate and oxidizing the exposed surface of the silicon substrate and the silicon nitride film

    摘要翻译： 一种半导体器件及其制造方法，其选择性地形成氮化硅膜，而不会对硅衬底的表面造成损害或污染，从而在一个相同的硅衬底中形成不同类型的栅极电介质，通过在二氧化硅上形成二氧化硅 硅衬底的表面，然后去除其一部分，在已经除去二氧化硅的衬底的表面上形成氮化硅膜，同时将氮引入二氧化硅的不是 去除或者通过化学气相沉积在硅衬底的表面上沉积二氧化硅，然后去除其一部分，在去除二氧化硅的衬底的表面上形成氮化硅膜，同时 将氮气引入未被除去的二氧化硅的表面，依次溶解 并且去除引入氮的氧化硅膜以暴露衬底的表面并氧化硅衬底和氮化硅膜的暴露表面

    Method of manufacturing nonvolatile semiconductor memory device
    25.
    发明申请
    Method of manufacturing nonvolatile semiconductor memory device 有权
    制造非易失性半导体存储器件的方法

    公开(公告)号：US20050272198A1

    公开(公告)日：2005-12-08

    申请号：US11144593

    申请日：2005-06-06

    申请人： Hirotaka Hamamura ,  Toshiyuki Mine ,  Natsuki Yokoyama

    发明人： Hirotaka Hamamura ,  Toshiyuki Mine ,  Natsuki Yokoyama

    IPC分类号： H01L27/10 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8238 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/423 ,  H01L29/51 ,  H01L29/788 ,  H01L29/792

    CPC分类号： H01L21/28282 ,  H01L29/42344 ,  H01L29/513 ,  H01L29/792

    摘要： Conventionally, a MONOS type nonvolatile memory is fabricated by subjecting a silicon nitride film to ISSG oxidation to form a top silicon oxide film of ONO structure. If the ISSG oxidation conditions are severe, repeats of programming/erase operation cause increase of interface state density (Dit) and electron trap density. This does not provide a sufficient value of the on current, posing a problem in that the deterioration of charge trapping properties cannot be suppressed. For the solution to the problem, the silicon nitride film is oxidized by means of a high concentration ozone gas to form the top silicon oxide film.

    摘要翻译： 通常，通过使氮化硅膜进行ISSG氧化来形成ONO结构的顶部氧化硅膜来制造MONOS型非易失性存储器。 如果ISSG氧化条件严重，编程/擦除操作的重复会导致界面态密度（Dit）和电子陷阱密度的增加。 这不能提供足够的导通电流值，这导致不能抑制电荷俘获特性的劣化的问题。 为了解决这个问题，氮化硅膜通过高浓度的臭氧气体被氧化，形成顶部氧化硅膜。

    Method of manufacturing semiconductor devices
    26.
    发明授权
    Method of manufacturing semiconductor devices 失效
    制造半导体器件的方法

    公开(公告)号：US06380085B2

    公开(公告)日：2002-04-30

    申请号：US09750061

    申请日：2000-12-29

    申请人： Akio Nishida ,  Kikuo Kusukawa ,  Toshiaki Yamanaka ,  Natsuki Yokoyama ,  Shinichiro Kimura ,  Norio Suzuki ,  Osamu Tsuchiya ,  Atsushi Ogishima

    发明人： Akio Nishida ,  Kikuo Kusukawa ,  Toshiaki Yamanaka ,  Natsuki Yokoyama ,  Shinichiro Kimura ,  Norio Suzuki ,  Osamu Tsuchiya ,  Atsushi Ogishima

    IPC分类号： H01L21302

    CPC分类号： H01L27/10894 ,  H01L21/31053 ,  H01L21/76229 ,  H01L21/823437 ,  H01L21/823481 ,  H01L27/10814

    摘要： In a method of manufacturing a semiconductor device having a memory mat portion in which an active region and a field region are formed densely, after a polishing stopper film is deposited on a semiconductor substrate, there are formed grooves by etching a polishing stopper film of a field region and the semiconductor substrate. Then, after an insulating film is deposited so as to fill the grooves, then insulating film is partly removed from the memory mat portion by etching. Under this state, the insulating film is chemically mechanically polished until the polishing stopper film is exposed. The film thickness of the polishing stopper film on the active region can be reduced, and an electrical element isolation characteristic of the field region can be improved. At the same time, upon chemical mechanical polishing, a silicon substrate can be prevented from being exposed at the central portion of the memory mat portion and the insulating film can be prevented from being left on the silicon nitride film near the outer periphery, thereby making it possible to form elements having uniform electrical characteristics on all active regions of the memory mat portion.

    摘要翻译： 在制造半导体器件的方法中，其具有密集形成有源区和场区的存储垫部分，在半导体衬底上沉积抛光阻挡膜之后，通过蚀刻抛光阻挡膜形成凹槽 场区域和半导体衬底。 然后，在沉积绝缘膜以填充凹槽之后，通过蚀刻部分地从存储垫部分去除绝缘膜。 在这种状态下，绝缘膜被化学机械抛光直到抛光阻挡膜露出。 能够减少有源区域上的研磨停止膜的膜厚，能够提高场区域的电气元件隔离特性。 同时，在化学机械抛光时，可以防止硅衬底暴露在存储垫部分的中心部分，并且可以防止绝缘膜留在靠近外周的氮化硅膜上，从而使 可以在存储垫部分的所有有效区域上形成具有均匀电特性的元件。

    Wafer transport method
    29.
    发明授权
    Wafer transport method 失效
    晶圆输送方式

    公开(公告)号：US5562800A

    公开(公告)日：1996-10-08

    申请号：US308442

    申请日：1994-09-19

    申请人： Yoshio Kawamura ,  Yoshifumi Kawamoto ,  Fumihiko Uchida ,  Kenichi Mizuishi ,  Natsuki Yokoyama ,  Eiichi Murakami ,  Yoshinori Nakayama ,  Eiichi Seya

    发明人： Yoshio Kawamura ,  Yoshifumi Kawamoto ,  Fumihiko Uchida ,  Kenichi Mizuishi ,  Natsuki Yokoyama ,  Eiichi Murakami ,  Yoshinori Nakayama ,  Eiichi Seya

    IPC分类号： B65G49/00 ,  B65G49/07 ,  H01L21/00 ,  H01L21/02 ,  H01L21/027 ,  H01L21/677

    CPC分类号： H01L21/67748 ,  H01L21/67167 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67742 ,  Y10S414/135 ,  Y10S414/139 ,  Y10S438/935

    摘要： A wafer transport method includes the steps of preparing a semiconductor process equipment having a transport chamber and a process chamber. An interface means connects the transport chamber to the process chamber. A transport means transports a semiconductor wafer from the transport chamber to the process chamber by way of the interface means. The transport means mounting a substrate is inserted into a communicating corridor including a supply means and an exhaust means. The substrate is transported while performing the supply and exhaust by sequentially controlling a supply shutoff means, an exhaust shutoff means, and a communicating shutoff means according to the position of a conductance part formed of a gap between the transport means and the communicating corridor. Thus, the substrate is transported at a high throughput without contamination of the substrate while keeping the different atmospheric conditions for the transport chamber and the process chamber, thereby manufacturing a semiconductor device with high performance capabilities.

    摘要翻译： 晶片输送方法包括准备具有输送室和处理室的半导体工艺设备的步骤。 接口装置将输送室连接到处理室。 传送装置通过接口装置将半导体晶片从传送室传送到处理室。 安装基板的输送装置被插入到包括供给装置和排气装置的通信走廊中。 通过根据由输送装置和通信走廊之间的间隙形成的电导部分的位置依次控制供给切断装置，排气关闭装置和通信切断装置，在进行供给和排出的同时运送基板。 因此，在保持输送室和处理室的不同大气条件的同时，以高通量输送基板而不污染基板，从而制造具有高性能的半导体器件。