公开(公告)号：US20200211947A1

公开(公告)日：2020-07-02

申请号：US16812356

申请日：2020-03-08

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John Knickerbocker ,  Bing Dang ,  Raymond Horton ,  Joana Maria

IPC: H01L23/498 ,  H01L23/48 ,  H01L21/683 ,  H01L21/48 ,  H01L21/20 ,  H01L21/768

Abstract: Die stacks and methods of making die stacks with very thin dies are disclosed. The die surfaces remain flat within a 5 micron tolerance despite the thinness of the die and the process steps of making the die stack. A residual flux height is kept below 50% of the spacing distance between adjacent surfaces or structures, e.g. in the inter-die spacing.

公开(公告)号：US20200205735A1

公开(公告)日：2020-07-02

申请号：US16238143

申请日：2019-01-02

Applicant: International Business Machines Corporation

Inventor： Rajeev Narayanan ,  Katsuyuki Sakuma ,  John Knickerbocker ,  Bucknell C. Webb

IPC: A61B5/00 ,  H02S40/30 ,  G06F3/01

Abstract: Systems, computer-implemented methods and/or computer program products that facilitate wearable multiplatform sensing are provided. In one embodiment, a computer-implemented method comprises: measuring, by a system operatively coupled to a processor, wirelessly on a nail plate, physiological data of an entity; integrating and synchronizing, by the system, the physiological data with other physiological data from one or more devices to form integrated physiological data; and analyzing, by the system, the integrated physiological data to detect one or more disorders.

公开(公告)号：US20180348259A1

公开(公告)日：2018-12-06

申请号：US16040621

申请日：2018-07-20

Applicant: International Business Machines Corporation

Inventor： Bing Dang ,  John Knickerbocker ,  Yang Liu ,  Maurice Mason ,  Lubomyr T. Romankiw

IPC: G01R1/073 ,  H01L23/00 ,  B81C1/00 ,  G01R31/26 ,  B81B3/00 ,  B23K35/00

CPC classification number: G01R1/0735 ,  B23K35/00 ,  B81B3/00 ,  B81B2201/02 ,  B81B2203/0118 ,  B81B2203/0127 ,  B81C1/00626 ,  G01R31/2607 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05644 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/11003 ,  H01L2224/111 ,  H01L2224/1112 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13017 ,  H01L2224/13019 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13564 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/1366 ,  H01L2224/13663 ,  H01L2224/73207 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/381 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01104

Abstract: A method of forming surface protrusions on an article, and the article with the protrusions attached. The article may be an Integrated Circuit (IC) chip, a test probe for the IC chip or any suitable substrate or nanostructure. The surface protrusions are electroplated to a template or mold wafer, transferred to the article and easily separated from the template wafer. Thus, the attached protrusions may be, e.g., micro-bumps or micro pillars on an IC chip or substrate, test probes on a probe head, or one or more cantilevered membranes in a micro-machine or micro-sensor or other micro-electro-mechanical systems (MEMS) formed without undercutting the MEMS structure.

公开(公告)号：US09893047B2

公开(公告)日：2018-02-13

申请号：US15490377

申请日：2017-04-18

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Bing Dang ,  John Knickerbocker

IPC: H01L21/66 ,  H01L25/00 ,  H01L25/065 ,  H01L23/00 ,  H01L21/78 ,  H01L21/56 ,  H01L21/683 ,  H01L25/16 ,  H01L25/18 ,  H01L25/075 ,  H01L25/11 ,  H01L25/04 ,  H01L25/07

CPC classification number: H01L25/50 ,  H01L21/561 ,  H01L21/563 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L22/20 ,  H01L24/32 ,  H01L24/81 ,  H01L24/95 ,  H01L24/96 ,  H01L24/97 ,  H01L25/043 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/0756 ,  H01L25/117 ,  H01L25/167 ,  H01L25/18 ,  H01L2221/68322 ,  H01L2221/68327 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2223/6677 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/80121 ,  H01L2224/80143 ,  H01L2224/81005 ,  H01L2224/95001 ,  H01L2224/95144 ,  H01L2224/95146 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014

Abstract: Disclosed is a process, structure, equipment and apparatus directed to a low cost, high volume approach for the assembly of ultra small die to three-dimensional (3D) or 2.5D semiconductor packages.

公开(公告)号：US20170221872A1

公开(公告)日：2017-08-03

申请号：US15490377

申请日：2017-04-18

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Bing Dang ,  John Knickerbocker

IPC: H01L25/00 ,  H01L21/66 ,  H01L21/78 ,  H01L25/18 ,  H01L25/16 ,  H01L23/00 ,  H01L21/683 ,  H01L21/56

CPC classification number: H01L25/50 ,  H01L21/561 ,  H01L21/563 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L22/20 ,  H01L24/32 ,  H01L24/81 ,  H01L24/95 ,  H01L24/96 ,  H01L24/97 ,  H01L25/043 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/0756 ,  H01L25/117 ,  H01L25/167 ,  H01L25/18 ,  H01L2221/68322 ,  H01L2221/68327 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2223/6677 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/80121 ,  H01L2224/80143 ,  H01L2224/81005 ,  H01L2224/95001 ,  H01L2224/95144 ,  H01L2224/95146 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014

Abstract: Disclosed is a process, structure, equipment and apparatus directed to a low cost, high volume approach for the assembly of ultra small die to three-dimensional (3D) or 2.5D semiconductor packages.

公开(公告)号：US09568960B2

公开(公告)日：2017-02-14

申请号：US14627657

申请日：2015-02-20

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Evan G. Colgan ,  Monty M. Denneau ,  John Knickerbocker

IPC: H01L23/473 ,  G06F1/18 ,  G06F1/20 ,  H01L23/367 ,  H01L23/498

CPC classification number: G06F1/185 ,  G06F1/20 ,  G06F2200/201 ,  H01L23/367 ,  H01L23/473 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/94 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/04026 ,  H01L2224/05583 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/13109 ,  H01L2224/13116 ,  H01L2224/16227 ,  H01L2224/24137 ,  H01L2224/29116 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81805 ,  H01L2224/92125 ,  H01L2224/92242 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2224/83 ,  H01L2924/0105 ,  H01L2224/81

Abstract: A semiconductor structure includes a substrate with cooling layers, cooling channels, coolant inlets and outlets in fluid communication with the cooling channels, and a device layer on the cooling layers with one or more connection points and a device layer area. The device layer thermal coefficient of expansion is substantially equal to that of the cooling layers. A plurality of laminate substrates are disposed on, and electrically attached to, the device layer. The laminate substrate thermal coefficient of expansion differs from that of the device layer, each laminate substrate is smaller than the device layer portion to which it is attached, and each laminate substrate includes gaps between sides of adjacent laminate substrates. The laminate substrates are not electrically or mechanically connected to each other across the gaps therebetween and the laminate substrates are small enough to prevent warping of the device, interconnection and cooling layers due to thermal expansion.

Abstract translation: 半导体结构包括具有冷却层的衬底，冷却通道，与冷却通道流体连通的冷却剂入口和出口，以及具有一个或多个连接点和器件层区域的冷却层上的器件层。 器件层的热膨胀系数基本上等于冷却层的热膨胀系数。 多个层叠基板设置在器件层上并电连接到器件层。 叠层基板的热膨胀系数与装置层的热膨胀系数不同，每个层压基板的尺寸小于与其相连的装置层部分，并且各层叠基板在相邻层叠基板的侧面之间具有间隙。 层压基板在它们之间的间隙彼此不电或机械连接，并且层叠基板足够小以防止由于热膨胀而引起的装置，互连和冷却层翘曲。

公开(公告)号：US20160084882A1

公开(公告)日：2016-03-24

申请号：US14962331

申请日：2015-12-08

Applicant: International Business Machines Corporation

Inventor： Bing Dang ,  Yu Luo ,  John Knickerbocker ,  Yang Liu ,  Steven L. Wright

IPC: G01R1/073 ,  G01R31/28

CPC classification number: G01R1/07314 ,  B23K35/00 ,  B81C1/00111 ,  G01R31/2886 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05644 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/11003 ,  H01L2224/111 ,  H01L2224/1112 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13017 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/1366 ,  H01L2224/13663 ,  H01L2224/14051 ,  H01L2224/14181 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81815 ,  H01L2224/83104 ,  H01L2224/92 ,  H01L2224/92222 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/381 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/07802 ,  H01L2924/01104 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2224/83 ,  H01L21/563

Abstract: A test probe head for probe testing multiple chips on a wafer in a single probing. A probe head substrate includes an array of probe tip attach pads on one surface. The array includes a subarray for each probe head chip test site. Probe tips attached to each probe tip attach pad have an across the head tip height variation less than one micrometer (1 μm). The subarray probe tips may be on a pitch at or less than fifty microns (50 μm). The test probe head may be capable of test probing all chips in a quadrant and even up to all chips on a single wafer in a single probing.

Abstract translation: 用于在单次探测中测试晶片上的多个芯片的测试探头。 探头头基板包括在一个表面上的探针尖端附接垫的阵列。 该阵列包括每个探针头芯片测试点的子阵列。 探针尖端附着在每个探头尖端附着垫上，头尖高度变化小于1微米（1微米）。 子阵列探针尖端可以在等于或小于50微米（50μm）的间距上。 测试探头可以在单次探测中测试探测单个晶圆上的所有芯片，甚至可以探测单个晶片上的所有芯片。

公开(公告)号：US20150241476A1

公开(公告)日：2015-08-27

申请号：US14708198

申请日：2015-05-09

Applicant: International Business Machines Corporation

Inventor： Bing Dang ,  John Knickerbocker ,  Yang Liu ,  Maurice Mason ,  Lubomyr T. Romankiw

IPC: G01R1/073 ,  B81B3/00 ,  G01R31/26

CPC classification number: G01R1/0735 ,  B23K35/00 ,  B81B3/00 ,  B81B2201/02 ,  B81B2203/0118 ,  B81B2203/0127 ,  B81C1/00626 ,  G01R31/2607 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05644 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/11003 ,  H01L2224/111 ,  H01L2224/1112 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13017 ,  H01L2224/13019 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13564 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/1366 ,  H01L2224/13663 ,  H01L2224/73207 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/381 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01104

Abstract: A method of forming surface protrusions on an article, and the article with the protrusions attached. The article may be an Integrated Circuit (IC) chip, a test probe for the IC chip or any suitable substrate or nanostructure. The surface protrusions are electroplated to a template or mold wafer, transferred to the article and easily separated from the template wafer. Thus, the attached protrusions may be, e.g., micro-bumps or micro pillars on an IC chip or substrate, test probes on a probe head, or one or more cantilevered membranes in a micro-machine or micro-sensor or other micro-electro-mechanical systems (MEMS) formed without undercutting the MEMS structure.

Abstract translation: 在物品上形成表面突起的方法，以及附着有突起物的物品。 该物品可以是集成电路（IC）芯片，用于IC芯片的测试探针或任何合适的衬底或纳米结构。 表面突起电镀到模板或模具晶片上，转移到制品上，并容易地与模板晶片分离。 因此，附着的突起可以是例如IC芯片或衬底上的微凸起或微柱，探针头上的测试探针或微机或微传感器中的一个或多个悬臂膜或其它微电子 机械系统（MEMS）形成，而不会削弱MEMS结构。

公开(公告)号：US20250006699A1

公开(公告)日：2025-01-02

申请号：US18216749

申请日：2023-06-30

Applicant: International Business Machines Corporation

Inventor： John Knickerbocker ,  Mukta Ghate Farooq ,  Keiji Matsumoto

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/538 ,  H01L25/00

Abstract: A package structure includes a substrate having an upper surface; a first chip package positioned on the upper surface of the substrate, the first chip package comprising a first chip having a first integrated circuit connected to a first redistribution layer; a second chip package positioned on the upper surface of the substrate, the second chip package comprising a second chip having a second integrated circuit connected to a second redistribution layer; an orthogonal bridge positioned between the first chip package and the second chip package and having an interconnection to the first redistribution layer and the second redistribution layer; and a heat spreader positioned in direct contact with at least one of the first chip package, the second chip package, or the orthogonal bridge. The orthogonal bridge is arranged substantially orthogonal to the upper surface of the substrate.

公开(公告)号：US20240332121A1

公开(公告)日：2024-10-03

申请号：US18128745

申请日：2023-03-30

Applicant: International Business Machines Corporation

Inventor： Mukta Ghate Farooq ,  John Knickerbocker ,  Keiji Matsumoto

IPC: H01L23/373

CPC classification number: H01L23/3735 ,  H01L23/3731 ,  H05K1/0204

Abstract: An electronic device in which an electrically-insulating and highly thermal conductive sheet is located at the interconnect level is provided. The presence of the electrically-insulating and highly thermal conductive sheet at the interconnect level provides a significant reduction in the temperature of the electronic device, without causing excess stress in the electronic device. This results in electronic devices that have improved performance and reliability.