公开(公告)号：US08928077B2

公开(公告)日：2015-01-06

申请号：US12234549

申请日：2008-09-19

申请人： JaeGil Lee ,  Chongman Yun ,  Hocheol Jang ,  Christopher L. Rexer ,  Praveen Muraleedharan Shenoy ,  Dwayne S. Reichl ,  Joseph A. Yedinak

发明人： JaeGil Lee ,  Chongman Yun ,  Hocheol Jang ,  Christopher L. Rexer ,  Praveen Muraleedharan Shenoy ,  Dwayne S. Reichl ,  Joseph A. Yedinak

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40

CPC分类号： H01L29/66712 ,  H01L21/02532 ,  H01L21/26513 ,  H01L21/30604 ,  H01L29/0615 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1075 ,  H01L29/1095 ,  H01L29/404 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813 ,  H01L2924/0002 ,  H01L2924/00

摘要： In one general aspect, a power device includes an active region having a plurality of pillars of a first conductivity type alternately arranged with a plurality of pillars of a second conductivity type where the plurality of pillars of the second conductivity type in the active region each have substantially the same width. The power device includes a termination region surrounding at least a portion of the active region and having a plurality of pillars of the first conductivity type alternately arranged with a plurality of pillars of the second conductivity type where the plurality of pillars of the second conductivity type in the active region each have substantially the same width and are smaller than each width of the pillars of the second conductivity type in the termination region. The power device includes a transition region disposed between the active region and the termination region.

摘要翻译： 在一个一般方面，功率器件包括具有多个第一导电类型的柱的有源区，该多个柱交替地布置有多个第二导电类型的柱，其中有源区中的第二导电类型的多个柱各自具有 基本相同的宽度。 功率器件包括围绕有源区域的至少一部分的端接区域，并且具有多个第一导电类型的柱，其交替地布置有多个第二导电类型的支柱，其中第二导电类型的多个支柱 有源区域各自具有基本上相同的宽度，并且小于端接区域中的第二导电类型的柱的每个宽度。 功率器件包括设置在有源区和端接区之间的过渡区。

公开(公告)号：US20100314707A1

公开(公告)日：2010-12-16

申请号：US12484096

申请日：2009-06-12

申请人： Joseph A. Yedinak ,  Mark L. Rinehimer ,  Thomas E. Grebs ,  John L. Benjamin

发明人： Joseph A. Yedinak ,  Mark L. Rinehimer ,  Thomas E. Grebs ,  John L. Benjamin

IPC分类号： H01L29/872 ,  H01L21/22 ,  H01L21/33

CPC分类号： H01L29/407 ,  H01L29/36 ,  H01L29/8725

摘要： Disclosed are semiconductor devices and methods of making semiconductor devices. An exemplary embodiment comprises a semiconductor layer of a first conductivity type having a first surface, a second surface, and a graded net doping concentration of the first conductivity type within a portion of the semiconductor layer. The graded portion is located adjacent to the top surface of the semiconductor layer, and the graded net doping concentration therein decreasing in value with distance from the top surface of the semiconductor layer. The exemplary device also comprises an electrode disposed at the first surface of the semiconductor layer and adjacent to the graded portion.

摘要翻译： 公开了制造半导体器件的半导体器件和方法。 示例性实施例包括第一导电类型的半导体层，其具有在半导体层的一部分内的第一导电类型的第一表面，第二表面和等级净掺杂浓度。 分级部分位于与半导体层的顶表面相邻的位置，并且其中的渐变网络掺杂浓度随距离半导体层的顶表面的距离而减小。 示例性器件还包括设置在半导体层的第一表面并且与渐变部分相邻的电极。

公开(公告)号：US08502313B2

公开(公告)日：2013-08-06

申请号：US13091578

申请日：2011-04-21

申请人： Rohit Dikshit ,  Mark L. Rinehimer ,  Michael D. Gruenhagen ,  Joseph A. Yedinak ,  Tracie Petersen ,  Ritu Sodhi ,  Dan Kinzer ,  Christopher L. Rexer ,  Fred C. Session

发明人： Rohit Dikshit ,  Mark L. Rinehimer ,  Michael D. Gruenhagen ,  Joseph A. Yedinak ,  Tracie Petersen ,  Ritu Sodhi ,  Dan Kinzer ,  Christopher L. Rexer ,  Fred C. Session

IPC分类号： H01L29/76

CPC分类号： H01L29/7813 ,  H01L24/05 ,  H01L29/41775 ,  H01L29/42372 ,  H01L29/7397 ,  H01L29/7455 ,  H01L29/7811 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2924/01327 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/01079 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01047 ,  H01L2924/01023 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/00

摘要： This document discusses, among other things, a semiconductor device including a first metal layer coupled to a source region and a second metal layer coupled to a gate structure, wherein at least a portion of the first and second metal layers overlap vertically.

摘要翻译： 本文件尤其涉及包括耦合到源区的第一金属层和耦合到栅极结构的第二金属层的半导体器件，其中第一和第二金属层的至少一部分垂直重叠。

公开(公告)号：US20080150020A1

公开(公告)日：2008-06-26

申请号：US12018166

申请日：2008-01-22

申请人： Ashok Challa ,  Alan Elbanhawy ,  Thomas E. Grebs ,  Nathan L. Kraft ,  Dean E. Probst ,  Rodney S. Ridley ,  Steven P. Sapp ,  Qi Wang ,  Chongman Yun ,  J. G. Lee ,  Peter H. Wilson ,  Joseph A. Yedinak ,  J. Y. Jung ,  H. C. Jang ,  Babak S. Sani ,  Richard Stokes ,  Gary M. Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher L. Rexer ,  Christopher B. Kocon ,  Debra S. Woolsey

发明人： Ashok Challa ,  Alan Elbanhawy ,  Thomas E. Grebs ,  Nathan L. Kraft ,  Dean E. Probst ,  Rodney S. Ridley ,  Steven P. Sapp ,  Qi Wang ,  Chongman Yun ,  J. G. Lee ,  Peter H. Wilson ,  Joseph A. Yedinak ,  J. Y. Jung ,  H. C. Jang ,  Babak S. Sani ,  Richard Stokes ,  Gary M. Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher L. Rexer ,  Christopher B. Kocon ,  Debra S. Woolsey

IPC分类号： H01L29/78

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor power device includes a drift region of a first conductivity type, a well region extending above the drift region and having a second conductivity type opposite the first conductivity type, an active trench extending through the well region and into the drift region. The active trench, which includes sidewalls and bottom lined with dielectric material, is substantially filled with a first conductive layer and a second conductive layer. The second conductive layer forms a gate electrode and is disposed above the first conductive layer and is separated from the first conductive layer by an inter-electrode dielectric material. The device also includes source regions having the first conductivity type formed inside the well region and adjacent the active trench and a charge control trench that extends deeper into the drift region than the active trench and is substantially filled with material to allow for vertical charge control in the drift region. The charge control trench can be lined with a layer of dielectric material and substantially filled with conductive material. The active trench can include a second shield electrode made of conductive material disposed below the first shield electrode. The first conductive layer inside the active trench can form a secondary gate electrode that is configured to be electrically biased to a desired potential. The semiconductor device can also include a Schottky structure formed between the charge control trench and a second adjacent charge control trench.

摘要翻译： 半导体功率器件包括第一导电类型的漂移区域，在漂移区域上方延伸并且具有与第一导电类型相反的第二导电类型的阱区域，延伸穿过阱区域并进入漂移区域的有源沟槽。 主要沟槽包括侧壁和衬底与介电材料的底部，其基本上被第一导电层和第二导电层填充。 第二导电层形成栅极，并且设置在第一导电层的上方，并且通过电极间电介质材料与第一导电层分离。 该器件还包括形成在阱区内并且邻近有源沟槽的第一导电类型的源极区域以及充电控制沟槽，该电荷控制沟槽比有源沟槽更深地延伸到漂移区域中，并且基本上填充有材料以允许垂直电荷控制 漂移区域。 电荷控制沟槽可以衬有介电材料层并且基本上填充有导电材料。 有源沟槽可以包括由设置在第一屏蔽电极下方的导电材料制成的第二屏蔽电极。 有源沟槽内的第一导电层可以形成辅助栅电极，其被配置为电偏置到期望的电位。 半导体器件还可以包括形成在电荷控制沟槽和第二相邻电荷控制沟槽之间的肖特基结构。

公开(公告)号：US20120037982A1

公开(公告)日：2012-02-16

申请号：US13283496

申请日：2011-10-27

申请人： Joseph A. Yedinak ,  Mark L. Rinehimer ,  Thomas E. Grebs ,  John L. Benjamin

发明人： Joseph A. Yedinak ,  Mark L. Rinehimer ,  Thomas E. Grebs ,  John L. Benjamin

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/407 ,  H01L29/36 ,  H01L29/8725

摘要： Disclosed are semiconductor devices and methods of making semiconductor devices. An exemplary embodiment comprises a semiconductor layer of a first conductivity type having a first surface, a second surface, and a graded net doping concentration of the first conductivity type within a portion of the semiconductor layer. The graded portion is located adjacent to the top surface of the semiconductor layer, and the graded net doping concentration therein decreasing in value with distance from the top surface of the semiconductor layer. The exemplary device also comprises an electrode disposed at the first surface of the semiconductor layer and adjacent to the graded portion.

摘要翻译： 公开了制造半导体器件的半导体器件和方法。 示例性实施例包括第一导电类型的半导体层，其具有在半导体层的一部分内的第一导电类型的第一表面，第二表面和等级净掺杂浓度。 分级部分位于与半导体层的顶表面相邻的位置，并且其中的渐变网络掺杂浓度随距离半导体层的顶表面的距离而减小。 示例性器件还包括设置在半导体层的第一表面并且与渐变部分相邻的电极。

公开(公告)号：US08049276B2

公开(公告)日：2011-11-01

申请号：US12484096

申请日：2009-06-12

申请人： Joseph A. Yedinak ,  Mark L. Rinehimer ,  Thomas E. Grebs ,  John L. Benjamin

发明人： Joseph A. Yedinak ,  Mark L. Rinehimer ,  Thomas E. Grebs ,  John L. Benjamin

IPC分类号： H01L29/66

CPC分类号： H01L29/407 ,  H01L29/36 ,  H01L29/8725

摘要： Disclosed are semiconductor devices and methods of making semiconductor devices. An exemplary embodiment comprises a semiconductor layer of a first conductivity type having a first surface, a second surface, and a graded net doping concentration of the first conductivity type within a portion of the semiconductor layer. The graded portion is located adjacent to the top surface of the semiconductor layer, and the graded net doping concentration therein decreasing in value with distance from the top surface of the semiconductor layer. The exemplary device also comprises an electrode disposed at the first surface of the semiconductor layer and adjacent to the graded portion.

摘要翻译： 公开了制造半导体器件的半导体器件和方法。 示例性实施例包括第一导电类型的半导体层，其具有在半导体层的一部分内的第一导电类型的第一表面，第二表面和等级净掺杂浓度。 分级部分位于与半导体层的顶表面相邻的位置，并且其中的渐变网络掺杂浓度随距离半导体层的顶表面的距离而减小。 示例性器件还包括设置在半导体层的第一表面并且与渐变部分相邻的电极。

公开(公告)号：US08492837B2

公开(公告)日：2013-07-23

申请号：US13283496

申请日：2011-10-27

申请人： Joseph A. Yedinak ,  Mark L. Rinehimer ,  Thomas E. Grebs ,  John L. Benjamin

发明人： Joseph A. Yedinak ,  Mark L. Rinehimer ,  Thomas E. Grebs ,  John L. Benjamin

IPC分类号： H01L29/872

CPC分类号： H01L29/407 ,  H01L29/36 ,  H01L29/8725

摘要： Disclosed are semiconductor devices and methods of making semiconductor devices. An exemplary embodiment comprises a semiconductor layer of a first conductivity type having a first surface, a second surface, and a graded net doping concentration of the first conductivity type within a portion of the semiconductor layer. The graded portion is located adjacent to the top surface of the semiconductor layer, and the graded net doping concentration therein decreasing in value with distance from the top surface of the semiconductor layer. The exemplary device also comprises an electrode disposed at the first surface of the semiconductor layer and adjacent to the graded portion.

摘要翻译： 公开了制造半导体器件的半导体器件和方法。 示例性实施例包括第一导电类型的半导体层，其具有在半导体层的一部分内的第一导电类型的第一表面，第二表面和渐变网掺杂浓度。 分级部分位于与半导体层的顶表面相邻的位置，并且其中的渐变网络掺杂浓度随距离半导体层的顶表面的距离而减小。 示例性器件还包括设置在半导体层的第一表面并且与渐变部分相邻的电极。

公开(公告)号：US20120267714A1

公开(公告)日：2012-10-25

申请号：US13091578

申请日：2011-04-21

申请人： Rohit Dikshit ,  Mark L. Rinehimer ,  Michael D. Gruenhagen ,  Joseph A. Yedinak ,  Tracie Petersen ,  Ritu Sodhi ,  Dan Kinzer ,  Christopher L. Rexer ,  Fred Session

发明人： Rohit Dikshit ,  Mark L. Rinehimer ,  Michael D. Gruenhagen ,  Joseph A. Yedinak ,  Tracie Petersen ,  Ritu Sodhi ,  Dan Kinzer ,  Christopher L. Rexer ,  Fred Session

IPC分类号： H01L29/78 ,  H01L21/28

CPC分类号： H01L29/7813 ,  H01L24/05 ,  H01L29/41775 ,  H01L29/42372 ,  H01L29/7397 ,  H01L29/7455 ,  H01L29/7811 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2924/01327 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/01079 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01047 ,  H01L2924/01023 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/00

摘要： This document discusses, among other things, a semiconductor device including a first metal layer coupled to a source region and a second metal layer coupled to a gate structure, wherein at least a portion of the first and second metal layers overlap vertically.

摘要翻译： 本文件尤其涉及包括耦合到源区的第一金属层和耦合到栅极结构的第二金属层的半导体器件，其中第一和第二金属层的至少一部分垂直重叠。

公开(公告)号：US20120220091A1

公开(公告)日：2012-08-30

申请号：US13418128

申请日：2012-03-12

申请人： Ashok Challa ,  Alan Elbanhawy ,  Thomas E. Grebs ,  Nathan L. Kraft ,  Dean E. Probst ,  Rodney S. Ridley ,  Steven P. Sapp ,  Qi Wang ,  Chongman Yun ,  J.G. Lee ,  Peter H. Wilson ,  Joseph A. Yedinak ,  J.Y. Jung ,  H.C. Jang ,  Babak S. Sani ,  Richard Stokes ,  Gary M. Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher L. Rexer ,  Christopher B. Kocon ,  Debra S. Woolsey

发明人： Ashok Challa ,  Alan Elbanhawy ,  Thomas E. Grebs ,  Nathan L. Kraft ,  Dean E. Probst ,  Rodney S. Ridley ,  Steven P. Sapp ,  Qi Wang ,  Chongman Yun ,  J.G. Lee ,  Peter H. Wilson ,  Joseph A. Yedinak ,  J.Y. Jung ,  H.C. Jang ,  Babak S. Sani ,  Richard Stokes ,  Gary M. Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James J. Murphy ,  Gordon K. Madson ,  Bruce D. Marchant ,  Christopher L. Rexer ,  Christopher B. Kocon ,  Debra S. Woolsey

IPC分类号： H01L21/336 ,  H01L21/311

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： A method for forming thick oxide at the bottom of a trench formed in a semiconductor substrate includes forming a conformal oxide film by a sub-atmospheric chemical vapor deposition process that fills the trench and covers a top surface of the substrate. The method also includes etching the oxide film off the top surface of the substrate and inside the trench to leave a substantially flat layer of oxide having a target thickness at the bottom of the trench.

摘要翻译： 在半导体衬底中形成的沟槽的底部形成厚氧化物的方法包括通过填充沟槽并覆盖衬底顶表面的亚大气压化学气相沉积工艺形成共形氧化膜。 该方法还包括将氧化膜从衬底的顶表面和沟槽内部蚀刻，以留下在沟槽底部具有目标厚度的基本平坦的氧化物层。

公开(公告)号：US08786010B2

公开(公告)日：2014-07-22

申请号：US13095664

申请日：2011-04-27

申请人： Joseph A. Yedinak ,  Christopher L. Rexer ,  Jaegil Lee ,  Hamza Yilmaz ,  Chongman Yun

发明人： Joseph A. Yedinak ,  Christopher L. Rexer ,  Jaegil Lee ,  Hamza Yilmaz ,  Chongman Yun

IPC分类号： H01L29/06

CPC分类号： H01L29/7813 ,  H01L29/045 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/404 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/66734 ,  H01L29/7811 ,  H01L29/872

摘要： A power device includes a semiconductor region which in turn includes a plurality of alternately arranged pillars of first and second conductivity type. Each of the plurality of pillars of second conductivity type further includes a plurality of implant regions of the second conductivity type arranged on top of one another along the depth of pillars of second conductivity type, and a trench portion filled with semiconductor material of the second conductivity type directly above the plurality of implant regions of second conductivity type.

摘要翻译： 功率器件包括半导体区域，该半导体区域又包括多个交替布置的第一和第二导电类型的柱。 第二导电类型的多个支柱中的每一个还包括沿着第二导电类型的柱的深度彼此顶部布置的多个第二导电类型的注入区域，以及填充有第二导电类型的半导体材料的沟槽部分 在第二导电类型的多个植入区域的正上方。