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    SEMICONDUCTOR PACKAGE
    24.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20250149519A1

    公开(公告)日：2025-05-08

    申请号：US18769823

    申请日：2024-07-11

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyunsoo Chung ,  Jinchan Ahn ,  Chiwoo Lee

    IPC: H01L25/16 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H10B80/00

    Abstract: A semiconductor package includes a package substrate, a plurality of stacked structures on the package substrate, each stacked structure including a plurality of core chips stacked on each other, each core chip including a memory cell array including a plurality of memory cells, a buffer chip on the package substrate, and spaced apart from the plurality of stacked structures in a horizontal direction, and a photonics package including an optical integrated circuit chip on the package substrate, an electronic integrated circuit chip on the optical integrated circuit chip, and a first molding layer surrounding side surfaces of the electronic integrated circuit chip, wherein the buffer chip is configured to control the memory cell of the core chip of each of the plurality of stacked structures.

    Semiconductor package, and a package on package type semiconductor package having the same
    25.
    发明授权
    Semiconductor package, and a package on package type semiconductor package having the same 有权

    公开(公告)号：US12166013B2

    公开(公告)日：2024-12-10

    申请号：US17578621

    申请日：2022-01-19

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyunsoo Chung ,  Younglyong Kim ,  Myungkee Chung

    IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L25/10

    Abstract: A semiconductor package including: a redistribution layer including redistribution line patterns, redistribution vias connected to the redistribution line patterns, and a redistribution insulating layer surrounding the redistribution line patterns and the redistribution vias; semiconductor chips including at least one upper semiconductor chip disposed on a lowermost semiconductor chip of the semiconductor chips, wherein the at least one upper semiconductor chip is thicker than the lowermost semiconductor chip; bonding wires each having a first end and a second end, wherein the bonding wires connect the semiconductor chips to the redistribution layer, wherein the first end of each of the bonding wires is connected to a respective chip pad of the semiconductor chips and the second end of each of the bonding wires is connected to a respective one of the redistribution line patterns; and a molding member surrounding, on the redistribution layer, the semiconductor chips and the bonding wires.

    Semiconductor package including heat redistribution layers
    28.
    发明授权
    Semiconductor package including heat redistribution layers 有权

    公开(公告)号：US11296004B2

    公开(公告)日：2022-04-05

    申请号：US16710841

    申请日：2019-12-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Taewon Yoo ,  Hyunsoo Chung ,  Myungkee Chung

    IPC: H01L23/36 ,  H01L23/48 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065

    Abstract: A semiconductor package is provided including a first semiconductor package including a first semiconductor chip. The first semiconductor chip includes a first surface and a second surface opposite to the first surface. A second semiconductor package is disposed on the first semiconductor package. The second semiconductor package includes a second redistribution layer including a redistribution line. A second semiconductor chip is disposed on the second redistribution layer. A thermal pillar is disposed on the second redistribution layer. A heat radiator is disposed on the second semiconductor package and connected to the thermal pillar. The redistribution line is connected to the first semiconductor chip.

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