公开(公告)号：US10403596B2

公开(公告)日：2019-09-03

申请号：US15949847

申请日：2018-04-10

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Hsien-Wen Chen ,  Shih-Ching Chen ,  Chieh-Lung Lai

IPC: H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  H01L21/683 ,  H01L23/31 ,  H01L21/56 ,  H01L23/15

Abstract: A package structure includes a dielectric layer having opposing first and second surfaces, a wiring layer formed on the first surface and having a plurality of conducive vias that penetrate the dielectric layer, an electronic component disposed on the first surface of the dielectric layer and electrically connected to the wiring layer, an encapsulant encapsulating the electronic component, and a packaging substrate disposed on the second surface and electrically connected to the conductive vias. With the dielectric layer in replacement of a conventional silicon board and the wiring layer as a signal transmission medium between the electronic component and the packaging substrate, the package structure does not need through-silicon vias. Therefore, the package structure has a simple fabrication process and a low fabrication cost. The present invention further provides a method of fabricating the package structure.

公开(公告)号：US20180233478A1

公开(公告)日：2018-08-16

申请号：US15949847

申请日：2018-04-10

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Hsien-Wen Chen ,  Shih-Ching Chen ,  Chieh-Lung Lai

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/683 ,  H01L23/498

CPC classification number: H01L24/81 ,  H01L21/486 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/15 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/83 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/13022 ,  H01L2224/13147 ,  H01L2224/16238 ,  H01L2224/73204 ,  H01L2224/81 ,  H01L2224/81193 ,  H01L2224/83104 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2224/83 ,  H01L2924/00014

Abstract: A package structure includes a dielectric layer having opposing first and second surfaces, a wiring layer formed on the first surface and having a plurality of conducive vias that penetrate the dielectric layer, an electronic component disposed on the first surface of the dielectric layer and electrically connected to the wiring layer, an encapsulant encapsulating the electronic component, and a packaging substrate disposed on the second surface and electrically connected to the conductive vias. With the dielectric layer in replacement of a conventional silicon board and the wiring layer as a signal transmission medium between the electronic component and the packaging substrate, the package structure does not need through-silicon vias. Therefore, the package structure has a simple fabrication process and a low fabrication cost. The present invention further provides a method of fabricating the package structure.

公开(公告)号：US20170330826A1

公开(公告)日：2017-11-16

申请号：US15666005

申请日：2017-08-01

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Ching-Wen Chiang ,  Hsin-Chih Wang ,  Chih-Yuan Shih ,  Shih-Ching Chen

IPC: H01L23/498 ,  H01L21/56 ,  H01L21/48 ,  H01L21/306 ,  H01L21/304

CPC classification number: H01L23/49827 ,  H01L21/304 ,  H01L21/306 ,  H01L21/486 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49833 ,  H01L2224/16225

Abstract: A substrate structure is provided, which includes: a substrate body having a first surface and a second surface opposite to the first surface; and a plurality of conductive posts disposed on the first surface of the substrate body and electrically connected to the substrate body. By replacing conventional through silicon vias (TSVs) with the conductive posts, the present disclosure greatly reduces the fabrication cost. The present disclosure further provides an electronic package having the substrate structure and a method for fabricating the electronic package.

公开(公告)号：US20170256481A1

公开(公告)日：2017-09-07

申请号：US15084762

申请日：2016-03-30

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Shih-Ching Chen ,  Shih-Liang Peng ,  Chieh-Lung Lai ,  Jia-Wei Pan ,  Chang-Lun Lu

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L25/16 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L21/4846 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/562 ,  H01L24/17 ,  H01L25/0655 ,  H01L25/16 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2924/15151

Abstract: A semiconductor substrate is provided, including a substrate body having a lateral surface, and a protruding structure extending outward from the lateral surface. The semiconductor substrate distributes stresses generated during a manufacturing process through the protruding structure, and is thus prevented from delamination or being cracked. An electronic package having the semiconductor substrate is also provided.

公开(公告)号：US09607974B2

公开(公告)日：2017-03-28

申请号：US14940554

申请日：2015-11-13

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chun-Tang Lin ,  Shih-Ching Chen ,  Yi-Che Lai ,  Hong-Da Chang ,  Hung-Wen Liu ,  Yi-Wei Liu ,  Hsi-Chang Hsu

IPC: H01L25/00 ,  H01L25/065 ,  H01L21/683 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L25/50 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/48 ,  H01L24/96 ,  H01L25/0657 ,  H01L25/105 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/06548 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method for fabricating a package structure is provided, which includes: providing a first carrier having a circuit layer thereon; forming a plurality of conductive posts on the circuit layer and disposing at least an electronic element on the first carrier; forming an encapsulant on the first carrier to encapsulate the conductive posts, the circuit layer and the electronic element; and removing the first carrier, thereby dispensing with the conventional hole opening process for forming the conductive posts and hence reducing the fabrication costs.

公开(公告)号：US20160005695A1

公开(公告)日：2016-01-07

申请号：US14471505

申请日：2014-08-28

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Rui-Feng Tai ,  Hsiao-Chun Huang ,  Chun-Hung Lu ,  Hsi-Chang Hsu ,  Shih-Ching Chen

IPC: H01L23/544 ,  H01L21/52

CPC classification number: H01L23/544 ,  H01L21/561 ,  H01L21/568 ,  H01L21/682 ,  H01L23/15 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/54486 ,  H01L2224/02331 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05073 ,  H01L2224/05563 ,  H01L2224/05567 ,  H01L2224/05569 ,  H01L2224/05573 ,  H01L2224/12105

Abstract: A method for fabricating a package structure is provided, which includes the steps of: providing a base portion having at least an electronic element embedded therein and at least a positioning unit formed around a periphery of the electronic element, wherein the positioning unit protrudes from or is flush with a surface of the base portion; and forming at least a circuit layer on the surface of the base portion and the electronic element. The circuit layer is aligned and connected to the electronic element through the positioning unit.

Abstract translation: 提供一种制造封装结构的方法，其包括以下步骤：提供至少具有嵌入其中的电子元件的基部和至少围绕电子元件的周边形成的定位单元，其中定位单元从或 与基部的表面齐平; 以及在所述基部和所述电子元件的表面上形成至少电路层。 电路层通过定位单元对准并连接到电子元件。

公开(公告)号：US20150035164A1

公开(公告)日：2015-02-05

申请号：US14012447

申请日：2013-08-28

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Guang-Hwa Ma ,  Shih-Kuang Chiu ,  Shih-Ching Chen ,  Chun-Chi Ke ,  Chang-Lun Lu ,  Chun-Hung Lu ,  Hsien-Wen Chen ,  Chun-Tang Lin ,  Yi-Che Lai ,  Chi-Hsin Chiu ,  Wen-Tsung Tseng ,  Tsung-Te Yuan ,  Lu-Yi Chen ,  Mao-Hua Yeh

IPC: H01L23/538 ,  H01L23/00

CPC classification number: H01L24/96 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3135 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/82 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2224/82005 ,  H01L2224/82007 ,  H01L2924/12042 ,  H01L2924/18162 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2924/00

Abstract: The present invention provides a semiconductor package and a method of fabricating the same, including: placing in a groove of a carrier a semiconductor element having opposing active and non-active surfaces, and side surfaces abutting the active surface and the non-active surface; applying an adhesive material in the groove and around a periphery of the side surfaces of the semiconductor element; forming a dielectric layer on the adhesive material and the active surface of the semiconductor element; forming on the dielectric layer a circuit layer electrically connected to the semiconductor element; and removing a first portion of the carrier below the groove to keep a second portion of the carrier on a side wall of the groove intact for the second portion to function as a supporting member. The present invention does not require formation of a silicon interposer, and therefore the overall cost of a final product is much reduced.

Abstract translation: 本发明提供一种半导体封装及其制造方法，包括：将具有相对的有源和非有源表面的半导体元件和邻接有源表面和非有效表面的侧表面放置在载体的沟槽中; 在所述凹槽中并且围绕所述半导体元件的侧表面的周边施加粘合剂材料; 在所述粘合剂材料和所述半导体元件的有源表面上形成介电层; 在所述电介质层上形成电连接到所述半导体元件的电路层; 以及在所述凹槽下方移除所述载体的第一部分，以将所述载体的第二部分保持在所述凹槽的侧壁上，以使所述第二部分用作支撑构件。 本发明不需要形成硅插入件，因此最终产品的总成本大大降低。