公开(公告)号：US09647615B2

公开(公告)日：2017-05-09

申请号：US14430417

申请日：2013-11-26

Applicant: Mitsubishi Electric Corporation

Inventor： Eigo Kuwata ,  Koji Yamanaka ,  Hiroshi Otsuka ,  Tasuku Kirikoshi ,  Yoshitaka Kamo

IPC: H03F3/191 ,  H03F1/56 ,  H03F1/42 ,  H03F3/60 ,  H03F3/04

CPC classification number: H03F1/565 ,  H03F1/42 ,  H03F1/56 ,  H03F3/04 ,  H03F3/191 ,  H03F3/601 ,  H03F3/602 ,  H03F2200/222 ,  H03F2200/318

Abstract: Parallel capacitors (5c and 5d) of impedance matching circuits (5) which are connected to two transistors (1), respectively, have their first ends connected to a ground through via holes (5e and 5f) that are used in common, respectively. Although a conventional circuit necessitates via holes by the number equal to the number of stages multiplied by the number of cells of the transistors (1) for an LPF type impedance matching circuit (3), the present circuit can halve the number of via holes of the LPF type impedance matching circuit (5), thereby being able to downsize the circuit.

公开(公告)号：US20170099033A1

公开(公告)日：2017-04-06

申请号：US15274539

申请日：2016-09-23

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yusuke SHIMAMUNE ,  Satoshi TANAKA ,  Takayuki TSUTSUI ,  Hayato NAKAMURA ,  Kazuhito NAKAI ,  Fuminori MORISAWA

IPC: H03F1/02 ,  H03F3/21 ,  H03F3/193

CPC classification number: H03F1/0222 ,  G05F3/262 ,  H03F1/301 ,  H03F1/302 ,  H03F3/04 ,  H03F3/191 ,  H03F3/193 ,  H03F3/21 ,  H03F2200/18 ,  H03F2200/451

Abstract: Provided is a current output circuit that includes: a first FET that has a power supply voltage supplied to a source thereof, that has a first voltage supplied to a gate thereof and that outputs a first current from a drain thereof; a second FET that has the power supply voltage supplied to a source thereof, that has the first voltage supplied to a gate thereof and that outputs an output current from a drain thereof; a first control circuit that controls the first voltage such that the first current comes to be at a target level; and a second control circuit that performs control such that a drain voltage of the first FET and a drain voltage of the second FET are made equal to each other.

公开(公告)号：US09606151B2

公开(公告)日：2017-03-28

申请号：US14327331

申请日：2014-07-09

Applicant: Texas Instruments Incorporated

Inventor： Michael D. Seeman

IPC: G01R19/00 ,  G01R1/30 ,  H03F3/04 ,  H03F3/45 ,  H03F3/217 ,  H02M1/00

CPC classification number: G01R19/0092 ,  G01R1/30 ,  H02M2001/0009 ,  H03F3/04 ,  H03F3/2173 ,  H03F3/45071 ,  H03F3/45475 ,  H03F2200/129 ,  H03F2200/351 ,  H03F2203/45022 ,  H03F2203/45156 ,  H03F2203/45528

Abstract: A circuit for sensing current in a capacitive network. A first capacitor carries a first current. A second capacitor is connected to the first capacitor thereby forming a current divider. The second capacitor carries a second current which is proportional to the first current. A transimpedance amplifier is connected to the second capacitor and has a voltage output that is proportional to the second current. Using a current feedback amplifier as the transimpedance amplifier significantly improves bandwidth and stability.

公开(公告)号：US09577628B2

公开(公告)日：2017-02-21

申请号：US14681783

申请日：2015-04-08

Applicant: Lockheed Martin Corporation

Inventor： Wilbur Lew ,  Roland Cadotte, Jr.

IPC: H03K17/687 ,  H03K17/14 ,  H03F3/04 ,  H03F3/30

CPC classification number: H03K17/145 ,  H03F3/04 ,  H03F3/302 ,  H03F2200/18 ,  H03F2200/451 ,  H03K17/687 ,  H03K2217/0054 ,  H03K2217/0072

Abstract: A gate pulsing gate ladder circuit includes a series connected resistor ladder with bond pads connected to the resistor ladder between adjacent resistors. An electrical node is positioned between a first and second resistor of the resistor ladder. The electrical node is electrically connected to a gate electrode of a field effect transistor (FET). A power supply produces a constant power voltage that is applied to a pre-selected bond pad to produce a desired bias voltage at the gate electrode of the FET. A selectable gate enable voltage source is connected to an and of the resistor ladder at the first resistor and is configured to produce a first and second voltage level that when combined with the constant power voltage produces a voltage level that causes the FET to be in a conducting state or non-conducting state, respectively.

Abstract translation: 门脉冲栅极梯形电路包括串联连接的电阻梯，其中接合焊盘连接到相邻电阻器之间的电阻梯。 电节点位于电阻梯的第一和第二电阻之间。 电节点电连接到场效应晶体管（FET）的栅电极。 电源产生恒定的电源电压，其施加到预先选择的焊盘以在FET的栅极处产生期望的偏置电压。 可选择的栅极使能电压源在第一电阻器处连接到电阻器的电阻器，并且被配置为产生第一和第二电压电平，当与恒定电源电压组合时产生电压电平，使得FET处于 分别进行状态或非导电状态。

公开(公告)号：US20160373069A1

公开(公告)日：2016-12-22

申请号：US15251012

申请日：2016-08-30

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kiichiro Takenaka ,  Masahiro Ito ,  Masakazu Hori ,  Mitsuo Ariie ,  Hayato Nakamura ,  Satoshi Arayashiki ,  Hidetoshi Matsumoto ,  Tsuyoshi Sato ,  Satoshi Tanaka

IPC: H03F1/02 ,  H03F1/32 ,  H03F3/19 ,  H03F3/21 ,  H03F1/52

CPC classification number: H03F1/0222 ,  H03F1/02 ,  H03F1/0216 ,  H03F1/0261 ,  H03F1/32 ,  H03F1/42 ,  H03F1/52 ,  H03F1/56 ,  H03F3/04 ,  H03F3/19 ,  H03F3/21 ,  H03F2200/102 ,  H03F2200/408 ,  H03F2200/411 ,  H03F2200/444 ,  H03F2200/451 ,  H03G3/004

Abstract: Improvement in linearity is achieved at low costs in a power amplifier module employing an envelope tracking system. The power amplifier module includes a first power amplifier circuit that amplifies a radio frequency signal and that outputs a first amplified signal, a second power amplifier circuit that amplifies the first amplified signal on the basis of a source voltage varying depending on amplitude of the radio frequency signal and that outputs a second amplified signal, and a matching circuit that includes first and second capacitors connected in series between the first and second power amplifier circuit and an inductor connected between a node between the first and second capacitors and a ground and that decreases a gain of the first power amplifier circuit as the source voltage of the second power amplifier circuit increases.

公开(公告)号：US09356561B2

公开(公告)日：2016-05-31

申请号：US14750406

申请日：2015-06-25

Applicant: DockOn AG

Inventor： Forrest Brown ,  Patrick Rada ,  Alexandre Dupuy

IPC: H03D11/04 ,  H03D11/08 ,  H03F1/08 ,  H03D1/08 ,  H01P5/19 ,  H01Q7/00 ,  H01Q21/00 ,  H03D1/18 ,  H03D7/02 ,  H03D7/12 ,  H03D7/16 ,  H03F3/191 ,  H03F3/04

CPC classification number: H01P5/19 ,  H01Q7/00 ,  H01Q21/0075 ,  H03D1/08 ,  H03D1/18 ,  H03D7/02 ,  H03D7/12 ,  H03D7/165 ,  H03D7/166 ,  H03D11/04 ,  H03D11/08 ,  H03D2200/0043 ,  H03D2200/0098 ,  H03F1/08 ,  H03F3/04 ,  H03F3/191 ,  H03F2200/165 ,  H03F2200/294 ,  H03G11/04

Abstract: A logarithmic amplifier (LDA) is described that includes an amplifier configured to oscillate a modulated input signal, a feedback establishing a 180 degree phase shift between the amplifier input and the output and maintaining oscillation of the input signal, a parallel resonant circuit connected to the amplifier output causing the amplifier to resonate at or around a center frequency, and a controller connected to the amplifier input cyclically terminating oscillation of the input signal each time a pre-determined threshold of current is detected, the controller including a low pass filter configured to generate a second output signal having a repetition frequency. The LDA may be used for AM with or without a PLL and/or a superheterodyne. The LDA may be implemented as a mixer and used for phase demodulation. The LDA may be used for phase demodulation. The LDA may be used in place of a low noise amplifier.

Abstract translation: 描述了对数放大器（LDA），其包括被配置为振荡调制输入信号的放大器，在放大器输入和输出之间建立180度相移并保持输入信号的振荡的反馈，并联谐振电路 放大器输出使得放大器在中心频率处或周围谐振，以及连接到放大器输入端的控制器，每当检测到电流的预定阈值时循环地终止输入信号的振荡，则控制器包括低通滤波器， 产生具有重复频率的第二输出信号。 LDA可用于具有或不具有PLL和/或超外差的AM。 LDA可以实现为混频器并用于相位解调。 LDA可用于相位解调。 可以使用LDA代替低噪声放大器。

公开(公告)号：US09300889B2

公开(公告)日：2016-03-29

申请号：US14658638

申请日：2015-03-16

Applicant: CANON KABUSHIKI KAISHA

Inventor： Seiji Hashimoto ,  Yasushi Matsuno ,  Takeru Suzuki ,  Kazuyuki Shigeta

IPC: H04N5/217 ,  H04N5/20 ,  H04N5/235 ,  H04N5/363 ,  H04N5/353 ,  H04N5/355 ,  H04N5/357 ,  H04N5/378 ,  H03F3/04 ,  H03G3/30 ,  H04N5/3745

CPC classification number: H04N5/363 ,  H03F3/04 ,  H03G3/3089 ,  H04N5/353 ,  H04N5/355 ,  H04N5/357 ,  H04N5/37455 ,  H04N5/378

Abstract: An AD converting unit compares an output signal from an amplifier circuit after reset of a pixel with a reference signal of time-variable, outputs a first digital value, when the output signal from the amplifier circuit in a non-reset state of the pixel is larger than a threshold, sets a gain of the amplifier circuit to a first gain, when the output signal is smaller than the threshold, sets the gain of the amplifier circuit to a second gain larger than the first gain, further after the gain of the amplifier circuit was set to the first or second gain, compares the output signal from the amplifier circuit in the non-reset state of the pixel with the reference signal of time-variable, and outputs a second digital value. When resolutions of the first and second digital values differ, a correcting unit corrects a difference between the resolutions.

公开(公告)号：US20160080040A1

公开(公告)日：2016-03-17

申请号：US14929811

申请日：2015-11-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Nam Yun KIM ,  Sang Wook KWON ,  Yun Kwon PARK ,  Eun Seok PARK ,  Young Tack HONG ,  Ki Young KIM ,  Young Ho RYU ,  Dong Zo KIM ,  Jin Sung CHOI ,  Chang Wook YOON

IPC: H04B5/00 ,  H02M7/04 ,  H03F3/04

CPC classification number: H04B5/0037 ,  H02M7/04 ,  H03F3/04 ,  H04B5/0031 ,  H04B5/0081

Abstract: An apparatus and method for communication using a wireless power are provided. The apparatus includes an amplifier configured to amplify an input signal based on a power supplied to the amplifier. The apparatus further includes a control unit configured to detect a change in an impedance of a target device, and to change the power based on the change in the impedance. The apparatus further includes a demodulation unit configured to receive a message from the target device, and to demodulate the message based on the changed power.

Abstract translation: 提供一种使用无线电力进行通信的装置和方法。 该装置包括放大器，其被配置为基于提供给放大器的功率来放大输入信号。 该装置还包括控制单元，其被配置为检测目标设备的阻抗的变化，并且基于阻抗的变化来改变功率。 该装置还包括解调单元，被配置为从目标设备接收消息，并且基于改变的功率对消息进行解调。

公开(公告)号：US09240762B2

公开(公告)日：2016-01-19

申请号：US14546043

申请日：2014-11-18

Applicant: Dialog Semiconductor GmbH

Inventor： Frank Kronmueller ,  Ambreesh Bhattad

IPC: H03F3/45 ,  G05F1/56 ,  G05F3/26 ,  H03F3/04 ,  H03F3/16 ,  H03F1/22 ,  H03F1/34

CPC classification number: H03F3/45071 ,  G05F1/56 ,  G05F3/262 ,  H03F1/223 ,  H03F1/342 ,  H03F3/04 ,  H03F3/16 ,  H03F3/45381 ,  H03F2200/129 ,  H03F2200/408 ,  H03F2203/45674

Abstract: The present document relates to amplifiers, notably multi-stage amplifiers, such as linear regulators or linear voltage regulators (e.g. low-dropout regulators) configured to provide a constant output voltage subject to load transients. An amplifier comprising an output stage for providing an output current at an output voltage, in dependence of an input voltage at a stage input node of the output stage, is described. The output stage comprises a first input transistor; wherein a gate of the first input transistor is coupled to the stage input node of the output stage. Furthermore, the output stage comprises a first diode transistor; wherein the first diode transistor is arranged in series with the input transistor. In addition, the output stage comprises a pass device configured to provide the output current at the output voltage; wherein the first diode transistor and the pass device form a current mirror.

Abstract translation: 本文件涉及放大器，特别是多级放大器，例如线性稳压器或线性稳压器（例如低压差稳压器），其被配置为提供经受负载瞬变的恒定输出电压。 描述了放大器，其包括用于根据输出级的级输入节点处的输入电压在输出电压处提供输出电流的输出级。 输出级包括第一输入晶体管; 其中所述第一输入晶体管的栅极耦合到所述输出级的所述级输入节点。 此外，输出级包括第一二极管晶体管; 其中所述第一二极管晶体管与所述输入晶体管串联布置。 另外，输出级包括配置成在输出电压下提供输出电流的通过器件; 其中所述第一二极管晶体管和所述通过器件形成电流镜。

公开(公告)号：US20150381120A1

公开(公告)日：2015-12-31

申请号：US14533928

申请日：2014-11-05

Applicant: QUALCOMM Incorporated

Inventor： Xin Fan ,  Vijayakumar Dhanasekaran

IPC: H03F1/32 ,  H03F3/04 ,  H03F1/02

CPC classification number: H03F1/32 ,  H03F1/0205 ,  H03F1/0266 ,  H03F1/086 ,  H03F1/3217 ,  H03F3/04 ,  H03F3/185 ,  H03F3/3023 ,  H03F2200/03 ,  H03F2200/18 ,  H03F2200/555 ,  H03F2201/3215 ,  H03F2203/30105 ,  H03F2203/45248

Abstract: The present disclosure amplifier circuits and methods having boosted slew rates. In one embodiment, an amplifier circuit comprises an output stage comprising a first output transistor, the first output transistor comprising a gate, a source, and a drain, wherein the gate receives a signal to be amplified. A bias circuit biases the gate of the first output transistor. A damping circuit is coupled the gate of the first output transistor and is configured to produce a high impedance at low frequencies and a low impedance at high frequencies. The damping circuit includes a current limit circuit to limit current to the gate of the first output transistor when a voltage on the gate of the first output transistor decreases in response to the signal.

Abstract translation: 本公开的放大器电路和方法具有升压转换速率。 在一个实施例中，放大器电路包括输出级，其包括第一输出晶体管，第一输出晶体管包括栅极，源极和漏极，其中栅极接收待放大的信号。 偏置电路偏置第一输出晶体管的栅极。 阻尼电路耦合第一输出晶体管的栅极，并被配置为在低频下产生高阻抗，在高频下产生低阻抗。 当第一输出晶体管的栅极上的电压响应于该信号而减小时，阻尼电路包括电流限制电路，以限制到第一输出晶体管的栅极的电流。