公开(公告)号：US09673222B2

公开(公告)日：2017-06-06

申请号：US15156506

申请日：2016-05-17

Applicant: GLOBALFOUNDRIES Inc. ,  STMicroelectronics, Inc. ,  International Business Machines Corporation

Inventor： Ajey Poovannummoottil Jacob ,  Kangguo Cheng ,  Bruce Doris ,  Nicolas Loubet ,  Prasanna Khare ,  Rama Divakaruni

IPC: H01L27/12 ,  H01L21/02 ,  H01L27/088 ,  H01L29/78 ,  H01L27/092 ,  H01L29/66 ,  H01L21/84 ,  H01L21/306 ,  H01L21/308

CPC classification number: H01L27/1211 ,  H01L21/02236 ,  H01L21/02255 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02612 ,  H01L21/02614 ,  H01L21/0262 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7849 ,  H01L29/785

Abstract: Methods and semiconductor structures formed from the methods are provided which facilitate fabricating semiconductor fin structures. The methods include, for example: providing a wafer with at least one semiconductor fin extending above a substrate; transforming a portion of the semiconductor fin(s) into an isolation layer, the isolation layer separating a semiconductor layer of the semiconductor fin(s) from the substrate; and proceeding with forming a fin device(s) of a first architectural type in a first fin region of the semiconductor fin(s), and a fin device(s) of a second architectural type in a second fin region of the semiconductor fin(s), where the first architectural type and the second architectural type are different fin device architectures.

公开(公告)号：US09673196B2

公开(公告)日：2017-06-06

申请号：US14559951

申请日：2014-12-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Thomas N. Adam ,  Kangguo Cheng ,  Bruce B. Doris ,  Ali Khakifirooz ,  Alexander Reznicek

IPC: H01L21/336 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L21/28 ,  H01L29/167 ,  H01L21/02 ,  H01L21/84

CPC classification number: H01L27/088 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/0257 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/28008 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/84 ,  H01L29/167 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66606 ,  H01L29/7834 ,  H01L29/7848

Abstract: A method including providing a semiconductor substrate including a first semiconductor device and a second semiconductor device, the first and second semiconductor devices including dummy spacers, dummy gates, and extension regions; protecting the second semiconductor device with a mask; removing the dummy spacers from the first semiconductor device; and depositing in-situ doped epitaxial regions on top of the extension regions of the first semiconductor device.

公开(公告)号：US20170140994A1

公开(公告)日：2017-05-18

申请号：US15419346

申请日：2017-01-30

Applicant: International Business Machines Corporation ,  GLOBALFOUNDRIES Inc.

Inventor： Xiuyu Cai ,  Kangguo Cheng ,  Johnathan E. Faltermeier ,  Ali Khakifirooz ,  Theodorus E. Standaert ,  Ruilong Xie

IPC: H01L21/8234 ,  H01L21/84 ,  H01L29/78 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  H01L21/311 ,  H01L27/088

CPC classification number: H01L21/823437 ,  H01L21/31111 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/845 ,  H01L27/088 ,  H01L27/0886 ,  H01L29/0847 ,  H01L29/41783 ,  H01L29/665 ,  H01L29/66795 ,  H01L29/785

Abstract: A gate structure straddling a plurality of semiconductor material portions is formed. Source regions and drain regions are formed in the plurality of semiconductor material portions, and a gate spacer laterally surrounding the gate structure is formed. Epitaxial active regions are formed from the source and drain regions by a selective epitaxy process. The assembly of the gate structure and the gate spacer is cut into multiple portions employing a cut mask and an etch to form multiple gate assemblies. Each gate assembly includes a gate structure portion and two disjoined gate spacer portions laterally spaced by the gate structure portion. Portions of the epitaxial active regions can be removed from around sidewalls of the gate spacers to prevent electrical shorts among the epitaxial active regions. A dielectric spacer or a dielectric liner may be employed to limit areas in which metal semiconductor alloys are formed.

公开(公告)号：US09647093B2

公开(公告)日：2017-05-09

申请号：US15073065

申请日：2016-03-17

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Kangguo Cheng ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/306 ,  H01L21/02 ,  H01L21/308

CPC classification number: H01L21/3086 ,  H01L21/02164 ,  H01L21/02233 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/31 ,  H01L21/324 ,  H01L29/66795

Abstract: A method of making a semiconductor device includes patterning a fin in a substrate; performing a first etching process to remove a portion of the fin to cut the fin into a first cut fin and a second cut fin, the first cut fin having a first fin end and a second fin end and the second cut fin having a first fin end and a second fin end; forming an oxide layer along an endwall of the first fin end and an endwall of the second fin end of the first cut fin, and an endwall of the first fin end and an endwall of the second fin end of the second cut fin; disposing a liner onto the oxide layer disposed onto the endwall of the first fin end of the first cut fin to form a bilayer liner; and performing a second etching process to remove a portion of the second cut fin.

公开(公告)号：US20170125539A1

公开(公告)日：2017-05-04

申请号：US15233315

申请日：2016-08-10

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES INC.

Inventor： Kangguo Cheng ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/49 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78 ,  H01L29/423

CPC classification number: H01L29/4991 ,  H01L21/28114 ,  H01L21/28132 ,  H01L21/283 ,  H01L21/31 ,  H01L21/31111 ,  H01L21/764 ,  H01L21/76802 ,  H01L21/7682 ,  H01L21/76879 ,  H01L21/823468 ,  H01L21/823864 ,  H01L23/5226 ,  H01L29/401 ,  H01L29/41775 ,  H01L29/41791 ,  H01L29/42376 ,  H01L29/515 ,  H01L29/517 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

Abstract: A semiconductor device that includes a gate structure on a channel region of a semiconductor device. Source and drain regions may be present on opposing sides of the channel region. The semiconductor device may further include a composite gate sidewall spacer present on a sidewall of the gate structure. The composite gate sidewall spacer may include a first composition portion having an air gap encapsulated therein, and a second composition portion that is entirely solid and present atop the first composition portion.

公开(公告)号：US20170077266A1

公开(公告)日：2017-03-16

申请号：US15361994

申请日：2016-11-28

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Kangguo Cheng ,  Zuoguang Liu ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/66 ,  H01L29/08 ,  H01L29/267 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L29/66636 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/28518 ,  H01L21/324 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/41791 ,  H01L29/45 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851 ,  H01L2029/7858

Abstract: A method of making a semiconductor device includes forming a fin in a substrate; depositing a first spacer material to form a first spacer around the fin; depositing a second spacer material to form a second spacer over the first spacer; recessing the first spacer and the second spacer; removing the first spacer; and performing an epitaxial growth process to form epitaxial growth on an end of the fin, along a sidewall of the fin, and adjacent to the fin.

Abstract translation: 制造半导体器件的方法包括在衬底中形成翅片; 沉积第一间隔物材料以在翅片周围形成第一间隔物; 沉积第二间隔物材料以在所述第一间隔物上形成第二间隔物; 使第一间隔物和第二间隔物凹陷; 去除第一间隔物; 以及执行外延生长工艺，以沿翅片的侧壁，并且与翅片相邻地在翅片的端部上形成外延生长。

公开(公告)号：US20170077258A1

公开(公告)日：2017-03-16

申请号：US15278925

申请日：2016-09-28

Applicant: International Business Machines Corporation ,  GLOBALFOUNDRIES Inc.

Inventor： Kangguo Cheng ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/49 ,  H01L21/768 ,  H01L23/535

CPC classification number: H01L29/4991 ,  H01L21/76805 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76895 ,  H01L21/76897 ,  H01L29/66568

Abstract: Techniques for preventing leakage of contact material into air-gap spacers during contact formation. For example, a method comprises forming a contact trench on a semiconductor structure over an air-gap spacer and depositing a liner in the contact trench. The liner deposition material fills a portion of the air-gap spacer pinching off the contact trench to the air-gap spacer.

公开(公告)号：US20170053997A1

公开(公告)日：2017-02-23

申请号：US14829843

申请日：2015-08-19

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Kangguo Cheng ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/66 ,  H01L29/417 ,  H01L29/78

CPC classification number: H01L29/66553 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/0228 ,  H01L21/28079 ,  H01L21/76897 ,  H01L29/41791 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: A method of making a semiconductor device includes patterning a fin in a substrate; forming a gate between source/drain regions over the substrate, the gate having a dielectric spacer along a sidewall; removing a portion of the dielectric spacer and filling with a metal oxide to form a spacer having a first spacer portion and a second spacer portion; forming a source/drain contact over at least one of the source/drain regions; recessing the source/drain contact and forming a via contact over the source/drain contact; and forming a gate contact over the gate, the gate contact having a first gate contact portion contacting the gate and a second gate contact portion positioned over the first gate contact portion; wherein the first spacer portion isolates the first gate contact portion from the source/drain contact, and the second spacer portion isolates the second gate contact portion from the source/drain contact.

Abstract translation: 制造半导体器件的方法包括：在衬底中图形化翅片; 在衬底上的源极/漏极区域之间形成栅极，栅极具有沿侧壁的电介质间隔物; 去除电介质间隔物的一部分并填充金属氧化物以形成具有第一间隔部分和第二间隔部分的间隔物; 在所述源/漏区中的至少一个上形成源极/漏极接触; 凹陷源极/漏极接触并在源极/漏极接触件上形成通孔接触; 以及在所述栅极上形成栅极接触，所述栅极接触具有接触所述栅极的第一栅极接触部分和位于所述第一栅极接触部分上方的第二栅极接触部分; 其中所述第一间隔部分将所述第一栅极接触部分与所述源极/漏极接触部隔离，并且所述第二间隔部分将所述第二栅极接触部分与所述源极/漏极接触部隔离。

公开(公告)号：US20170047411A1

公开(公告)日：2017-02-16

申请号：US14824349

申请日：2015-08-12

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Kangguo Cheng ,  Zuoguang Liu ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L21/285 ,  H01L21/324 ,  H01L29/45 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/02

CPC classification number: H01L29/66636 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/28518 ,  H01L21/324 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/41791 ,  H01L29/45 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851 ,  H01L2029/7858

Abstract: A method of making a semiconductor device includes forming a fin in a substrate; depositing a first spacer material to form a first spacer around the fin; depositing a second spacer material to form a second spacer over the first spacer; recessing the first spacer and the second spacer; removing the first spacer; and performing an epitaxial growth process to form epitaxial growth on an end of the fin, along a sidewall of the fin, and adjacent to the fin.

公开(公告)号：US20170047256A1

公开(公告)日：2017-02-16

申请号：US14824360

申请日：2015-08-12

Applicant: International Business Machines Corporation ,  GlobalFoundries, Inc.

Inventor： Kangguo Cheng ,  Ruilong Xie ,  Tenko Yamashita

IPC: H01L21/8234 ,  H01L29/66 ,  H01L27/088 ,  H01L29/45 ,  H01L29/417 ,  H01L29/78 ,  H01L21/283

CPC classification number: H01L21/28518 ,  H01L21/283 ,  H01L21/76897 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823475 ,  H01L27/0886 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/45 ,  H01L29/456 ,  H01L29/665 ,  H01L29/66795 ,  H01L29/7851 ,  H01L2029/7858

Abstract: A method of making a semiconductor device includes forming a recessed fin in a substrate, the recessed fin being substantially flush with a surface of the substrate; performing an epitaxial growth process over the recessed fin to form a source/drain over the recessed fin; and disposing a conductive metal around the source/drain.

Abstract translation: 制造半导体器件的方法包括在衬底中形成凹形翅片，所述凹形翅片基本上与所述衬底的表面齐平; 在所述凹入的翅片上执行外延生长工艺以在所述凹入的翅片上形成源极/漏极; 并且在源极/漏极周围设置导电金属。