公开(公告)号：US20040053434A1

公开(公告)日：2004-03-18

申请号：US09952626

申请日：2001-09-13

Applicant: Silicon Light Machines

Inventor： Mike Bruner

IPC: H01L021/00

CPC classification number: B81C1/00484 ,  B81B2201/0271 ,  B81B2203/0136 ,  B81C1/00246 ,  B81C1/00333 ,  B81C2201/0109 ,  B81C2201/014 ,  B81C2203/0136 ,  B81C2203/0735

Abstract: The current invention provides for encapsulated release structures, intermediates thereof and methods for their fabrication. The multi-layer structure has a capping layer, that preferably comprises silicon oxide and/or silicon nitride, and which is formed over an etch resistant substrate. A patterned device layer, preferably comprising silicon nitride, is embedded in a sacrificial material, preferably comprising polysilicon, and is disposed between the etch resistant substrate and the capping layer. Access trenches or holes are formed in to capping layer and the sacrificial material are selectively etched through the access trenches, such that portions of the device layer are release from sacrificial material. The etchant preferably comprises a noble gas fluoride NGF2x (wherein NgnullXe, Kr or Ar: and where xnull1, 2 or 3). After etching that sacrificial material, the access trenches are sealed to encapsulate released portions the device layer between the etch resistant substrate and the capping layer. The current invention is particularly useful for fabricating MEMS devices, multiple cavity devices and devices with multiple release features.

Abstract translation: 本发明提供了包封的释放结构，其中间体及其制备方法。 多层结构具有覆盖层，其优选地包括氧化硅和/或氮化硅，并且其形成在耐蚀刻衬底上。 优选地包括氮化硅的图案化器件层嵌入牺牲材料中，优选地包括多晶硅，并且设置在耐蚀刻衬底和覆盖层之间。 进入沟槽或孔形成在覆盖层中，并且牺牲材料通过进入沟槽被选择性地蚀刻，使得器件层的部分从牺牲材料释放。 蚀刻剂优选包含惰性气体氟化物NGF2x（其中Ng = Xe，Kr或Ar：其中x = 1,2或3）。 在蚀刻该牺牲材料之后，进入沟槽被密封以将器件层的释放部分封装在耐蚀刻衬底和覆盖层之间。 本发明对于制造具有多个释放特征的MEMS器件，多腔器件和器件特别有用。

公开(公告)号：US20040007468A1

公开(公告)日：2004-01-15

申请号：US10434497

申请日：2003-05-07

Applicant: MEMGen Corporation

Inventor： Adam L. Cohen ,  Michael S. Lockard ,  Dale S. McPherson

IPC: C25D005/02

CPC classification number: B81C1/00126 ,  B33Y10/00 ,  B33Y70/00 ,  B81B2201/042 ,  B81C1/00476 ,  B81C2201/014 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  G01P15/0802 ,  G01P15/125 ,  H01P1/202 ,  H01P3/06 ,  H01P5/183 ,  H01P11/00 ,  H01P11/005 ,  H05K3/4647

Abstract: Multilayer structures are electrochemically fabricated from at least one structural material (e.g. nickel), that is configured to define a desired structure and which may be attached to a substrate, and from at least one sacrificial material (e.g. copper) that surrounds the desired structure. After structure formation, the sacrificial material is removed by a multi-stage etching Operation. In some embodiments sacrificial material to be removed may be located within passages or the like on a substrate or within an add-on component. The multi-stage etching Operations may be separated by intermediate post processing activities, they may be separated by cleaning Operations, or barrier material removal Operations, or the like. Barriers may be fixed in position by contact with structural material or with a substrate or they may be solely fixed in position by sacrificial material and are thus free to be removed after all retaining sacrificial material is etched.

Abstract translation: 多层结构由至少一种结构材料（例如镍）进行电化学制造，其被构造成限定期望的结构并且可以附着到基底上，并且由至少一种围绕期望结构的牺牲材料（例如铜）制成。 在结构形成之后，通过多级蚀刻操作去除牺牲材料。 在一些实施例中，待移除的牺牲材料可以位于基底上或附加部件内的通道等内。 多级蚀刻操作可以通过中间后处理活动分开，它们可以通过清洁操作或阻隔材料去除操作等分开。 障碍物可以通过与结构材料或基底接触而固定在适当的位置，或者它们可以通过牺牲材料单独固定在适当位置，并且因此在所有保留的牺牲材料被蚀刻之后可以被自由地去除。

公开(公告)号：US06673694B2

公开(公告)日：2004-01-06

申请号：US10038890

申请日：2002-01-02

Applicant: Jeffrey T. Borenstein

Inventor： Jeffrey T. Borenstein

IPC: H01L2176

CPC classification number: B81C1/00119 ,  B81B2201/0235 ,  B81C1/00357 ,  B81C2201/0132 ,  B81C2201/014 ,  B81C2201/019 ,  B81C2201/0191

Abstract: The invention provides a general fabrication method for producing MicroElectroMechanical Systems (MEMS) and related devices using Silicon-On-Insulator (SOI). One first obtains an SOI wafer that has (i) a handle layer, (ii) a a dielectric layer, and (iii) a device layer. A mesa etch has been made on the device layer of the SOI wafer and a structural etch has been made on the dielectric layer of the SOI wafer. One then obtains a substrate (such as glass or silicon), where a pattern has been etched onto the substrate. The SOI wafer and the substrate are bonded together. Then the handle layer of the SOI wafer is removed, followed by the dielectric layer of the SOI wafer.

Abstract translation: 本发明提供了使用绝缘体上硅（SOI）制造微电子机械系统（MEMS）和相关器件的一般制造方法。 首先获得具有（i）手柄层，（ii）介电层和（iii）器件层）的SOI晶片。 已经在SOI晶片的器件层上进行了台面蚀刻，并且在SOI晶片的电介质层上进行了结构蚀刻。 然后，获得衬底（例如玻璃或硅），其中已将图案蚀刻到衬底上。 SOI晶片和衬底结合在一起。 然后去除SOI晶片的手柄层，随后是SOI晶片的电介质层。

公开(公告)号：US06667245B2

公开(公告)日：2003-12-23

申请号：US10016894

申请日：2001-12-13

Applicant: Lap-Wai Chow ,  Tsung-Yuan Hsu ,  Daniel J. Hyman ,  Robert Y. Loo ,  Paul Ouyang ,  James H. Schaffner ,  Adele Schmitz ,  Robert N. Schwartz

Inventor： Lap-Wai Chow ,  Tsung-Yuan Hsu ,  Daniel J. Hyman ,  Robert Y. Loo ,  Paul Ouyang ,  James H. Schaffner ,  Adele Schmitz ,  Robert N. Schwartz

IPC: H01L2100

CPC classification number: B81C1/00246 ,  B81B2201/014 ,  B81C2201/014 ,  B81C2203/0714 ,  B81C2203/0735 ,  H01H1/58 ,  H01H59/0009 ,  H01H2001/0057

Abstract: A microelectromechanical (MEM) switch is fabricated inexpensively by using processing steps which are standard for fabricating multiple metal layer integrated circuits, such as CMOS. The exact steps may be adjusted to be compatible with the process of a particular foundry, resulting in a device which is both low cost and readily integrable with other circuits. The processing steps include making contacts for the MEM switch from metal plugs which are ordinarily used as vias to connect metal layers which are separated by a dielectric layer. Such contact vias are formed on either side of a sacrificial metallization area, and then the interconnect metallization is removed from between the contact vias, leaving them separated. Dielectric surrounding the contacts is etched back so that they protrude toward each other. Thus, when the contacts are moved toward each other by actuating the MEM switch, they connect firmly without obstruction. Tungsten is typically used to form vias in CMOS processes, and it makes an excellent contact material, but other via metals may also be employed as contacts. Interconnect metallization may be employed for other structural and interconnect needs of the MEM switch, and is preferably standard for the foundry and process used. Various metals and dielectric materials may be used to create the switches, but in a preferred embodiment the interconnect metal layers are aluminum and the dielectric material is SiO2, materials which are fully compatible with standard four-layer CMOS fabrication processes.

公开(公告)号：US20030183887A1

公开(公告)日：2003-10-02

申请号：US10384495

申请日：2003-03-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eun-sung Lee ,  Chung-woo Kim ,  In-sang Song ,  Jong-seok Kim ,  Moon-chul Lee

IPC: H01L021/00 ,  H01L027/14 ,  H01L029/82

CPC classification number: B81B3/0078 ,  B81B2201/014 ,  B81B2203/0118 ,  B81B2203/0307 ,  B81B2203/04 ,  B81C2201/0107 ,  B81C2201/014 ,  H01H59/0009

Abstract: A method for fabricating a MEMS device having a fixing part fixed to a substrate, a connecting part, a driving part, a driving electrode, and contact parts, includes patterning the driving electrode on the substrate; forming an insulation layer on the substrate; patterning the insulation layer and etching a fixing region and a contact region of the insulation layer; forming a metal layer over the substrate; planarizing the metal layer until the insulation layer is exposed; forming a sacrificial layer on the substrate; patterning the sacrificial layer to form an opening exposing a portion of the insulation layer and the metal layer in the fixing region; forming a MEMS structure layer on the sacrificial layer to partially fill the opening, thereby forming sidewalls therein; and selectively removing a portion of the sacrificial layer by etching so that a portion of the sacrificial layer remains in the fixing region.

Abstract translation: 一种用于制造具有固定到基板上的固定部件，连接部件，驱动部件，驱动电极和接触部件的MEMS器件的方法，包括在所述基板上图形化所述驱动电极; 在所述基板上形成绝缘层; 图案化绝缘层并蚀刻绝缘层的固定区域和接触区域; 在衬底上形成金属层; 平坦化金属层直到绝缘层露出; 在所述基板上形成牺牲层; 图案化牺牲层以形成露出固定区域中绝缘层和金属层的一部分的开口; 在所述牺牲层上形成MEMS结构层以部分地填充所述开口，从而在其中形成侧壁; 并且通过蚀刻选择性地去除牺牲层的一部分，使得牺牲层的一部分保留在固定区域中。

公开(公告)号：US06627096B2

公开(公告)日：2003-09-30

申请号：US09847798

申请日：2001-05-02

Applicant: David W. Sherrer ,  Gregory A. Ten Eyck ,  Dan A. Steinberg ,  Neal Ricks

Inventor： David W. Sherrer ,  Gregory A. Ten Eyck ,  Dan A. Steinberg ,  Neal Ricks

IPC: H01L2100

CPC classification number: B81C1/00126 ,  B81B2203/0384 ,  B81C1/00428 ,  B81C2201/0132 ,  B81C2201/014 ,  B81C2201/0178 ,  G02B6/3636 ,  G02B6/3652 ,  G02B6/3692 ,  G02B6/423 ,  G02B2006/12176

Abstract: Methods for making a micromachined device (e.g. an microoptical submount) having positive features (extending up from a device surface) and negative features (extending into the device surface). The present techniques locate the postive feature and negative features according to a single mask step. In one embodiment, a hard mask is patterned on top of the device layer of an SOI wafer. Then, RIE is used to vertically etch to the etch stop layer, forming the positive feature. Then, the positive feature is masked, and metal or hard mask is deposited on the exposed areas of the etch stop layer. Then, portions of the device layer are removed, leaving the patterned metal layer on the etch stop layer. Then, the etch stop layer is removed in an exposed area, uncovering the handle layer. Then, the handle layer is etched in an exposed area to form the negative feature.

Abstract translation: 用于制造具有正特征（从器件表面向上延伸）和负特征（延伸到器件表面）的微加工器件（例如，微光学基座）的方法。 本技术根据单个掩模步骤定位了后置特征和负特征。 在一个实施例中，在SOI晶片的器件层的顶部上形成硬掩模。 然后，RIE用于垂直蚀刻到蚀刻停止层，形成阳性特征。 然后，正面特征被掩蔽，并且金属或硬掩模沉积在蚀刻停止层的暴露区域上。 然后，去除器件层的部分，留下图案化的金属层在蚀刻停止层上。 然后，在曝光区域中去除蚀刻停止层，露出手柄层。 然后，在曝光区域中蚀刻手柄层以形成负面特征。

公开(公告)号：US06556737B1

公开(公告)日：2003-04-29

申请号：US09705416

申请日：2000-11-02

Applicant: Denny K. Miu ,  Weilong Tang ,  Viktoria Temesvary ,  Brent E. Burns

Inventor： Denny K. Miu ,  Weilong Tang ,  Viktoria Temesvary ,  Brent E. Burns

IPC: G02B642

CPC classification number: G02B26/0833 ,  B81B2201/047 ,  B81C1/00182 ,  B81C2201/0133 ,  B81C2201/014 ,  G02B6/3518 ,  G02B6/3572 ,  G02B6/3584 ,  G02B26/085

Abstract: A fiber-optic microswitch is disclosed that includes a flexible mirror positioning structure including an outer fixed frame, a movable platform upon which a mirror is formed, and two or more resilient support members (e.g., monocrystalline silicon springs or torsion beams) connecting the movable platform to the fixed frame. Stationary fibers are mounted over the mirror. An electromagnetic drive mechanism is provided for positioning the movable platform relative to the fixed frame. The electromagnetic drive mechanism includes one or more coils formed on a drive substrate mounted under the monocrystalline structure, and one or more pole pieces that are mounted on the movable platform. Currents are selectively applied to the coils to generate attractive electromagnetic forces that pull the pole pieces, thereby causing the movable platform to move (e.g., tilt) relative to the fixed frame, thereby selectively directing light from one fiber to another. Various monocrystalline structures are disclosed.

Abstract translation: 公开了一种光纤微型开关，其包括柔性反射镜定位结构，其包括外部固定框架，其上形成有反射镜的可移动平台以及连接可移动的两个或更多个弹性支撑构件（例如，单晶硅弹簧或扭力梁） 平台到固定框架。 固定纤维安装在镜子上。 提供电磁驱动机构用于相对于固定框架定位可移动平台。 电磁驱动机构包括形成在安装在单晶结构下的驱动基板上的一个或多个线圈和安装在可移动平台上的一个或多个极片。 电流被选择性地施加到线圈以产生有吸引力的电磁力，其拉动极片，从而使可移动平台相对于固定框架移动（例如倾斜），从而将光从一个光纤选择性地引导到另一个光纤。 公开了各种单晶结构。

公开(公告)号：US06541834B1

公开(公告)日：2003-04-01

申请号：US09975125

申请日：2001-10-09

Applicant: Jin-shown Shie ,  Ji-cheng Lin ,  Chun-te Lin ,  Chih-tang Peng ,  Shih-han Yu ,  Kuo-ning Chiang

Inventor： Jin-shown Shie ,  Ji-cheng Lin ,  Chun-te Lin ,  Chih-tang Peng ,  Shih-han Yu ,  Kuo-ning Chiang

IPC: H01L2982

CPC classification number: B81C1/00182 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/014 ,  B81C2201/016 ,  G01L9/0054

Abstract: The invention is a silicon pressure micro-sensing device and the fabrication process thereof. The silicon pressure micro-sensing device includes a pressure chamber, and is constituted of a P-type substrate with a taper chamber and an N-type epitaxial layer thereon. On the N-type epitaxial layer are a plurality of piezo-resistance sensing units which sense deformation caused by pressure. The fabrication pressure of the silicon pressure micro-sensing device includes a step of first making a plurality of holes on the N-type epitaxial layer to reach the P-type substrate beneath. Then, by an anisotropic etching stop technique, in which etchant pass through the holes, a taper chamber is formed in the P-type substrate. Finally, an insulating material is applied to seal the holes, thus attaining the silicon pressure micro-sensing device that is able to sense pressure differences between two ends thereof.

Abstract translation: 本发明是一种硅压力微型感测装置及其制造方法。 硅压力微型感测装置包括压力室，由具有锥形室的P型衬底和其上的N型外延层构成。 在N型外延层上是感测由压力引起的变形的多个压电感测单元。 硅压力微型感测装置的制造压力包括首先在N型外延层上制造多个孔以到达下面的P型衬底的步骤。 然后，通过各向异性蚀刻停止技术，其中蚀刻剂穿过孔，在P型衬底中形成锥形室。 最后，施加绝缘材料以密封孔，从而获得能够感测其两端之间的压力差的硅压力微检测装置。

公开(公告)号：US20030013246A1

公开(公告)日：2003-01-16

申请号：US10223874

申请日：2002-08-20

Applicant: HRL Laboratories, LLC

Inventor： Randall L. Kubena ,  David T. Chang

IPC: H01L021/8238

CPC classification number: B81C1/0015 ,  B81B2201/0242 ,  B81C2201/014 ,  B81C2201/0191 ,  B81C2203/036 ,  G01C19/5656 ,  G01P15/0802 ,  G01P15/0894

Abstract: A method of making a micro electromechanical gyroscope. A cantilevered beam structure, first portions of side drive electrodes and a mating structure are defined on a first substrate or wafer; and at least one contact structure, second portions of the side drive electrodes and a mating structure are defined on a second substrate or wafer, the mating structure on the second substrate or wafer being of a complementary shape to the mating structure on the first substrate or wafer and the first and second portions of the side drive electrodes being of a complementary shape to each other. A bonding layer, preferably a eutectic bonding layer, is provided on at least one of the mating structures and one or the first and second portions of the side drive electrodes. The mating structure of the first substrate is moved into a confronting relationship with the mating structure of the second substrate or wafer. Pressure is applied between the two substrates so as to cause a bond to occur between the two mating structures at the bonding or eutectic layer and also between the first and second portions of the side drive electrodes to cause a bond to occur therebetween. Then the first substrate or wafer is removed to free the cantilevered beam structure for movement relative to the second substrate or wafer. The bonds are preferably eutectic bonds.

公开(公告)号：US06428713B1

公开(公告)日：2002-08-06

申请号：US09410713

申请日：1999-10-01

Applicant: John Carl Christenson ,  Steven Edward Staller ,  John Emmett Freeman ,  Troy Allan Chase ,  Robert Lawrence Healton ,  David Boyd Rich

Inventor： John Carl Christenson ,  Steven Edward Staller ,  John Emmett Freeman ,  Troy Allan Chase ,  Robert Lawrence Healton ,  David Boyd Rich

IPC: H01L2100

CPC classification number: B81C1/0019 ,  B81B2201/0235 ,  B81C2201/014 ,  B81C2201/019

Abstract: A micro-electro-mechanical structure including a semiconductor layer mounted to an annular support structure via an isolation layer wherein the semiconductor layer is micromachined to form a suspended body having a plurality of suspension projections extending from the body to the rim and groups of integral projections extending toward but spaced from the rim between said suspension projections. Each projection in said groups has a base attached to the body and a tip proximate the rim. The structure includes a plurality of inward projections extending from and supported on the rim and toward the body. Each such projection has a base attached to the rim and a tip proximate the body; wherein the grouped projections and the inward projections are arranged in an interdigitated fashion to define a plurality of proximate projection pairs independent of the suspension elements such that a primary capacitive gap is defined between the projections of each projection pair. Also, a process is disclosed for fabricating the micro-electro-mechanical structure including the steps of removing a highly doped etch termination layer and thereafter etching through a lightly doped epitaxial layer to thereby define and release the structure.

Abstract translation: 一种微电子机械结构，其包括通过隔离层安装到环形支撑结构的半导体层，其中半导体层被微加工以形成具有从主体延伸到边缘的多个悬架突起的悬挂体和一组整体突起 从所述悬挂突起之间的边缘延伸到边缘。 所述组中的每个突起具有附接到主体的基部和靠近边缘的尖端。 该结构包括从边缘延伸并支撑在边缘上并朝向身体的多个向内突起。 每个这样的突起具有附接到边缘的基部和靠近身体的尖端; 其中分组的突起和向内的突出部以交错方式布置以限定独立于悬挂元件的多个邻近的投影对，使得在每个突起对的突起之间限定初级电容间隙。 此外，公开了一种用于制造微电子机械结构的方法，包括以下步骤：去除高度掺杂的蚀刻终止层，然后蚀刻通过轻掺杂的外延层从而限定和释放结构。