公开(公告)号：US07271493B2

公开(公告)日：2007-09-18

申请号：US11112108

申请日：2005-04-21

申请人： Chien Ping Huang ,  Yu-Po Wang ,  Chih-Ming Huang

发明人： Chien Ping Huang ,  Yu-Po Wang ,  Chih-Ming Huang

IPC分类号： H01L29/40

CPC分类号： H01L21/4857 ,  H01L21/4832 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/142 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/4985 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/81801 ,  H01L2224/85001 ,  H01L2224/85439 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in turn deposited over the dielectric material layer and solder materials, and the first and second copper layers are patterned to form a plurality of conductive traces each of which has a terminal coated with a metal layer. A chip is mounted on the conductive traces and electrically connected to the terminals by bonding wires, with the dielectric material layer and solder materials being exposed to the outside. This package structure can flexibly arrange the conductive traces and effectively shorten the bonding wires, thereby improve trace routability and quality of electrical connection for the semiconductor package.

摘要翻译： 提供一种半导体封装及其制造方法，其中使用形成有多个开口的电介质材料层，并且将焊料材料施加到每个开口中。 第一铜层和第二铜层又沉积在介电材料层和焊料材料上，并且第一和第二铜层被图案化以形成多个导电迹线，每个导电迹线具有涂覆有金属层的端子。 芯片安装在导电迹线上，并通过接合线电连接到端子，电介质材料层和焊料材料暴露于外部。 该封装结构可以灵活地布置导电迹线并有效地缩短接合线，从而提高半导体封装的迹线布线性和电连接质量。

公开(公告)号：US20070202633A1

公开(公告)日：2007-08-30

申请号：US11651708

申请日：2007-01-09

申请人： Wen-Tsung Tseng ,  Fang-Lin Tsai ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

发明人： Wen-Tsung Tseng ,  Fang-Lin Tsai ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

IPC分类号： H01L21/00

CPC分类号： H01L21/4882 ,  H01L23/3675 ,  H01L23/544 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2223/5442 ,  H01L2223/54473 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/01079 ,  H01L2924/16152 ,  H01L2924/16315 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

摘要： A semiconductor package and a method for fabricating the same are provided. The method includes providing a substrate having recognition points and a heat sink having openings, and placing the heat sink on the substrate with the recognition points being exposed through the openings; using a checking system to inspect the recognition points through the openings so as to ensure that the heat sink is placed at a predetermined position on the substrate; and attaching the heat sink to the substrate via an adhesive. By the above semiconductor package and method, there is no need to form positioning holes in the substrate such that any adverse effect on the circuit layout and reliability of the semiconductor package is avoided, and any positional shifting of the heat sink relative to the substrate can be determined in a real time manner.

摘要翻译： 提供半导体封装及其制造方法。 该方法包括提供具有识别点的基板和具有开口的散热器，并且将散热器放置在基板上，识别点通过开口露出; 使用检查系统通过开口检查识别点，以确保散热器被放置在基板上的预定位置; 以及通过粘合剂将散热器附接到基板。 通过上述半导体封装和方法，不需要在衬底中形成定位孔，从而避免对半导体封装的电路布局和可靠性的任何不利影响，并且散热片相对于衬底的任何位置偏移可以 以实时的方式确定。

公开(公告)号：US20070164386A1

公开(公告)日：2007-07-19

申请号：US11648045

申请日：2006-12-28

申请人： Cheng-Yi Chang ,  Chien-Ping Huang ,  Yu-Po Wang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

发明人： Cheng-Yi Chang ,  Chien-Ping Huang ,  Yu-Po Wang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L31/0203 ,  H01L21/56

CPC分类号： H01L27/14687 ,  H01L24/97 ,  H01L27/14618 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/8592 ,  H01L2224/97 ,  H01L2924/01033 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2224/85 ,  H01L2924/00014

摘要： A semiconductor device and the fabrication method thereof are provided. The fabrication method includes providing a substrate module plate having a plurality of substrates; attaching at least one sensor chip to each of the substrates of the substrate module plate; electrically connecting each of the sensor chips to each of the substrates through bonding wires; forming an insulating layer between each sensor chip on the substrate module plate, wherein the height of the insulating layers are not greater than the thickness of the sensor chips so as to prevent flash from the insulating layers from contaminating the sensor chips; forming an adhesive lip on the insulating layer or forming a second insulating layer followed by forming the adhesive layer, wherein the adhesive layer or the second insulating layer is higher than the highest loop-height of the bonding wires; adhering a light transmitting cover to each adhesive layer to cover the sensor chip; and cutting the substrate module plate to separate the substrates to form a plurality of semiconductor devices each integrated with at least one sensor chip. As the adhesive layers are not in contact with the bonding wires, the problems of damaging or breaking the bonding wires can be prevented in the process of adhering the light transmitting cover.

摘要翻译： 提供半导体器件及其制造方法。 该制造方法包括提供具有多个基板的基板模块板; 将至少一个传感器芯片附接到所述基板模块板的每个基板; 通过接合线将每个传感器芯片电连接到每个基板; 在衬底模块板上的每个传感器芯片之间形成绝缘层，其中绝缘层的高度不大于传感器芯片的厚度，以防止来自绝缘层的闪光污染传感器芯片; 在所述绝缘层上形成粘合剂唇缘或形成第二绝缘层，接着形成所述粘合剂层，其中所述粘合剂层或所述第二绝缘层高于所述接合线的最高环高度; 将透光盖粘附到每个粘合剂层以覆盖传感器芯片; 以及切割所述基板模块板以分离所述基板以形成多个半导体器件，每个半导体器件与至少一个传感器芯片集成。 由于粘合层不与接合线接触，所以在粘接透光罩的过程中可以防止损坏或断裂接合线的问题。

公开(公告)号：US20070145561A1

公开(公告)日：2007-06-28

申请号：US11643147

申请日：2006-12-20

申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang

发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang

IPC分类号： H01L23/02

CPC分类号： H01L23/3121 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/3025 ,  H05K3/284 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/0989 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00

摘要： An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings for exposing the bond pads. A groove is formed between the paired bond pads and has a length larger than a width of an electronic component mounted on the paired bond pads. The groove is adjacent to one of the paired bond pads and communicates with a corresponding one of the openings where this bond pad is exposed. Accordingly, a clearance between the electronic component and the electronic carrier board can be effectively filled with an insulating resin for encapsulating the electronic component, thereby preventing voids and undesirable electrical bridging between the paired bond pads from occurrence.

摘要翻译： 提供电子载体板及其封装结构。 电子载板包括载体，形成在载体上的至少一对接合焊盘和覆盖载体的保护层。 保护层形成有用于暴露接合焊盘的开口。 在成对的接合焊盘之间形成有一个沟槽，其长度大于安装在成对接合焊盘上的电子部件的宽度。 该沟槽与一对接合焊盘相邻，并与该接合焊盘露出的相应的一个开口连通。 因此，电子部件和电子载体板之间的间隙可以有效地填充用于封装电子部件的绝缘树脂，从而防止成对焊盘之间的空隙和不期望的电桥发生。

公开(公告)号：US20070138632A1

公开(公告)日：2007-06-21

申请号：US11642439

申请日：2006-12-19

申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/34

CPC分类号： H05K3/3452 ,  H05K3/284 ,  H05K3/303 ,  H05K2201/0989 ,  H05K2201/10636 ,  H05K2201/10727 ,  H05K2201/2036 ,  Y02P70/611 ,  Y02P70/613

摘要： An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. An opening is formed in the protective layer to expose at least three sides of each of the paired bond pads. The protective layer includes at least one independent residual portion located in the opening and between the paired bond pads, such that an electronic component is mounted on the independent residual portion and electrically connected to the bond pads. A groove without a dead space is formed between the electronic component and the carrier, such that a molding compound for encapsulating the electronic component can flow through the groove to fill the opening and a space under the electronic component and encapsulate the at least three sides of each of the bond pads.

摘要翻译： 提供电子载体板及其封装结构。 电子载板包括载体，形成在载体上的至少一对接合焊盘和覆盖载体的保护层。 在保护层中形成开口以暴露每个配对接合焊盘的至少三个侧面。 保护层包括至少一个独立的残留部分，位于开口内和成对的接合焊盘之间，使得电子部件安装在独立的残留部分上并电连接到接合焊盘。 在电子部件和载体之间形成没有死空间的凹槽，使得用于封装电子部件的模制化合物可以流过凹槽以填充开口和电子部件下方的空间，并将至少三个侧面 每个接合垫。

公开(公告)号：US07173828B2

公开(公告)日：2007-02-06

申请号：US10674317

申请日：2003-09-29

申请人： Ying-Ren Lin ,  Chih-Ming Huang ,  Ho-Yi Tsai

发明人： Ying-Ren Lin ,  Chih-Ming Huang ,  Ho-Yi Tsai

IPC分类号： H05K1/11

CPC分类号： H05K1/111 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/17 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16106 ,  H01L2224/16237 ,  H01L2224/17051 ,  H01L2224/17106 ,  H01L2924/01087 ,  H01L2924/15311 ,  H05K3/284 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/093 ,  H05K2201/09381 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2224/17104 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A ground pad structure for preventing solder extrusion and a semiconductor package having the ground pad structure are disclosed, wherein the ground pad structure has the ground pads located along the circumference of its ground plane be formed in a non-solder mask defined manner. Accordingly, a good grounding quality is maintained, and the occurrence of the electrical bridging among the adjacent conductive traces can be avoided as the extrusion of the molten solder bumps from the ground pads located along the ground pad structure's circumference toward their adjacent conductive traces is effectively prevented.

摘要翻译： 公开了一种用于防止焊料挤出的接地焊盘结构和具有接地焊盘结构的半导体封装，其中接地焊盘结构具有沿其接地平面的圆周定位的接地焊盘以非阻焊掩模定义的方式形成。 因此，保持良好的接地质量，并且可以避免相邻导电迹线之间的电桥接的发生，因为熔融焊料凸块从沿着接地焊盘结构的圆周朝向其相邻导电迹线的接地焊盘的挤出是有效的 防止了

公开(公告)号：US20060267125A1

公开(公告)日：2006-11-30

申请号：US11162135

申请日：2005-08-30

申请人： Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Yi Chang

发明人： Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Yi Chang

IPC分类号： H01L29/84

CPC分类号： H01L27/14683 ,  H01L27/14618 ,  H01L2224/24226

摘要： A sensor semiconductor device and a method for fabricating the same are proposed. A sensor chip is mounted on a substrate, and a dielectric layer and a circuit layer are formed on the substrate, wherein the circuit layer is electrically connected to the substrate and the sensor chip. The dielectric layer is formed with an opening for exposing a sensor region of the sensor chip. A light-penetrable lid covers the opening of the dielectric layer, such that light is able to penetrate the light-penetrable lid to reach the sensor region and activate the sensor chip. The sensor chip can be electrically connected to an external device via a plurality of solder balls implanted on a surface of the substrate not for mounting the sensor chip. Therefore, the sensor semiconductor device is fabricated in a cost-effective manner, and circuit cracking and a know good die (KGD) problem are prevented.

摘要翻译： 提出了一种传感器半导体器件及其制造方法。 传感器芯片安装在基板上，并且在基板上形成电介质层和电路层，其中电路层电连接到基板和传感器芯片。 电介质层形成有用于暴露传感器芯片的传感器区域的开口。 透光盖子覆盖电介质层的开口，使得光线能够穿透透光盖子到达传感器区域并激活传感器芯片。 传感器芯片可以通过植入在基板的表面上的多个焊球电连接到外部设备，而不用于安装传感器芯片。 因此，传感器半导体器件以成本有效的方式制造，并且防止了电路破裂和知道的裸芯片（KGD）问题。

公开(公告)号：US20060125088A1

公开(公告)日：2006-06-15

申请号：US11267632

申请日：2005-11-03

申请人： Chien-Ping Huang ,  Chih-Ming Huang

发明人： Chien-Ping Huang ,  Chih-Ming Huang

IPC分类号： H01L23/34

CPC分类号： H01L23/3677 ,  H01L21/4871 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/3733 ,  H01L23/4334 ,  H01L23/49548 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/351 ,  Y10T29/49126 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A heat dissipating semiconductor package and a fabrication method thereof are provided. A semiconductor chip is mounted on a chip carrier. A heat sink is mounted on the chip, and includes an insulating core layer, a thin metallic layer formed on each of an upper surface and a lower surface of the insulating core layer and a thermal via hole formed in the insulating core layer. A molding process is performed to encapsulate the chip and the heat sink with an encapsulant to form a package unit. A singulation process is performed to peripherally cut the package unit. A part of the encapsulant above the thin metallic layer on the upper surface of the heat sink is removed, such that the thin metallic layer on the upper surface of the heat sink is exposed, and heat generated by the chip can be dissipated through the heat sink.

公开(公告)号：US20050023704A1

公开(公告)日：2005-02-03

申请号：US10674317

申请日：2003-09-29

申请人： Ying-Ren Lin ,  Chih-Ming Huang ,  Ho-Yi Tsai

发明人： Ying-Ren Lin ,  Chih-Ming Huang ,  Ho-Yi Tsai

IPC分类号： H01L23/498 ,  H01L23/50 ,  H05K1/11 ,  H05K3/28 ,  H05K3/34 ,  H05K7/14 ,  H01L23/48

CPC分类号： H05K1/111 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/17 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16106 ,  H01L2224/16237 ,  H01L2224/17051 ,  H01L2224/17106 ,  H01L2924/01087 ,  H01L2924/15311 ,  H05K3/284 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/093 ,  H05K2201/09381 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2224/17104 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A ground pad structure for preventing solder extrusion and a semiconductor package having the ground pad structure are disclosed, wherein the ground pad structure has the ground pads located along the circumference of its ground plane be formed in a non-solder mask defined manner. Accordingly, a good grounding quality is maintained, and the occurrence of the electrical bridging among the adjacent conductive traces can be avoided as the extrusion of the molten solder bumps from the ground pads located along the ground pad structure's circumference toward their adjacent conductive traces is effectively prevented.

摘要翻译： 公开了一种用于防止焊料挤出的接地焊盘结构和具有接地焊盘结构的半导体封装，其中接地焊盘结构具有沿其接地平面的圆周定位的接地焊盘以非阻焊掩模定义的方式形成。 因此，保持良好的接地质量，并且可以避免相邻导电迹线之间的电桥接的发生，因为熔融焊料凸块从沿着接地焊盘结构的圆周朝向其相邻导电迹线的接地焊盘的挤出是有效的 防止了

公开(公告)号：US06830957B2

公开(公告)日：2004-12-14

申请号：US10452488

申请日：2003-05-30

申请人： Han-Ping Pu ,  Chien-Ping Huang ,  Chih-Ming Huang

发明人： Han-Ping Pu ,  Chien-Ping Huang ,  Chih-Ming Huang

IPC分类号： H01L2144

CPC分类号： H01L24/97 ,  H01L21/565 ,  H01L23/3128 ,  H01L2224/16 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401

摘要： A method of fabricating BGA (Ball Grid Array) packages is proposed, which utilizes a specially-designed carrier to serve as an auxiliary tool to package semiconductor chips on substrates. The carrier is formed with a plurality of cavities respective for receiving a substrate and in communication with an injection gate, such that no injection gate is required on the substrate, thereby not restricting the trace routability on the substrate. Moreover, a two-piece type of mold is allowed being used to form a number of encapsulation bodies at one time, making the fabrication more productive and cost-effective. Furthermore, the proposed BGA fabrication method can be implemented without having to provide an air outlet in the substrate but allows the resulted encapsulation body to be free of voids to assure the quality of the packages. The proposed BGA fabrication method is therefore more advantageous to use than the prior art.

摘要翻译： 提出了一种制造BGA（球栅阵列）封装的方法，该封装采用专门设计的载体作为将半导体芯片封装在衬底上的辅助工具。 载体形成有多个腔体，分别用于接收衬底并与注入栅极连通，使得在衬底上不需要注入栅极，从而不限制衬底上的迹线布线性。 此外，允许两件式的模具一次用于形成多个包封体，使得制造更加生产和成本有效。 此外，可以实现所提出的BGA制造方法，而不必在衬底中提供空气出口，但是允许所得到的封装体没有空隙以确保包装的质量。 因此，提出的BGA制造方法比现有技术更有利于使用。