公开(公告)号：US08012886B2

公开(公告)日：2011-09-06

申请号：US11683234

申请日：2007-03-07

申请人： Yiu Fai Kwan ,  Tat Chi Chan ,  Wai Chan ,  Chi Chung Lee

发明人： Yiu Fai Kwan ,  Tat Chi Chan ,  Wai Chan ,  Chi Chung Lee

IPC分类号： H01L21/31

CPC分类号： C22C1/00 ,  H01L21/4821 ,  H01L23/49582 ,  H01L23/49586 ,  H01L24/45 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/48639 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48839 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/85011 ,  H01L2224/85439 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01047 ,  H01L2924/14 ,  H01L2924/15747 ,  Y10S438/909 ,  Y10S438/974 ,  H01L2924/00 ,  H01L2224/48

摘要： A method is provided for treating a leadframe comprising copper or copper alloy to enhance adhesion of molding compound to it. The leadframe is oxidized in an oxidation treatment bath to form copper oxide on the surface of the leadframe. It is then dipped in a complexing or chelating agent to enhance the purity of the copper oxide formed. Thereafter, the leadframe is cleaned with an acid to remove any contaminants remaining on the leadframe.

摘要翻译： 提供了一种处理包含铜或铜合金的引线框以增强模塑料对其的粘附性的方法。 引线框在氧化处理槽中氧化，在引线框的表面形成氧化铜。 然后将其浸入络合剂或螯合剂中以提高形成的氧化铜的纯度。 此后，用酸清洁引线框架以除去留在引线框架上的任何污染物。

公开(公告)号：US20080061377A1

公开(公告)日：2008-03-13

申请号：US11980265

申请日：2007-10-30

申请人： Richard Williams ,  Michael Cornell ,  Wai Chan

发明人： Richard Williams ,  Michael Cornell ,  Wai Chan

IPC分类号： H01L27/092

CPC分类号： H01L29/7816 ,  H01L21/26513 ,  H01L21/2652 ,  H01L21/74 ,  H01L21/743 ,  H01L21/76216 ,  H01L21/76218 ,  H01L21/82285 ,  H01L21/823481 ,  H01L21/823493 ,  H01L21/823878 ,  H01L21/823892 ,  H01L21/8249 ,  H01L27/0623 ,  H01L27/0922 ,  H01L29/4232 ,  H01L29/4238 ,  H01L29/66272 ,  H01L29/7322 ,  H01L29/7809 ,  H01L29/7813 ,  H01L29/7835

摘要： A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each of the devices is extremely compact, both laterally and vertically, and can be fully isolated from all other devices in the substrate.

公开(公告)号：US07329617B2

公开(公告)日：2008-02-12

申请号：US11019421

申请日：2004-12-22

申请人： Jianxiong Li ,  Chi Chuen Chaw ,  Ngai Kin Tsui ,  Deming Liu ,  Yiu Fai Kwan ,  Wai Chan

发明人： Jianxiong Li ,  Chi Chuen Chaw ,  Ngai Kin Tsui ,  Deming Liu ,  Yiu Fai Kwan ,  Wai Chan

IPC分类号： H01L21/31

CPC分类号： H01L23/3142 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/12044 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method is provided for enhancing adhesion between a molding compound and a semiconductor device comprising a semiconductor chip attached on a carrier, such as a lead frame, by coating the semiconductor device with a polymer primer prior to molding the semiconductor device. Such coating may be performed by dipping, dripping or spraying the semiconductor device in or with a polymer solution.

摘要翻译： 提供了一种通过在模制半导体器件之前通过用聚合物底漆涂覆半导体器件来提高模制化合物和半导体器件之间的粘合性的方法，该半导体器件包括安装在诸如引线框架的载体上的半导体芯片。 可以通过在聚合物溶液中或与聚合物溶液中浸渍，滴加或喷涂半导体器件来进行这种涂覆。

公开(公告)号：US20070044820A1

公开(公告)日：2007-03-01

申请号：US11444870

申请日：2006-06-01

申请人： Wai Chan ,  Andrew Cocking ,  James Livingston ,  William Simpson ,  Douglas Story

发明人： Wai Chan ,  Andrew Cocking ,  James Livingston ,  William Simpson ,  Douglas Story

IPC分类号： B08B7/04 ,  B08B3/00

CPC分类号： B67D7/348 ,  A47L15/4418 ,  A47L15/4454 ,  B67D7/346 ,  B67D7/84 ,  D06F39/022

摘要： A system controls dispensing different chemicals received from containers at a plurality of ports. Each container has data thereon that identifies the chemical within the container. The system reads the data from each container to determine which port is associated with each chemical. When a given chemical is required, the system activates a flow control device coupled to the port associated with that given chemical, thereby supplying the given chemical to a consuming device. Therefore regardless of into which port an operator places a particular chemical, the system automatically knows which port has which chemical and the dispensing is configured accordingly. Various mechanisms for storing the data on and reading the data from the container are described.

摘要翻译： 系统控制在多个端口处分配从容器接收的不同化学品。 每个容器都有数据，用于识别容器内的化学物质。 系统从每个容器读取数据，以确定哪个端口与每个化学品相关联。 当需要给定的化学品时，系统激活耦合到与给定化学品相关联的端口的流量控制装置，从而将给定的化学品供应给消耗装置。 因此，无论操作人员在哪个端口放置特定的化学品，系统会自动知道哪个端口具有哪种化学物质和相应配置的配置。 描述了用于将数据存储在容器上并从容器读取数据的各种机构。

公开(公告)号：US20070025266A1

公开(公告)日：2007-02-01

申请号：US11492487

申请日：2006-07-24

申请人： Neal Riedel ,  Yiorgos Peponides ,  James Petranovich ,  Lawrence Yonge ,  Srinivas Katar ,  Deepak Ayyagari ,  Sherman Gavette ,  Wai Chan

发明人： Neal Riedel ,  Yiorgos Peponides ,  James Petranovich ,  Lawrence Yonge ,  Srinivas Katar ,  Deepak Ayyagari ,  Sherman Gavette ,  Wai Chan

IPC分类号： H04J1/16 ,  H04J3/06

CPC分类号： H04L12/403 ,  H04B3/54 ,  H04B2203/5408 ,  H04L12/413

摘要： There is provided a powerline network that includes a number of stations including a central coordinator for coordinating transmissions of each of the stations. The central coordinator includes a system clock and a network timer and is configurable to transmit a number of network timer values. Each of the network timer values can be transmitted by the central coordinator in one of a number of beacons. Each of the other stations is configurable to utilize the network timer values and a corresponding number of local timer values to estimate a frequency error between the system clock and a local clock and an offset between the network timer and a local timer. Each of the other stations is further configurable to utilize the frequency error and the offset to synchronize the local timer to the network timer.

摘要翻译： 提供了一个电力线网络，其包括多个站，包括用于协调每个站的传输的中央协调器。 中央协调器包括系统时钟和网络定时器，可配置为传输多个网络定时器值。 每个网络定时器值可以由中央协调器在多个信标中的一个发送。 每个其他站可配置为利用网络定时器值和相应数量的本地定时器值来估计系统时钟和本地时钟之间的频率误差以及网络定时器和本地定时器之间的偏移量。 每个其他站可进一步配置以利用频率误差和偏移量来将本地定时器同步到网络定时器。

公开(公告)号：US20060131720A1

公开(公告)日：2006-06-22

申请号：US11019421

申请日：2004-12-22

申请人： Jianxiong Li ,  Chi Chaw ,  Ngai Tsui ,  Deming Liu ,  Yiu Kwan ,  Wai Chan

发明人： Jianxiong Li ,  Chi Chaw ,  Ngai Tsui ,  Deming Liu ,  Yiu Kwan ,  Wai Chan

IPC分类号： H01L21/50 ,  H01L23/24

CPC分类号： H01L23/3142 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/12044 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method is provided for enhancing adhesion between a molding compound and a semiconductor device comprising a semiconductor chip attached on a carrier, such as a lead frame, by coating the semiconductor device with a polymer primer prior to molding the semiconductor device. Such coating may be performed by dipping, dripping or spraying the semiconductor device in or with a polymer solution.

摘要翻译： 提供了一种通过在模制半导体器件之前通过用聚合物底漆涂覆半导体器件来提高模制化合物和半导体器件之间的粘合性的方法，该半导体器件包括安装在诸如引线框架的载体上的半导体芯片。 可以通过在聚合物溶液中或与聚合物溶液中浸渍，滴加或喷涂半导体器件来进行这种涂覆。

公开(公告)号：US20050272207A1

公开(公告)日：2005-12-08

申请号：US11204215

申请日：2005-08-15

申请人： Richard Williams ,  Michael Cornell ,  Wai Chan

发明人： Richard Williams ,  Michael Cornell ,  Wai Chan

IPC分类号： H01L21/331 ,  H01L21/76 ,  H01L21/8222 ,  H01L21/8224 ,  H01L21/8228 ,  H01L21/8234 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06 ,  H01L27/082 ,  H01L27/088 ,  H01L29/73 ,  H01L29/732 ,  H01L21/336

CPC分类号： H01L27/0826 ,  H01L21/8224 ,  H01L21/82285 ,  H01L27/0821 ,  H01L29/6625 ,  H01L29/66272 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor substrate includes a pair of trenches filled with a dielectric material. Dopant introduced into the mesa between the trenches is limited from diffusing laterally when the substrate is subjected to thermal processing. Therefore, semiconductor devices can be spaced more closely together on the substrate, and the packing density of the devices can be increased. Also trench constrained doped region diffuse faster and deeper than unconstrained diffusions, thereby reducing the time and temperature needed to complete a desired depth diffusion. The technique may be used for semiconductor devices such as bipolar transistors as well as isolation regions that electrically isolate the devices from each other. In one group of embodiments, a buried layer is formed at an interface between an epitaxial layer and a substrate, at a location generally below the dopant in the mesa. When the substrate is subjected to thermal processing, the buried layer diffuses upward, the dopant in the mesa diffuses downward until the two dopants merge to form an isolation region or a sinker extending downward from the surface of the epitaxial layer to the buried layer. In another embodiment, dopant is implanted between dielectrically filled trenches at a high energy up to several MeV, then diffused, combining the benefits of deep implantation and trenched constrained diffusion to achive deep diffusions with a minimal thermal budget.

公开(公告)号：US20050202577A1

公开(公告)日：2005-09-15

申请号：US11124439

申请日：2005-05-05

申请人： Richard Williams ,  Michael Cornell ,  Wai Chan

发明人： Richard Williams ,  Michael Cornell ,  Wai Chan

IPC分类号： H01L23/485 ,  H01L23/495 ,  H01L23/58 ,  H01L23/62 ,  H01L27/02 ,  H01L29/78 ,  H01L21/66

CPC分类号： H01L23/60 ,  H01L22/32 ,  H01L23/49562 ,  H01L23/62 ,  H01L24/05 ,  H01L24/48 ,  H01L24/49 ,  H01L27/0266 ,  H01L29/7802 ,  H01L29/7813 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05138 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48464 ,  H01L2224/49111 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  Y10S257/904 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor die has a bonding pad for a MOSFET such as a power MOSFET and a separate bonding pad for ESD protection circuitry. Connecting the bonding pads together makes the ESD protection circuitry functional to protect the MOSFET. Before connecting the bonding pads together, the ESD protection circuitry and/or the MOSFET can be separately tested. A voltage higher than functioning ESD protection circuitry would permit can be used when testing the MOSFET. A packaging process such as wire bonding or attaching the die to a substrate in a flip-chip package can connect the bonding pads after testing.

摘要翻译： 半导体管芯具有用于诸如功率MOSFET的MOSFET的接合焊盘和用于ESD保护电路的单独的接合焊盘。 将焊盘连接在一起可使ESD保护电路起到保护MOSFET的作用。 在将焊盘连接在一起之前，ESD保护电路和/或MOSFET可以单独测试。 当测试MOSFET时，可以使用高于功能ESD保护电路的电压。 在倒装芯片封装中的引线接合或将管芯附接到衬底的封装工艺可以在测试之后连接焊盘。

公开(公告)号：US20050142792A1

公开(公告)日：2005-06-30

申请号：US11067248

申请日：2005-02-25

申请人： Richard Williams ,  Michael Cornell ,  Wai Chan

发明人： Richard Williams ,  Michael Cornell ,  Wai Chan

IPC分类号： H01L21/331 ,  H01L21/329 ,  H01L21/761 ,  H01L21/8222 ,  H01L21/8238 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06 ,  H01L27/08 ,  H01L27/092 ,  H01L29/732 ,  H01L29/861 ,  H01L23/62

CPC分类号： H01L21/26513 ,  H01L21/743 ,  H01L21/761 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0629 ,  H01L27/0928 ,  H01L29/0878 ,  H01L29/1083 ,  H01L29/42368 ,  H01L29/66136 ,  H01L29/6625 ,  H01L29/735 ,  H01L29/7816 ,  H01L29/8611 ,  H01L2924/0002 ,  H01L2924/00

摘要： An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does not diffuse significantly. As a result, the dimensions of the isolation structure are limited and defined, thereby allowing a higher packing density than obtainable using conventional processes which include the growth of an epitaxial layer and diffusion of the dopants. In one group of embodiments, the isolation structure includes a deep layer and a sidewall which together form a cup-shaped structure surrounding an enclosed region in which the isolated semiconductor device may be formed. The sidewalls may be formed by a series of pulsed implants at different energies, thereby creating a stack of overlapping implanted regions.

公开(公告)号：US06886253B2

公开(公告)日：2005-05-03

申请号：US10637573

申请日：2003-08-11

申请人： Wai Chan

发明人： Wai Chan

IPC分类号： B67B7/46 ,  B67B7/00

CPC分类号： B67B7/30 ,  B67B2007/0458

摘要： A foil cutter including first and second foil cutting means, said first and second cutting means being relatively movable towards each other for foil cutting engagement with the neck of a bottle, wherein, at least one of said cutting means including a pair of pivotally movable cutting members.

摘要翻译： 一种铝箔切割机，包括第一和第二箔切割装置，所述第一和第二切割装置可相对于彼此相对移动，以与瓶颈的箔切割接合，其中至少一个所述切割装置包括一对可转动切割 会员