公开(公告)号：US20070164386A1

公开(公告)日：2007-07-19

申请号：US11648045

申请日：2006-12-28

申请人： Cheng-Yi Chang ,  Chien-Ping Huang ,  Yu-Po Wang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

发明人： Cheng-Yi Chang ,  Chien-Ping Huang ,  Yu-Po Wang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L31/0203 ,  H01L21/56

CPC分类号： H01L27/14687 ,  H01L24/97 ,  H01L27/14618 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/8592 ,  H01L2224/97 ,  H01L2924/01033 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2224/85 ,  H01L2924/00014

摘要： A semiconductor device and the fabrication method thereof are provided. The fabrication method includes providing a substrate module plate having a plurality of substrates; attaching at least one sensor chip to each of the substrates of the substrate module plate; electrically connecting each of the sensor chips to each of the substrates through bonding wires; forming an insulating layer between each sensor chip on the substrate module plate, wherein the height of the insulating layers are not greater than the thickness of the sensor chips so as to prevent flash from the insulating layers from contaminating the sensor chips; forming an adhesive lip on the insulating layer or forming a second insulating layer followed by forming the adhesive layer, wherein the adhesive layer or the second insulating layer is higher than the highest loop-height of the bonding wires; adhering a light transmitting cover to each adhesive layer to cover the sensor chip; and cutting the substrate module plate to separate the substrates to form a plurality of semiconductor devices each integrated with at least one sensor chip. As the adhesive layers are not in contact with the bonding wires, the problems of damaging or breaking the bonding wires can be prevented in the process of adhering the light transmitting cover.

摘要翻译： 提供半导体器件及其制造方法。 该制造方法包括提供具有多个基板的基板模块板; 将至少一个传感器芯片附接到所述基板模块板的每个基板; 通过接合线将每个传感器芯片电连接到每个基板; 在衬底模块板上的每个传感器芯片之间形成绝缘层，其中绝缘层的高度不大于传感器芯片的厚度，以防止来自绝缘层的闪光污染传感器芯片; 在所述绝缘层上形成粘合剂唇缘或形成第二绝缘层，接着形成所述粘合剂层，其中所述粘合剂层或所述第二绝缘层高于所述接合线的最高环高度; 将透光盖粘附到每个粘合剂层以覆盖传感器芯片; 以及切割所述基板模块板以分离所述基板以形成多个半导体器件，每个半导体器件与至少一个传感器芯片集成。 由于粘合层不与接合线接触，所以在粘接透光罩的过程中可以防止损坏或断裂接合线的问题。

公开(公告)号：US20070145561A1

公开(公告)日：2007-06-28

申请号：US11643147

申请日：2006-12-20

申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang

发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang

IPC分类号： H01L23/02

CPC分类号： H01L23/3121 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/3025 ,  H05K3/284 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/0989 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00

摘要： An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings for exposing the bond pads. A groove is formed between the paired bond pads and has a length larger than a width of an electronic component mounted on the paired bond pads. The groove is adjacent to one of the paired bond pads and communicates with a corresponding one of the openings where this bond pad is exposed. Accordingly, a clearance between the electronic component and the electronic carrier board can be effectively filled with an insulating resin for encapsulating the electronic component, thereby preventing voids and undesirable electrical bridging between the paired bond pads from occurrence.

摘要翻译： 提供电子载体板及其封装结构。 电子载板包括载体，形成在载体上的至少一对接合焊盘和覆盖载体的保护层。 保护层形成有用于暴露接合焊盘的开口。 在成对的接合焊盘之间形成有一个沟槽，其长度大于安装在成对接合焊盘上的电子部件的宽度。 该沟槽与一对接合焊盘相邻，并与该接合焊盘露出的相应的一个开口连通。 因此，电子部件和电子载体板之间的间隙可以有效地填充用于封装电子部件的绝缘树脂，从而防止成对焊盘之间的空隙和不期望的电桥发生。

公开(公告)号：US20070138632A1

公开(公告)日：2007-06-21

申请号：US11642439

申请日：2006-12-19

申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/34

CPC分类号： H05K3/3452 ,  H05K3/284 ,  H05K3/303 ,  H05K2201/0989 ,  H05K2201/10636 ,  H05K2201/10727 ,  H05K2201/2036 ,  Y02P70/611 ,  Y02P70/613

摘要： An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. An opening is formed in the protective layer to expose at least three sides of each of the paired bond pads. The protective layer includes at least one independent residual portion located in the opening and between the paired bond pads, such that an electronic component is mounted on the independent residual portion and electrically connected to the bond pads. A groove without a dead space is formed between the electronic component and the carrier, such that a molding compound for encapsulating the electronic component can flow through the groove to fill the opening and a space under the electronic component and encapsulate the at least three sides of each of the bond pads.

摘要翻译： 提供电子载体板及其封装结构。 电子载板包括载体，形成在载体上的至少一对接合焊盘和覆盖载体的保护层。 在保护层中形成开口以暴露每个配对接合焊盘的至少三个侧面。 保护层包括至少一个独立的残留部分，位于开口内和成对的接合焊盘之间，使得电子部件安装在独立的残留部分上并电连接到接合焊盘。 在电子部件和载体之间形成没有死空间的凹槽，使得用于封装电子部件的模制化合物可以流过凹槽以填充开口和电子部件下方的空间，并将至少三个侧面 每个接合垫。

公开(公告)号：US20070023925A1

公开(公告)日：2007-02-01

申请号：US11414275

申请日：2006-04-27

申请人： Chun-Chi Ke ,  Kook-Jui Tai ,  Chien-Ping Huang

发明人： Chun-Chi Ke ,  Kook-Jui Tai ,  Chien-Ping Huang

IPC分类号： H01L21/00 ,  H01L21/44 ,  H01L23/48

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2924/0001 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor device and a fabrication method thereof are provided. A first passivation layer and a second passivation layer are applied on a semiconductor substrate having at least one bond pad, with the bond pad being exposed. A first metallic layer is formed on the second passivation layer and electrically connected to the bond pad. A third passivation layer is applied on the first metallic layer and exposes a portion of the first metallic layer. A second metallic layer is formed on the third passivation layer and electrically connected to the exposed portion of the first metallic layer. A fourth passivation layer is applied on the second metallic layer and has an opening corresponding in position to the bond pad, allowing a portion of the second metallic layer to be exposed via the opening, such that a solder bump is formed on the exposed portion of the second metallic layer.

摘要翻译： 提供半导体器件及其制造方法。 将第一钝化层和第二钝化层施加到具有至少一个接合焊盘的半导体衬底上，其中焊盘被暴露。 第一金属层形成在第二钝化层上并电连接到接合焊盘。 将第三钝化层施加在第一金属层上并暴露第一金属层的一部分。 第二金属层形成在第三钝化层上并电连接到第一金属层的暴露部分。 在第二金属层上施加第四钝化层，并且具有与接合焊盘相对应的开口的开口，允许第二金属层的一部分经由开口露出，使得在露出部分上形成焊料凸块 第二金属层。

公开(公告)号：US20070018291A1

公开(公告)日：2007-01-25

申请号：US11488689

申请日：2006-07-19

申请人： Chien-Ping Huang ,  Fu-Di Tang ,  Yuan-Chun Li

发明人： Chien-Ping Huang ,  Fu-Di Tang ,  Yuan-Chun Li

IPC分类号： H01L23/495

CPC分类号： H01L21/6835 ,  H01L21/4821 ,  H01L21/568 ,  H01L23/49503 ,  H01L23/49531 ,  H01L23/49541 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L2221/68345 ,  H01L2224/29139 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/83851 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor package without a chip carrier includes an insulating structure having an opening; an electroplated die pad provided in the opening; a chip attached to the electroplated die pad by a thermally conductive adhesive; a plurality of electrical contacts formed around the electroplated die pad, wherein at least one of the electrical contacts is provided on a top surface of the insulating structure, and the chip is electrically connected to the electrical contacts; and an encapsulant for encapsulating the chip, the insulating structure and the electrical contacts, wherein bottom surfaces of the insulating structure, the electroplated die pad and the electrical contacts, except the at least one electrical contact provided on the top surface of the insulating structure, are exposed from the encapsulant and are flush with a bottom surface of the encapsulant. A fabrication method of the semiconductor package is also provided.

摘要翻译： 没有芯片载体的半导体封装包括具有开口的绝缘结构; 设置在开口中的电镀模片垫; 通过导热粘合剂附着到电镀模片垫的芯片; 形成在所述电镀管芯焊盘周围的多个电触点，其中所述电触头中的至少一个设置在所述绝缘结构的顶表面上，并且所述芯片电连接到所述电触头; 以及用于封装所述芯片，所述绝缘结构和所述电触点的密封剂，其中所述绝缘结构的底表面，所述电镀芯片焊盘和所述电触点除了设置在所述绝缘结构的顶表面上的所述至少一个电触点之外， 从密封剂暴露并与密封剂的底表面齐平。 还提供了半导体封装的制造方法。

公开(公告)号：US07164210B2

公开(公告)日：2007-01-16

申请号：US11026880

申请日：2004-12-29

申请人： Ho-Yi Tsai ,  Chien-Ping Huang

发明人： Ho-Yi Tsai ,  Chien-Ping Huang

IPC分类号： H01L23/28 ,  H01L21/50

CPC分类号： H01L23/4334 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0401

摘要： A semiconductor package with a heat sink and a method for fabricating the same are proposed. The heat sink is provided with a rigid and thermally resistant detach member on a top surface thereof, and is attached via its bottom surface to a chip mounted on a chip carrier. The detach member is sized larger than the heat sink and can be easily removed from the top surface of the heat sink. Subsequently, a molding process is performed to form an encapsulant for completely encapsulating the chip, the heat sink and the detach member. Then, a singulation process is performed to cut along predetermined cutting lines located between sides of the heat sink and corresponding sides of the detach member. Finally, the detach member and a portion of the encapsulant formed on the detach member are removed from the heat sink. The above fabrication method reduces the packaging cost.

摘要翻译： 提出了具有散热器的半导体封装及其制造方法。 散热器在其顶表面上设置有刚性和耐热的分离构件，并且经由其底表面附接到安装在芯片载体上的芯片。 分离构件的尺寸大于散热器，并且可以容易地从散热器的顶表面去除。 随后，进行模制处理以形成用于完全封装芯片，散热器和分离构件的密封剂。 然后，进行切割处理，以沿着位于散热片的侧面和分离构件的相应侧面之间的预定切割线切割。 最后，分离构件和形成在分离构件上的密封剂的一部分从散热器移除。 上述制造方法降低了包装成本。

公开(公告)号：US20060267125A1

公开(公告)日：2006-11-30

申请号：US11162135

申请日：2005-08-30

申请人： Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Yi Chang

发明人： Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Yi Chang

IPC分类号： H01L29/84

CPC分类号： H01L27/14683 ,  H01L27/14618 ,  H01L2224/24226

摘要： A sensor semiconductor device and a method for fabricating the same are proposed. A sensor chip is mounted on a substrate, and a dielectric layer and a circuit layer are formed on the substrate, wherein the circuit layer is electrically connected to the substrate and the sensor chip. The dielectric layer is formed with an opening for exposing a sensor region of the sensor chip. A light-penetrable lid covers the opening of the dielectric layer, such that light is able to penetrate the light-penetrable lid to reach the sensor region and activate the sensor chip. The sensor chip can be electrically connected to an external device via a plurality of solder balls implanted on a surface of the substrate not for mounting the sensor chip. Therefore, the sensor semiconductor device is fabricated in a cost-effective manner, and circuit cracking and a know good die (KGD) problem are prevented.

摘要翻译： 提出了一种传感器半导体器件及其制造方法。 传感器芯片安装在基板上，并且在基板上形成电介质层和电路层，其中电路层电连接到基板和传感器芯片。 电介质层形成有用于暴露传感器芯片的传感器区域的开口。 透光盖子覆盖电介质层的开口，使得光线能够穿透透光盖子到达传感器区域并激活传感器芯片。 传感器芯片可以通过植入在基板的表面上的多个焊球电连接到外部设备，而不用于安装传感器芯片。 因此，传感器半导体器件以成本有效的方式制造，并且防止了电路破裂和知道的裸芯片（KGD）问题。

公开(公告)号：US07129119B2

公开(公告)日：2006-10-31

申请号：US11049054

申请日：2005-02-01

申请人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang

发明人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang

IPC分类号： H01L21/50

CPC分类号： H01L21/4846 ,  H01L21/50 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/4334 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012

摘要： A method for fabricating semiconductor packages is proposed. A plurality of substrates are prepared each having a chip thereon. Length and width of each substrate are equal to predetermined length and width of the semiconductor package. A carrier having a plurality of openings is prepared. A protruded portion is formed at each corner of each opening, wherein a distance between two diagonal protruded portions is slightly larger than that between two diagonal corners of the substrate. The substrates are fixed in the openings of the carrier by means of the protruded portions, and gaps between the substrates and the carrier are sealed. An encapsulant is formed over each opening to encapsulate the corresponding chip by a molding process. An area on the carrier covered by the encapsulant is larger in length and width than the opening. A plurality of the semiconductor packages are formed after performing mold-releasing and singulation processes.

摘要翻译： 提出了制造半导体封装的方法。 准备了各自具有芯片的多个基板。 每个基片的长度和宽度等于半导体封装的预定长度和宽度。 制备具有多个开口的载体。 在每个开口的每个角部处形成突出部分，其中两个对角线突出部分之间的距离略大于基板的两个对角线之间的距离。 基板通过突出部固定在载体的开口中，基板和载体之间的间隙被密封。 在每个开口上形成密封剂，以通过模制工艺封装相应的芯片。 由密封剂覆盖的载体上的区域的长度和宽度大于开口的宽度。 在进行脱模和切割处理之后形成多个半导体封装。

公开(公告)号：US20060125088A1

公开(公告)日：2006-06-15

申请号：US11267632

申请日：2005-11-03

申请人： Chien-Ping Huang ,  Chih-Ming Huang

发明人： Chien-Ping Huang ,  Chih-Ming Huang

IPC分类号： H01L23/34

CPC分类号： H01L23/3677 ,  H01L21/4871 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/3733 ,  H01L23/4334 ,  H01L23/49548 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/351 ,  Y10T29/49126 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A heat dissipating semiconductor package and a fabrication method thereof are provided. A semiconductor chip is mounted on a chip carrier. A heat sink is mounted on the chip, and includes an insulating core layer, a thin metallic layer formed on each of an upper surface and a lower surface of the insulating core layer and a thermal via hole formed in the insulating core layer. A molding process is performed to encapsulate the chip and the heat sink with an encapsulant to form a package unit. A singulation process is performed to peripherally cut the package unit. A part of the encapsulant above the thin metallic layer on the upper surface of the heat sink is removed, such that the thin metallic layer on the upper surface of the heat sink is exposed, and heat generated by the chip can be dissipated through the heat sink.

公开(公告)号：US20060118944A1

公开(公告)日：2006-06-08

申请号：US11338056

申请日：2006-01-23

申请人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/053

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L23/3121 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/20 ,  H01L2224/97 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2924/351 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor package having conductive bumps on a chip and a fabrication method thereof are provided. A plurality of the conductive bumps are deposited respectively on bond pads of the chip. An encapsulation body encapsulates the chip and conductive bumps while exposing ends of the conductive bumps. A plurality of conductive traces are formed on the encapsulation body and electrically connected to the exposed ends of the conductive bumps. A solder mask layer is applied over the conductive traces and formed with openings for exposing predetermined portions of the conductive traces. The exposed portions of the conductive traces are connected to a plurality of solder balls respectively. The conductive bumps on the bond pads of the chip allow easy positional recognition of the bond pads, making the conductive traces well electrically connected to the bond pads through the conductive bumps and assuring the quality and reliability of the semiconductor package.

摘要翻译： 提供了一种在芯片上具有导电凸块的半导体封装及其制造方法。 多个导电凸块分别沉积在芯片的接合焊盘上。 封装体封装芯片和导电凸块，同时暴露导电凸块的端部。 多个导电迹线形成在封装主体上并与导电凸块的暴露端电连接。 焊接掩模层施加在导电迹线上并形成有用于暴露导电迹线的预定部分的开口。 导电迹线的暴露部分分别连接到多个焊球。 芯片的接合焊盘上的导电凸块允许接合焊盘的容易的位置识别，使得导电迹线通过导电凸块良好地电连接到接合焊盘，并确保半导体封装的质量和可靠性。