摘要:
A broad band energy harvesting system to harvest energy from a structure and associated methods are provided. The system includes a structure carrying a plurality of environmentally produced vibration frequencies extending over a frequency range and an energy harvesting apparatus positioned in vibration receiving communication with the structure to harvest energy from the structure. Each energy harvesting apparatus includes broadly tuned energy harvesting generators having relatively low quality factor and corresponding relatively wide bandwidth. The energy harvesting generators collectively provide energy harvesting over multiple modes to thereby provide energy harvesting over a substantial portion of the frequency range. Each energy harvesting generator can include a cantilevered beam connected to a common backbone comprised of a resilient material configured to transfer energy between adjacent generators to further enhance energy harvesting.
摘要:
A device includes first and second electrically conductive substrates that are positioned opposite from one another. The device also includes a sealing layer disposed between the first and second electrically conductive substrates and a plurality of hollow structures having a conductive material, wherein the plurality of hollow structures is contained by the sealing layer between the first and second electrically conductive substrates.
摘要:
A solid state thermal transfer device includes first and second electrically conductive substrates that are positioned opposite from one another. The solid state thermal transfer device also includes a sealing layer disposed between the first and second electrically conductive substrates and a plurality of hollow structures having a conductive material, wherein the plurality of hollow structures is contained by the sealing layer between the first and second electrically conductive substrates.
摘要:
A semiconductor chip packaging structure comprising a dielectric film having one or more through holes aligned with the one or more contact pads of at least one power semiconductor chip. A patterned electrically conductive layer adjacent to the dielectric film has one or more electrically conductive posts which extend through the one or more though holes aligned with the contact pads to electrically couple the conductive layer to the contact pads. In certain embodiments, one or more air gaps may be formed between the dielectric film and the active surface of the at least one power semiconductor chip. Methods for fabricating the semiconductor chip packaging structure are also disclosed.
摘要:
An optical interface for data communication that can be manufactured and aligned in a cost effective manner includes an array of optical emitters and an optical receiver are positioned within a predetermined tolerance with reference to each other so as to establish an optical data communication path. To search for and determine which of the emitters of the array achieves the best alignment, the optical emitters are individually energized in a sequence, while monitoring the output signal of the optical receiver. For subsequent data communications, the optical emitter determined to achieve the best alignment is employed.
摘要:
One method for packaging at least one circuit chip includes: providing an interconnect layer including insulative material having a first side and a second side, initial metallization patterned on second side metallized portions of the second side and not on second side non-metallized portions of the second side, at least one substrate via extending from the first side to one of the second side metallized portions, and at least one chip via extending from the first side to one of the second side non-metallized portions; positioning the at least one circuit chip on the second side with at least one chip pad of the at least one circuit chip being aligned with the at least one chip via; and patterning connection metallization on selected portions of the first side of the interconnect layer and in the vias so as to extend to the at least one second side metallized portion and to the at least one chip pad. In related embodiments vias are pre-metallized and coupled to chip pads of the circuit chips by an electrically conductive binder. Thin film passive components and multilayer interconnections can additionally be incorporated into the package.
摘要:
An optical interface for data communication that can be manufactured and aligned in a cost effective manner includes an array of optical emitters and an optical receiver are positioned within a predetermined tolerance with reference to each other so as to establish an optical data communication path. To search for and determine which of the emitters of the array achieves the best alignment, the optical emitters are individually energized in a sequence, while monitoring the output signal of the optical receiver. For subsequent data communications, the optical emitter determined to achieve the best alignment is employed.
摘要:
A method is provided for the manufacture of precision electronic components such as resistors, inductors, and capacitors on a polymer or ceramic surface. The electronic components can be deposited and trimmed to precise or matched values without having precise depositions of all of the pre-patterned materials. Thin film electronic components are deposited on a surface, parameter values are measured or estimated, a correction offset file is generated, and the components are trimmed using adaptive lithography to a very close tolerance. A computer program can be used to enable the adjustment of electronic components by techniques such as changing the physical length of an inductor coil or resistor lead, or by changing a capacitor plate area.
摘要:
The present invention is directed towards a source of ultraviolet energy, wherein the source is a UV-emitting LED's. In an embodiment of the invention, the UV-LED's are characterized by a base layer material including a substrate, a p-doped semiconductor material, a multiple quantum well, a n-doped semiconductor material, upon which base material a p-type metal resides and wherein the base structure has a mesa configuration, which mesa configuration may be rounded on a boundary surface, or which may be non-rounded, such as a mesa having an upper boundary surface that is flat. In other words, the p-type metal resides upon a mesa formed out of the base structure materials. In a more specific embodiment, the UV-LED structure includes n-type metallization layer, passivation layers, and bond pads positioned at appropriate locations of the device. In a more specific embodiment, the p-type metal layer is encapsulated in the encapsulating layer.
摘要:
A semiconductor chip packaging structure is fabricated by using a dielectric film with two surfaces, and a power semiconductor chip with an active surface having contact pads. An adhesive layer is used to connect the first surface of the dielectric film and the active surface of the power semiconductor chip. A patterned electrically conductive layer is formed adjacent to the second surface of the film, extending through holes in the film to the contact pads.