公开(公告)号：US20130038209A1

公开(公告)日：2013-02-14

申请号：US13570233

申请日：2012-08-08

Applicant: Shunsuke AKASAKA ,  Tetsuo Fujii ,  Koki Sakamoto

Inventor： Shunsuke AKASAKA ,  Tetsuo Fujii ,  Koki Sakamoto

IPC: H01L31/0232 ,  H05B37/02

CPC classification number: G01J1/4204 ,  G01J1/0488 ,  G01J1/429 ,  H01L31/0203 ,  H01L31/0224 ,  H01L31/09

Abstract: To provide both a photodetecting element and a photodetecting device which can prevent generating of a plurality of current paths, and can detect with stability and high sensitivity regardless of a surface state instability of an optical absorption layer. The photodetecting element includes an optically transparent substrate, an optical absorption layer, an electrode, an electrode, an adhesive layer, an insulating film, and a package. The optical absorption layer is formed on the optically transparent substrate, and a part of each the electrodes is embedded in the optical absorption layer. The photodetecting unit is bonded junction down with the adhesive layer on the package. The optical absorption layer absorbs light of a specified wavelength selectively to be converted into an electric signal. The light to be measured is irradiated from a back side surface of the optically transparent substrate.

Abstract translation: 为了提供可以防止多个电流路径的产生的光检测元件和光电检测器件，并且不管光吸收层的表面状态不稳定，都能够以稳定性和高灵敏度进行检测。 光检测元件包括光学透明基板，光吸收层，电极，电极，粘合剂层，绝缘膜和封装。 光学吸收层形成在光学透明基板上，并且每个电极的一部分嵌入在光吸收层中。 光电检测单元与封装上的粘合剂层接合结合。 光吸收层选择性地吸收特定波长的光以转换成电信号。 从光学透明基板的背面侧照射被测光。

公开(公告)号：US08349634B2

公开(公告)日：2013-01-08

申请号：US12801845

申请日：2010-06-29

Applicant: Tetsuo Fujii ,  Kazuhiko Sugiura

Inventor： Tetsuo Fujii ,  Kazuhiko Sugiura

IPC: H01L21/00

CPC classification number: B81B7/007 ,  H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor device includes: a first substrate made of semiconductor and having first regions, which are insulated from each other and disposed in the first substrate; and a second substrate having electric conductivity and having second regions and insulation trenches. Each insulation trench penetrates the second substrate so that the second regions are insulated from each other. The first substrate provides a base substrate, and the second substrate provides a cap substrate. The second substrate is bonded to the first substrate so that a sealed space is provided between a predetermined surface region of the first substrate and the second substrate. The second regions include an extraction conductive region, which is coupled with a corresponding first region.

Abstract translation: 半导体器件包括：由半导体制成的第一衬底，其具有彼此绝缘并设置在第一衬底中的第一区域; 以及具有导电性并具有第二区域和绝缘沟槽的第二基板。 每个绝缘沟槽穿透第二衬底，使得第二区域彼此绝缘。 第一衬底提供基底，第二衬底提供盖衬底。 第二基板被接合到第一基板，使得在第一基板的预定表面区域和第二基板之间设置密封空间。 第二区域包括与对应的第一区域耦合的引出导电区域。

公开(公告)号：US20120302036A1

公开(公告)日：2012-11-29

申请号：US13546040

申请日：2012-07-11

Applicant: Masakiyo Sumitomo ,  Makoto Asai ,  Nozomu Akagi ,  Yasuhiro Kitamura ,  Hiroki Nakamura ,  Tetsuo Fujii

Inventor： Masakiyo Sumitomo ,  Makoto Asai ,  Nozomu Akagi ,  Yasuhiro Kitamura ,  Hiroki Nakamura ,  Tetsuo Fujii

IPC: H01L21/762

CPC classification number: H01L21/823481 ,  H01L21/26533 ,  H01L21/76243 ,  H01L21/76264 ,  H01L21/823487 ,  H01L21/84 ,  H01L27/0251 ,  H01L27/0629 ,  H01L27/1203 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/7813 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes: a SOI substrate including a support layer, a first insulation film and a SOI layer; a first circuit; a second circuit; and a trench separation element. The SOI substrate further includes a first region and a second region. The first region has the support layer, the first insulation film and the SOI layer, which are stacked in this order, and the second region has only the support layer. The trench separation element penetrates the support layer, the first insulation film and the SOI layer. The trench separation element separates the first region and the second region. The first circuit is disposed in the SOI layer of the first region. The second circuit is disposed in the support layer of the second region.

Abstract translation: 半导体器件包括：SOI衬底，包括支撑层，第一绝缘膜和SOI层; 第一个电路; 第二电路; 和沟槽分离元件。 SOI衬底还包括第一区域和第二区域。 第一区域具有依次层叠的支撑层，第一绝缘膜和SOI层，第二区域仅具有支撑层。 沟槽分离元件穿透支撑层，第一绝缘膜和SOI层。 沟槽分离元件分离第一区域和第二区域。 第一电路设置在第一区域的SOI层中。 第二电路设置在第二区域的支撑层中。

公开(公告)号：US08283738B2

公开(公告)日：2012-10-09

申请号：US12654902

申请日：2010-01-07

Applicant: Tetsuo Fujii ,  Masaki Inoue

Inventor： Tetsuo Fujii ,  Masaki Inoue

IPC: H01L29/84

CPC classification number: G01P15/0802 ,  B81B7/007 ,  B81B7/02 ,  B81B2207/092 ,  B81B2207/095 ,  G01P1/023 ,  G01P15/125 ,  G01P2015/0814 ,  G01P2015/0828 ,  H01L27/14601 ,  H01L27/148

Abstract: A semiconductor device includes a sensor member and a cap member. The sensor member has a surface and includes a first sensing section. The first sensing section includes first and second portions that are located on the surface side of the sensor member and electrically insulated from each other. The cap member has a surface and includes a cross wiring portion. The surface of the cap member is joined to the surface of the sensor member in such a manner that the first sensing section is sealed by the sensor member and the cap member. The cross wiring portion electrically connects the first portion to the second portion.

Abstract translation: 半导体器件包括传感器部件和盖部件。 传感器构件具有表面并且包括第一感测部分。 第一感测部分包括位于传感器部件的表面侧并彼此电绝缘的第一和第二部分。 盖构件具有表面并且包括交叉布线部分。 盖构件的表面以传感器构件和帽构件密封第一感测部分的方式接合到传感器构件的表面。 十字布线部分将第一部分电连接到第二部分。

公开(公告)号：US08278747B2

公开(公告)日：2012-10-02

申请号：US12453784

申请日：2009-05-21

Applicant: Kuniaki Mamitsu ,  Tetsuo Fujii

Inventor： Kuniaki Mamitsu ,  Tetsuo Fujii

IPC: H01L23/48

CPC classification number: H01L23/4334 ,  H01L21/565 ,  H01L23/13 ,  H01L23/473 ,  H01L23/49562 ,  H01L23/498 ,  H01L24/73 ,  H01L25/072 ,  H01L2224/32245 ,  H01L2224/33 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor apparatus having a first surface and a second surface opposite to the first surface includes: a semiconductor chip having a front side and a backside; a first heat radiation member electrically and thermally coupled with the backside of the chip; a second heat radiation member electrically and thermally coupled with the front side of the chip; and a resin mold sealing the first and second heat radiation members together with the chip. At least one of the first and second heat radiation members is exposed on both of the first and second surfaces.

Abstract translation: 具有第一表面和与第一表面相对的第二表面的半导体器件包括：具有正面和背面的半导体芯片; 与芯片的背面电耦合并热耦合的第一散热构件; 与所述芯片的前侧电和热耦合的第二散热构件; 以及与芯片一起密封第一和第二散热构件的树脂模具。 第一和第二散热构件中的至少一个暴露在第一和第二表面两者上。

公开(公告)号：US20110266666A1

公开(公告)日：2011-11-03

申请号：US13076525

申请日：2011-03-31

Applicant: Yukihiro Maeda ,  Kouji Kondoh ,  Yoshiharu Harada ,  Takeshi Yamauchi ,  Tetsuo Fujii

Inventor： Yukihiro Maeda ,  Kouji Kondoh ,  Yoshiharu Harada ,  Takeshi Yamauchi ,  Tetsuo Fujii

IPC: H01L21/56 ,  H01L23/34 ,  H01L23/52

CPC classification number: H05K3/4632 ,  H01L23/145 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/05624 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73259 ,  H01L2224/81203 ,  H01L2224/83192 ,  H01L2224/92224 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/351 ,  H05K1/0206 ,  H05K1/185 ,  H05K3/0061 ,  H05K2201/096 ,  H05K2201/10674 ,  H05K2203/063 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/8384 ,  H01L2924/00014

Abstract: A circuit board includes an insulating member and a semiconductor chip encapsulated with the thermoplastic resin portion of the insulating member. A wiring member is located in the insulating member and electrically connected to first and second electrodes on respective sides of the semiconductor chip. The wiring member includes a pad, an interlayer connection member, and a connection portion. A diffusion layer is located between the first electrode and the connection portion between the pad and the connection portion, and between the second electrode and the interlayer connection member. At least one element of the interlayer connection member has a melting point lower than a glass-transition point of the thermoplastic resin portion. The connection portion is made of material having a melting point higher than a melting point of the thermoplastic resin portion.

Abstract translation: 电路板包括绝缘构件和用绝缘构件的热塑性树脂部分封装的半导体芯片。 布线构件位于绝缘构件中并且电连接到半导体芯片的相应侧上的第一和第二电极。 布线构件包括垫，层间连接构件和连接部。 扩散层位于第一电极和焊盘与连接部分之间的连接部分之间，以及第二电极和层间连接部件之间。 层间连接部件的至少一个元件的熔点低于热塑性树脂部分的玻璃化转变点。 连接部由熔点高于热塑性树脂部分的熔点的材料制成。

公开(公告)号：US08026572B2

公开(公告)日：2011-09-27

申请号：US11987676

申请日：2007-12-04

Applicant: Yoshihiko Ozeki ,  Kenji Kouno ,  Tetsuo Fujii

Inventor： Yoshihiko Ozeki ,  Kenji Kouno ,  Tetsuo Fujii

IPC: H01L21/70 ,  H01L29/00 ,  H01L29/02 ,  H01L21/82 ,  H01L21/76 ,  H01L27/118 ,  H01L23/52

CPC classification number: H01L27/0694 ,  H01L21/8221 ,  H01L23/481 ,  H01L25/074 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device having plural active and passive elements on one semiconductor substrate is manufactured in the following cost effective manner even when the active and passive elements include double sided electrode elements. When the semiconductor substrate is divided into plural field areas, an insulation separation trench that penetrates the semiconductor substrate surrounds each of the field areas, and each of the either of the plural active elements or the plural passive elements. Further, each of the plural elements has a pair of power electrodes for power supply respectively disposed on each of both sides of the semiconductor substrate to serve as the double sided electrode elements.

Abstract translation: 即使有源和无源元件包括双面电极元件，在一个半导体衬底上具有多个有源和无源元件的半导体器件以下列成本有效的方式被制造。 当半导体衬底被分成多个场区域时，穿透半导体衬底的绝缘分离沟槽包围每个场区域，以及多个有源元件或多个无源元件中的任一个。 此外，多个元件中的每一个都具有一对用于电源的功率电极，分别设置在半导体衬底的两侧中以用作双面电极元件。

公开(公告)号：US07968432B2

公开(公告)日：2011-06-28

申请号：US11598653

申请日：2006-11-14

Applicant: Muneo Tamura ,  Tetsuo Fujii

Inventor： Muneo Tamura ,  Tetsuo Fujii

IPC: H01L21/76

CPC classification number: B23K26/0608 ,  B23K26/0617 ,  B23K26/40 ,  B23K26/53 ,  B23K2101/40 ,  B23K2103/172 ,  B23K2103/50 ,  B28D5/00

Abstract: A laser processing apparatus has one laser light source that simultaneously radiates laser beams with two wavelengths. Depth positions of focusing points for laser beams are gradually changed in a wafer. Three sets of modifying region groups, i.e., six layers of modifying region groups, are successively formed. One set of modifying region groups constitutes two layers and is formed at a time. The modifying region groups are separated, adjoined, or overlapped with each other along an estimated cut line of the wafer in a depth direction from a surface thereof.

Abstract translation: 激光加工装置具有同时辐射具有两个波长的激光束的一个激光光源。 激光束聚焦点的深度位置在晶片中逐渐变化。 连续形成3组修饰区域基团，即六层修饰区域基团。 一组修改区域组构成两层，一次形成。 修改区域组沿着晶片的从其表面的深度方向的估计切割线彼此分离，邻接或重叠。

公开(公告)号：US07911023B2

公开(公告)日：2011-03-22

申请号：US12289772

申请日：2008-11-04

Applicant: Nozomu Akagi ,  Hitoshi Yamaguchi ,  Tetsuo Fujii

Inventor： Nozomu Akagi ,  Hitoshi Yamaguchi ,  Tetsuo Fujii

IPC: H01L21/70

CPC classification number: H01L29/7813 ,  H01L22/14 ,  H01L27/0921 ,  H01L27/0922 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/41766

Abstract: A semiconductor apparatus is disclosed. The semiconductor apparatus includes a semiconductor substrate that has a first surface and a second surface opposite to each other. The semiconductor apparatus further includes multiple double-sided electrode elements each having a pair of electrodes located respectively on the first and second surfaces of the semiconductor substrate. A current flows between the first and second electrode. Each double-sided electrode element has a PN column region located in the semiconductor substrate. The semiconductor apparatus further includes an insulation trench that surrounds each of multiple double-sided electrode elements, and that insulates and separates the multiple double-sided electrode elements from each other.

Abstract translation: 公开了一种半导体装置。 半导体装置包括具有彼此相对的第一表面和第二表面的半导体衬底。 半导体装置还包括多个双面电极元件，每个双面电极元件分别具有位于半导体衬底的第一和第二表面上的一对电极。 A电流在第一和第二电极之间流动。 每个双面电极元件具有位于半导体衬底中的PN列区域。 半导体装置还包括围绕多个双面电极元件中的每一个的绝缘沟槽，并且使多个双面电极元件彼此绝缘和分离。

公开(公告)号：USRE42083E1

公开(公告)日：2011-02-01

申请号：US10315827

申请日：2002-12-10

Applicant: Tetsuo Fujii

Inventor： Tetsuo Fujii

IPC: G01P15/125

CPC classification number: G01P15/125 ,  G01P15/0802 ,  G01P2015/0817

Abstract: A single crystal silicon substrate (1) is bonded through an SiO2 film (9) to a single crystal silicon substrate (8), and the single crystal silicon substrate (1) is made into a thin film. A cantilever (13) is formed on the single crystal silicon substrate (1), and the thickness of the cantilever (13) in a direction parallel to the surface of the single crystal silicon substrate (1) is made smaller than the thickness of the cantilever in the direction of the depth of the single crystal silicon substrate (1), and movable in a direction parallel to the substrate surface. In addition, the surface of the cantilever (13) and the part of the single crystal silicon substrate (1), opposing the cantilever (13), are, respectively, coated with an SiO2 film (5), so that an electrode short circuit is prevented in a capacity-type sensor. In addition, a signal-processing circuit (10) is formed on the single crystal silicon substrate (1), so that signal processing is performed as the cantilever (13) moves.

Abstract translation: 单晶硅基板（1）通过SiO 2膜（9）与单晶硅基板（8）接合，将单晶硅基板（1）制成薄膜。 在单晶硅衬底（1）上形成悬臂（13），并且使悬臂（13）的平行于单晶硅衬底（1）的表面的方向的厚度小于单晶硅衬底 在单晶硅衬底（1）的深度方向上的悬臂，并且可以在平行于衬底表面的方向上移动。 此外，悬臂（13）的表面和单晶硅衬底（1）的与悬臂（13）相对的部分分别涂覆有SiO 2膜（5），使得电极短路 在容量型传感器中被阻止。 此外，在单晶硅衬底（1）上形成信号处理电路（10），从而当悬臂（13）移动时进行信号处理。