公开(公告)号：US06888071B2

公开(公告)日：2005-05-03

申请号：US10710731

申请日：2004-07-30

Applicant: Nai-Shung Chang ,  Tsai-Sheng Chen ,  Shu-Hui Chen

Inventor： Nai-Shung Chang ,  Tsai-Sheng Chen ,  Shu-Hui Chen

IPC: H05K1/00 ,  H05K1/18 ,  H05K1/03

CPC classification number: H05K1/0295 ,  H05K1/0298 ,  H05K1/18 ,  H05K2201/09345 ,  H05K2201/09954 ,  H05K2201/10522 ,  H05K2201/10704 ,  H05K2201/10734

Abstract: A layout structure of a central processing unit (CPU) that supports two different package techniques, comprising a motherboard that comprises the layout structure and a layout method. The layout structure of the preferred embodiment according to the present invention from up to down sequentially places a top signal layer, a grounded layer, a power layer having a grounded potential, and a bottom solder layer in the area where the signals of the CPU are coupled to the signals of the control chip, so that the signals that are placed on the bottom solder layer can refer to a grounded potential area of the power layer. Therefore, part of signals of the CPU that are coupled to the control chip can be placed on the bottom solder layer. Since the preferred embodiment of the present invention provides more flexibility in the placement design, a layout structure that supports the Pentium IV CPUs of different package techniques can be designed on the motherboard of the 4 layers stack structure, and these two CPUs can be supported by the same control chip.

Abstract translation: 支持两种不同包装技术的中央处理单元（CPU）的布局结构，包括包括布局结构和布局方法的主板。 根据本发明的优选实施例的布局结构从上到下顺序地在CPU的信号区域中放置顶层信号层，接地层，具有接地电位的功率层和底部焊料层 耦合到控制芯片的信号，使得放置在底部焊料层上的信号可以指功率层的接地电位区域。 因此，耦合到控制芯片的CPU的部分信号可以放置在底部焊料层上。 由于本发明的优选实施例在布局设计中提供了更多的灵活性，因此可以在四层堆栈结构的主板上设计支持不同封装技术的Pentium IV CPU的布局结构，并且这两个CPU可以被 相同的控制芯片。

公开(公告)号：US06837719B2

公开(公告)日：2005-01-04

申请号：US10375940

申请日：2003-02-25

Applicant: Augusto P. Panella

Inventor： Augusto P. Panella

IPC: H01R13/66 ,  H01R13/719 ,  H01R31/06 ,  H05K1/02 ,  H05K1/14 ,  H01R12/00

CPC classification number: H05K1/0262 ,  H05K1/141 ,  H05K2201/10189 ,  H05K2201/10325 ,  H05K2201/10545 ,  H05K2201/10704 ,  H05K2201/10719 ,  H05K2201/10734

Abstract: A substrate carries a voltage regulator module and a connector. By co-locating a voltage regulator to a processor or other circuit requiring a regulated power supply, distributed inductance associated with conventional circuit traces is reduced, thereby lessening demands on a voltage regulator and improving regulated voltage. A connector on the substrate can include internal filter capacitors to stabilize the output voltage from a voltage regulator. When the substrate is mounted to a circuit board, addition capacitors can be provided above and/or below the circuit board to which the substrate can be connected attached.

公开(公告)号：US20040061242A1

公开(公告)日：2004-04-01

申请号：US10335368

申请日：2002-12-30

Inventor： Edward P. Osburn

IPC: H01L023/48

CPC classification number: H05K1/0262 ,  H01L23/49838 ,  H01L23/50 ,  H01L2924/0002 ,  H05K1/0219 ,  H05K1/0231 ,  H05K1/0263 ,  H05K1/112 ,  H05K3/429 ,  H05K2201/093 ,  H05K2201/1003 ,  H05K2201/10515 ,  H05K2201/10545 ,  H05K2201/10704 ,  H05K2201/10734 ,  H01L2924/00

Abstract: A method and an apparatus for improving the delivery and filtering of power to a semiconductor device is disclosed by organizing out interconnects (pins, balls, pads or other interconnects) used to carry power in a striped configuration that shortens the conductive path required between a power source and a semiconductor device and that reduces the resistance of that conductive path.

Abstract translation: 公开了一种用于改进对半导体器件的功率的传递和滤波的方法和装置，其通过组织用于以条形配置携带功率的互连（引脚，球，焊盘或其他互连），其缩短了功率之间所需的导电路径 源极和半导体器件，并且降低该导电路径的电阻。

公开(公告)号：US20030209798A1

公开(公告)日：2003-11-13

申请号：US10142027

申请日：2002-05-09

Applicant: BAE Systems

Inventor： Timothy Whalen ,  Santos H. Nazario-Camacho ,  Daniel S. Sherick

IPC: H01L023/053 ,  H01L023/12

CPC classification number: H01L23/49811 ,  H01L23/055 ,  H01L23/32 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01322 ,  H01L2924/1433 ,  H01L2924/15312 ,  H01L2924/16152 ,  H05K3/301 ,  H05K3/303 ,  H05K2201/10704 ,  H05K2201/10734 ,  H05K2203/167 ,  Y02P70/613

Abstract: An apparatus for providing mechanical support to a column grid array package is disclosed. The column grid array package uses solder columns to provide electrical connections between a ceramic substrate and a printed circuit board. The ceramic substrate has two sides, with an integrated circuit chip mounted on one side and many input/output pads mounted on the other side. Solder columns are attached between the input/output pads and the printed circuit board. A corner post is located at each corner of the column grid array package to secure the position of the ceramic substrate in relation to the printed circuit board.

Abstract translation: 公开了一种用于向列格栅阵列封装提供机械支撑的装置。 列栅阵列封装使用焊料柱来提供陶瓷基板和印刷电路板之间的电连接。 陶瓷基板具有两侧，其一侧安装有集成电路芯片，另一侧安装有许多输入/输出焊盘。 焊盘安装在输入/输出焊盘和印刷电路板之间。 角柱位于列栅格阵列封装的每个角上，以固定陶瓷基板相对于印刷电路板的位置。

公开(公告)号：US06641411B1

公开(公告)日：2003-11-04

申请号：US10202286

申请日：2002-07-24

Applicant: Donald J. Stoddard ,  Matthew J. Schumacher

Inventor： Donald J. Stoddard ,  Matthew J. Schumacher

IPC: H01R466

CPC classification number: H01L23/49838 ,  H01L23/50 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01R13/6471 ,  H01R13/6473 ,  H05K1/0219 ,  H05K3/3436 ,  H05K2201/10325 ,  H05K2201/10704 ,  H05K2201/10734 ,  H01L2924/00

Abstract: Embodiments of the present invention may provide for high-density and high speed interconnections while maintaining reduced signal interference. In some embodiments, differential signals are organized in connectors such that differential signal pairs are orthogonal to each other. In other embodiments, differential signal tri-conductor sets may be oriented such that they are generally orthogonal to each other. The orthogonal contact organization may provide for reduced coupling between differential signals.

Abstract translation: 本发明的实施例可以提供高密度和高速互连，同时保持减小的信号干扰。 在一些实施例中，将差分信号组织在连接器中，使得差分信号对彼此正交。 在其他实施例中，差分信号三导体组可以被定向成使得它们大体上彼此正交。 正交接触组织可以提供差分信号之间的减少的耦合。

公开(公告)号：US06609914B2

公开(公告)日：2003-08-26

申请号：US09921152

申请日：2001-08-02

Applicant: Joseph T. Dibene, II

Inventor： Joseph T. Dibene, II

IPC: H01R909

CPC classification number: H05K7/1092 ,  G06F1/18 ,  G06F1/182 ,  G06F1/189 ,  H01L23/427 ,  H01L2924/0002 ,  H01L2924/15192 ,  H01L2924/3011 ,  H01R4/64 ,  H01R12/52 ,  H01R12/7088 ,  H05K1/0206 ,  H05K1/0263 ,  H05K1/141 ,  H05K1/144 ,  H05K3/301 ,  H05K3/368 ,  H05K2201/042 ,  H05K2201/10318 ,  H05K2201/10325 ,  H05K2201/10598 ,  H05K2201/10704 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2201/2036 ,  H01L2924/00

Abstract: A system and method for interconnecting circuit boards is disclosed. In one embodiment, a first circuit board connects with a second circuit board via a connector. The first circuit board has an aperture with a plurality of conductive surfaces on an inner surface. At least one of the conductive surfaces is coupled to at least one of a plurality of first circuit board traces. The second circuit board has a plurality of second circuit board traces. Therebetween, the connector has a plurality of conductive signal conductors, each having a first portion disposed at the periphery of the connector and adjacent to the conductive surfaces and a second portion coupled with the second circuit board traces.

Abstract translation: 公开了一种用于互连电路板的系统和方法。 在一个实施例中，第一电路板经由连接器与第二电路板连接。 第一电路板具有在内表面上具有多个导电表面的孔。 导电表面中的至少一个耦合到多个第一电路板迹线中的至少一个。 第二电路板具有多个第二电路板迹线。 在其间，连接器具有多个导电信号导体，每个导体信号导体具有设置在连接器的周边并邻近导电表面的第一部分和与第二电路板迹线耦合的第二部分。

公开(公告)号：US20030150645A1

公开(公告)日：2003-08-14

申请号：US10075513

申请日：2002-02-12

Inventor： Chia-Pin Chiu

IPC: H05K001/11 ,  H05K003/32

CPC classification number: H05K3/325 ,  H05K1/095 ,  H05K3/4069 ,  H05K2201/0314 ,  H05K2201/09481 ,  H05K2201/09827 ,  H05K2201/10704 ,  H05K2201/10734 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49165

Abstract: Multiple through holes in a printed circuit board (PCB) are filled with a malleable, electrically conductive material, such as an elastomer containing a concentration of conductive particles. The material in each through hole forms an electrical contact at which a solder ball or pin of a ball grid array (BGA) or pin grid array (PGA) of a microelectronic package, respectively, will be coupled to the PCB.

Abstract translation: 印刷电路板（PCB）中的多个通孔填充有可延展的导电材料，例如含有一定浓度的导电颗粒的弹性体。 每个通孔中的材料形成电接触，在该接触处，分别将微电子封装的球栅阵列（BGA）或引脚格栅阵列（PGA）的焊球或引脚耦合到PCB。

公开(公告)号：US20030128017A1

公开(公告)日：2003-07-10

申请号：US10042773

申请日：2002-01-08

Inventor： Pavan Kumar ,  Lilly Huang

IPC: G05F001/44

CPC classification number: H05K1/0262 ,  G06F1/26 ,  H05K1/0231 ,  H05K1/181 ,  H05K2201/10151 ,  H05K2201/10325 ,  H05K2201/10704

Abstract: A power delivery device includes a socket to couple and deliver power to an electronic component. A voltage control sensor is coupled to the socket to sense an output voltage at the socket and to provide negative feedback control. An impedance of the socket and an associated baseboard is incorporated into the negative feedback control and may help compensate for voltage droop in the output voltage.

Abstract translation: 电力输送装置包括用于耦合并向电子部件输送电能的插座。 电压控制传感器耦合到插座以感测插座处的输出电压并提供负反馈控制。 插座和相关底板的阻抗被并入到负反馈控制中，并且可以帮助补偿输出电压中的电压下降。

公开(公告)号：US06570765B2

公开(公告)日：2003-05-27

申请号：US10013952

申请日：2001-12-13

Applicant: Gerald R. Behling ,  James B. Intrater

Inventor： Gerald R. Behling ,  James B. Intrater

IPC: H05K720

CPC classification number: H01T4/08 ,  H01L23/60 ,  H01L23/62 ,  H01L2224/16225 ,  H01L2924/09701 ,  H05K1/0259 ,  H05K1/026 ,  H05K1/111 ,  H05K1/116 ,  H05K1/167 ,  H05K2201/0738 ,  H05K2201/09781 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10734

Abstract: Over voltage protection is provided for electronic circuits by disposing one or more ground bars for diverting harmful currents away from the sensitive electronic circuit elements. The ground bars are each associated with a row of contact portions of the electronic circuit. Microgaps between each contact portion and the corresponding ground bar are designed to provide an electrical conduit from the contact portion to the ground bar when normal operating voltages are exceeded, thereby channeling excess current harmlessly to ground. Under normal operating conditions, however, the microgaps act as electrical barriers, insulating the contact portions from ground. The microgaps may be filled with any combination of air, vacuum, or known variable voltage material.

公开(公告)号：US20030049952A1

公开(公告)日：2003-03-13

申请号：US10238118

申请日：2002-09-10

Inventor： Deepak K. Pai

IPC: H01R012/00

CPC classification number: H01L23/49827 ,  H01L2224/16 ,  H05K3/3421 ,  H05K3/3484 ,  H05K2201/10424 ,  H05K2201/10704 ,  H05K2201/10719 ,  Y02P70/613

Abstract: The present invention comprises cost-effectively manufactured, electrically conductive and mechanically compliant micro-leads and a method of utilizing these compliant micro-leads to interconnect area grid array chip scale packages (nullCSPsnull) to printed wiring boards (nullPWBsnull). The preferred method includes orienting a plurality of conductive compliant micro-leads, secured to one another in parallel with tie bars and tooling, to align with a corresponding pattern of conductive pads located along the surface of an area grid array CSP. The compliant micro-leads are electrically connected and mechanically secured to the corresponding connecting surfaces of the area grid array CSP. Next, the securing tie bars and the tooling are removed. The opposite ends of the conductive compliant micro-leads are then oriented to align with a corresponding pattern of conductive surface pads on a PWB. The opposite end of each compliant micro-lead is then electrically connected and mechanically secured to its corresponding connecting pad located on the surface of the PWB, thereby establishing a compliant electrical connection between the area grid array CSP and the PWB. An alternative embodiment of the present invention utilizes an area grid array interposer with compliant micro-leads to provide additional compliancy.

Abstract translation: 本发明包括成本有效的制造，导电和机械兼容的微引线以及利用这些柔性微引线将区域格栅阵列芯片级封装（“CSP”）互连到印刷电路板（“PWB”）的方法。 优选的方法包括使多个导电柔性微引线定向成与导杆和工具平行地彼此固定，以与沿着区域栅格阵列CSP的表面定位的导电焊盘的对应图案对准。 柔性微引线电连接并机械固定到区域网格阵列CSP的对应连接表面。 接下来，拆下固定连接杆和工具。 然后将导电顺应性微引线的相对端定向成与P​​WB上的导电表面焊盘的相应图案对准。 然后，每个柔性微引线的相对端电连接并机械固定到位于PWB表面上的相应的连接焊盘，从而在区域栅格阵列CSP和PWB之间建立顺从的电连接。 本发明的替代实施例利用具有柔性微引线的区域栅格阵列插入器来提供额外的符合性。