公开(公告)号：US10790141B2

公开(公告)日：2020-09-29

申请号：US15755428

申请日：2016-09-15

Applicant: Applied Materials, Inc.

Inventor： Kelvin Chan ,  Yihong Chen ,  Abhijit Basu Mallick

IPC: H01L21/02 ,  C23C16/04 ,  C23C16/34 ,  H01L21/285 ,  H01L21/306 ,  H01L21/768 ,  C23C16/455 ,  H01L21/32

Abstract: Methods for selectively depositing films by atomic layer deposition are disclosed. Substrate surfaces are passivated by hydrosilylation to prevent deposition and allow selective deposition on unpassivated surfaces.

公开(公告)号：US20190352774A1

公开(公告)日：2019-11-21

申请号：US16395015

申请日：2019-04-25

Applicant: Applied Materials, Inc.

Inventor： Kelvin Chan ,  Yang Guo ,  Ashish Goel ,  Anantha Subramani ,  Philip Allan Kraus

IPC: C23C16/44 ,  H01J37/32 ,  H01L21/02 ,  H01L21/285 ,  C23C14/34 ,  C23C28/04 ,  C23C16/40

Abstract: Embodiments include a processing tool for processing substrates in a low processing pressure and a high processing pressure. In an embodiment, the processing tool comprises a chamber body and a pedestal in the chamber body. In an embodiment, the pedestal is displaceable, and the pedestal has a first surface and a second surface opposite the first surface. In an embodiment, the processing tool further comprises a first gas port for supplying gasses into the chamber body and a first exhaust positioned above the first surface of the pedestal. In an embodiment, the embodiment further comprises a second gas port for supplying gasses into the chamber body and a second exhaust positioned below the second surface of the pedestal.

公开(公告)号：US10128150B2

公开(公告)日：2018-11-13

申请号：US15083590

申请日：2016-03-29

Applicant: Applied Materials, Inc.

Inventor： Pramit Manna ,  Rui Cheng ,  Kelvin Chan ,  Abhijit Basu Mallick

IPC: C23C16/00 ,  H01L21/768 ,  H01L21/285 ,  C23C16/04 ,  C23C16/16 ,  C23C16/34 ,  C23C16/46

Abstract: Implementations of the present disclosure generally relate to methods for forming thin films in high aspect ratio feature definitions. In one implementation, a method of processing a substrate in a process chamber is provided. The method comprises flowing a boron-containing precursor comprising a ligand into an interior processing volume of a process chamber, flowing a nitrogen-containing precursor comprising the ligand into the interior processing volume and thermally decomposing the boron-containing precursor and the nitrogen-containing precursor in the interior processing volume to deposit a boron nitride layer over at least one or more sidewalls and a bottom surface of a high aspect ratio feature definition formed in and below a surface of a dielectric layer on the substrate.

公开(公告)号：US10113234B2

公开(公告)日：2018-10-30

申请号：US14801348

申请日：2015-07-16

Applicant: Applied Materials, Inc.

Inventor： Bo Xie ,  Alexandros T. Demos ,  Vu Ngoc Tran Nguyen ,  Kelvin Chan ,  He Ren ,  Kang Sub Yim ,  Mehul B. Naik

IPC: C23C16/48 ,  C23C16/40 ,  H01L21/768 ,  H01L21/3105

Abstract: Embodiments described herein provide a method for sealing a porous low-k dielectric film. The method includes forming a sealing layer on the porous low-k dielectric film using a cyclic process. The cyclic process includes repeating a sequence of depositing a sealing layer on the porous low-k dielectric film and treating the sealing layer until the sealing layer achieves a predetermined thickness. The treating of each intermediate sealing layer generates more reactive sites on the surface of each intermediate sealing layer, which improves the quality of the resulting sealing layer.

公开(公告)号：US09478460B2

公开(公告)日：2016-10-25

申请号：US14822313

申请日：2015-08-10

Applicant: Applied Materials, Inc.

Inventor： Mei-yee Shek ,  Weifeng Ye ,  Li-Qun Xia ,  Kang Sub Yim ,  Kelvin Chan

IPC: H01L21/76 ,  H01L23/532 ,  H01L21/02 ,  H01L21/768 ,  H01L21/285 ,  H01L21/3105

CPC classification number: H01L21/7685 ,  H01L21/02074 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/28568 ,  H01L21/3105 ,  H01L21/76826 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76862 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. Embodiments described herein control selectivity of deposition by preventing damage to the dielectric surface, repairing damage to the dielectric surface, such as damage which can occur during the cobalt deposition process, and controlling deposition parameters for the cobalt layer.

公开(公告)号：US09105695B2

公开(公告)日：2015-08-11

申请号：US14285535

申请日：2014-05-22

Applicant: Applied Materials, Inc.

Inventor： Mei-yee Shek ,  Weifeng Ye ,  Li-Qun Xia ,  Kang Sub Yim ,  Kelvin Chan

IPC: H01L21/44 ,  H01L21/311 ,  H01L21/768 ,  H01L23/532 ,  H01L21/02 ,  H01L21/285

CPC classification number: H01L21/7685 ,  H01L21/02074 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/28568 ,  H01L21/3105 ,  H01L21/76826 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76862 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. Embodiments described herein control selectivity of deposition by preventing damage to the dielectric surface, repairing damage to the dielectric surface, such as damage which can occur during the cobalt deposition process, and controlling deposition parameters for the cobalt layer.

Abstract translation: 本发明的实施方案提供了在暴露的电介质表面上在铜表面上选择性地形成钴层的方法。 本文所述的实施例通过防止电介质表面的损坏来修复沉积的选择性，修复电介质表面的损伤，例如钴沉积过程中可能发生的损伤，以及控制钴层的沉积参数。

公开(公告)号：US08993444B2

公开(公告)日：2015-03-31

申请号：US13920380

申请日：2013-06-18

Applicant: Applied Materials, Inc.

Inventor： Kelvin Chan ,  Jin Xu ,  Kang Sub Yim ,  Alexandros T. Demos

IPC: H01L21/302 ,  H01L21/3065 ,  H01L21/3105 ,  C23C16/56 ,  H01L21/67 ,  H01L21/768 ,  H01L21/02

CPC classification number: H01L21/3065 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/3105 ,  H01L21/67115 ,  H01L21/6719 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76826 ,  H01L2221/1047

Abstract: Embodiments of the present invention generally relate to methods for lowering the dielectric constant of low-k dielectric films used in semiconductor fabrication. In one embodiment, a method for lowering the dielectric constant (k) of a low-k silicon-containing dielectric film, comprising exposing a porous low-k silicon-containing dielectric film to a hydrofluoric acid solution and subsequently exposing the low-k silicon-containing dielectric film to a silylation agent. The silylation agent reacts with Si—OH functional groups in the porous low-k dielectric film to increase the concentration of carbon in the low-k dielectric film.

Abstract translation: 本发明的实施例一般涉及用于降低半导体制造中使用的低k电介质膜的介电常数的方法。 在一个实施例中，一种用于降低低k含硅电介质膜的介电常数（k）的方法，包括将多孔低k含硅电介质膜暴露于氢氟酸溶液，随后将低k硅 包含电介质膜到甲硅烷基化剂。 甲硅烷基化剂与多孔低k电介质膜中的Si-OH官能团反应以增加低k电介质膜中的碳浓度。

公开(公告)号：US20240379331A1

公开(公告)日：2024-11-14

申请号：US18144745

申请日：2023-05-08

Applicant: Applied Materials, Inc.

Inventor： Thai Cheng Chua ,  Kelvin Chan ,  Adam Fischbach ,  Farzad Houshmand ,  Christian Valencia ,  Philip Allan Kraus

IPC: H01J37/32 ,  H05H1/46

Abstract: Embodiments disclosed herein include an applicator for microwave plasma generation. In an embodiment, the applicator comprises a resonator body with a hole into an axial center of the resonator body, where the resonator body comprises a first dielectric material. In an embodiment, the applicator further comprises a pin inserted into the hole, where the pin is an electrically conductive material. In an embodiment, the applicator further comprises a plate under the resonator body, where the plate comprises a second dielectric material that is different than the first dielectric material.

公开(公告)号：US12131948B2

公开(公告)日：2024-10-29

申请号：US18224904

申请日：2023-07-21

Applicant: Applied Materials, Inc.

Inventor： M. Arif Zeeshan ,  Kelvin Chan ,  Shantanu Kallakuri ,  Sony Varghese ,  John Hautala

IPC: H01L21/768 ,  H01L21/48

CPC classification number: H01L21/76879 ,  H01L21/486

Abstract: Embodiments herein include void-free material depositions on a substrate (e.g., in a void-free trench-filled (VFTF) component) obtained using directional etching to remove predetermined portions of a seed layer covering the substrate. In several embodiments, directional etching followed by selective deposition can enable fill material (e.g., metal) patterning in tight spaces without any voids or seams. Void-free material depositions may be used in a variety of semiconductor devices, such as transistors, dual work function stacks, dynamic random-access memory (DRAM), non-volatile memory, and the like.

公开(公告)号：US12012652B2

公开(公告)日：2024-06-18

申请号：US16395015

申请日：2019-04-25

Applicant: Applied Materials, Inc.

Inventor： Kelvin Chan ,  Yang Guo ,  Ashish Goel ,  Anantha Subramani ,  Philip Allan Kraus

IPC: H01J37/32 ,  C23C14/34 ,  C23C16/40 ,  C23C16/44 ,  C23C28/04 ,  H01L21/02 ,  H01L21/285

CPC classification number: C23C16/4402 ,  C23C14/34 ,  C23C16/402 ,  C23C16/405 ,  C23C16/4409 ,  C23C28/042 ,  H01J37/3244 ,  H01J37/32715 ,  H01J37/32871 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/28568 ,  H01J2237/20235 ,  H01J2237/3321 ,  H01L21/02274 ,  H01L21/0228

Abstract: Embodiments include a processing tool for processing substrates in a low processing pressure and a high processing pressure. In an embodiment, the processing tool comprises a chamber body and a pedestal in the chamber body. In an embodiment, the pedestal is displaceable, and the pedestal has a first surface and a second surface opposite the first surface. In an embodiment, the processing tool further comprises a first gas port for supplying gasses into the chamber body and a first exhaust positioned above the first surface of the pedestal. In an embodiment, the embodiment further comprises a second gas port for supplying gasses into the chamber body and a second exhaust positioned below the second surface of the pedestal.