公开(公告)号：US20070157952A1

公开(公告)日：2007-07-12

申请号：US11724344

申请日：2007-03-15

申请人： William Hiatt ,  Warren Farnworth ,  David Hembree ,  Peter Benson

发明人： William Hiatt ,  Warren Farnworth ,  David Hembree ,  Peter Benson

IPC分类号： B08B5/04 ,  B08B7/00 ,  B08B3/00

CPC分类号： B29C64/35 ,  B29C64/135 ,  B33Y30/00 ,  B33Y40/00 ,  B33Y50/02

摘要： Methods for cleaning consolidatable material from substrates or from features that have been fabricated with the material include application of pressure, force, or a cleaning agent to the substrate or feature. The pressure, force, or cleaning agent may be applied in a variety of ways. The unconsolidated material that has been removed from the substrate or feature may also be collected, optionally filtered, and reused in a subsequent programmed material consolidation process.

摘要翻译： 从基材或由材料制成的特征清洁可固结材料的方法包括向基材或特征施加压力，力或清洁剂。 压力，力或清洁剂可以以各种方式施加。 已经从基底或特征中去除的未固结的材料也可以被收集，任选地过滤，并在随后的程序化材料固结过程中重复使用。

公开(公告)号：US20070132105A1

公开(公告)日：2007-06-14

申请号：US11702286

申请日：2007-02-05

申请人： Salman Akram ,  James Wark ,  William Hiatt

发明人： Salman Akram ,  James Wark ,  William Hiatt

IPC分类号： H01L23/48

CPC分类号： H01L21/76879 ,  C23C18/1607 ,  C23C18/1637 ,  C23C18/1831 ,  C23C18/1834 ,  C23C18/34 ,  C23C18/36 ,  H01L21/288 ,  H01L21/76898 ,  H01L2924/00013 ,  Y10T428/12528 ,  Y10T428/24917 ,  H01L2224/29099

摘要： A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.

公开(公告)号：US20070004200A1

公开(公告)日：2007-01-04

申请号：US11516193

申请日：2006-09-06

申请人： Salman Akram ,  James Wark ,  William Hiatt

发明人： Salman Akram ,  James Wark ,  William Hiatt

IPC分类号： H01L21/44 ,  B05D5/12 ,  B32B3/00 ,  B05D3/04 ,  B05D1/18 ,  B28B19/00 ,  B32B7/00 ,  B05D3/10 ,  B29B15/10 ,  B32B15/00 ,  C23C18/00 ,  C23C20/00 ,  C23C24/00 ,  C23C26/00 ,  C23C28/00 ,  C23C30/00 ,  H01C17/06 ,  H05K3/00

CPC分类号： H01L21/76879 ,  C23C18/1607 ,  C23C18/1637 ,  C23C18/1831 ,  C23C18/1834 ,  C23C18/34 ,  C23C18/36 ,  H01L21/288 ,  H01L21/76898 ,  H01L2924/00013 ,  Y10T428/12528 ,  Y10T428/24917 ,  H01L2224/29099

摘要： A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.

摘要翻译： 一种激活中间半导体器件结构上的金属结构朝向金属电镀的方法。 该方法包括提供在半导体衬底上包括至少一个第一金属结构和至少一个第二金属结构的中间半导体器件结构。 所述至少一个第一金属结构包括至少一个铝结构，至少一个铜结构或至少一个包括铝和铜的混合物的结构，并且所述至少一个第二金属结构包括至少一个钨结构。 所述至少一个第一金属结构和所述至少一个第二金属结构中的一个被激活朝向金属镀覆，而不激活所述至少一个第一金属结构和所述至少一个第二金属结构中的另一个。 还公开了一种中间半导体器件结构。

公开(公告)号：US20060046088A1

公开(公告)日：2006-03-02

申请号：US10934635

申请日：2004-09-02

申请人： Salman Akram ,  James Wark ,  William Hiatt

发明人： Salman Akram ,  James Wark ,  William Hiatt

IPC分类号： H01L29/12

CPC分类号： H01L21/76879 ,  C23C18/1607 ,  C23C18/1637 ,  C23C18/1831 ,  C23C18/1834 ,  C23C18/34 ,  C23C18/36 ,  H01L21/288 ,  H01L21/76898 ,  H01L2924/00013 ,  Y10T428/12528 ,  Y10T428/24917 ,  H01L2224/29099

摘要： A method of selectively plating nickel on an intermediate semiconductor device structure. The method comprises providing an intermediate semiconductor device structure having at least one aluminum or copper structure and at least one tungsten structure. One of the aluminum or copper structure and the tungsten structure is nickel plated while the other remains unplated. The aluminum or copper structure or the tungsten structure may first be activated toward nickel plating. The activated aluminum or copper structure or the activated tungsten structure may then be nickel plated by immersing the intermediate semiconductor device structure in an electroless nickel plating solution. The unplated aluminum or copper structure or the unplated tungsten structure may subsequently be nickel plated by activating the unplated structure and nickel plating the activated structure. A method of simultaneously plating the aluminum or copper structure and the tungsten structure with nickel is also disclosed, as is an intermediate semiconductor device structure.

摘要翻译： 在中间半导体器件结构上选择性镀镍的方法。 该方法包括提供具有至少一个铝或铜结构和至少一个钨结构的中间半导体器件结构。 铝或铜结构之一和钨结构是镀镍的，而另一个保持未镀层。 可以首先将铝或铜结构或钨结构活化成镀镍。 然后可以通过将中间半导体器件结构浸入无电镀镍溶液中来将活化的铝或铜结构或活化的钨结构镀镍。 然后通过激活未镀层的结构和镀镍活化的结构，可以将未镀覆的铝或铜结构或未镀覆的钨结构镀镍。 还公开了一种用镍同时电镀铝或铜结构和钨结构的方法，以及中间半导体器件结构。

公开(公告)号：US20050127478A1

公开(公告)日：2005-06-16

申请号：US10733226

申请日：2003-12-10

申请人： William Hiatt ,  Kyle Kirby

发明人： William Hiatt ,  Kyle Kirby

IPC分类号： H01L21/68 ,  H01L21/768 ,  H01L23/48 ,  H01L25/065 ,  H01L29/40

CPC分类号： H01L24/14 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49816 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2225/06506 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： Microelectronic devices and methods for filling vias and forming conductive interconnects in microfeature workpieces and dies are disclosed herein. In one embodiment, a method includes providing a microfeature workpiece having a plurality of dies and at least one passage extending through the microfeature workpiece from a first side of the microfeature workpiece to an opposite second side of the microfeature workpiece. The method can further include forming a conductive plug in the passage adjacent to the first side of the microelectronic workpiece, and depositing conductive material in the passage to at least generally fill the passage from the conductive plug to the second side of the microelectronic workpiece.

摘要翻译： 本文公开了用于在微特征工件和模具中填充通孔并形成导电互连的微电子器件和方法。 在一个实施例中，一种方法包括提供具有多个模具的微特征工件和从微特征工件的第一侧延伸穿过微特征工件的至少一个通道到微特征工件的相对的第二侧。 该方法还可以包括在邻近微电子工件的第一侧的通道中形成导电插塞，以及在通道中沉积导电材料，以至少大体上填充从导电插头到微电子工件的第二侧的通道。

公开(公告)号：US20070075407A1

公开(公告)日：2007-04-05

申请号：US11608648

申请日：2006-12-08

申请人： Joseph Lindgren ,  Warren Farnworth ,  William Hiatt ,  Nishant Sinha

发明人： Joseph Lindgren ,  Warren Farnworth ,  William Hiatt ,  Nishant Sinha

IPC分类号： H01L23/495

CPC分类号： H01L23/367 ,  H01L23/427 ,  H01L24/31 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/10158 ,  H01L2924/19041 ,  H01L2224/0401

摘要： Microelectronic devices with improved heat dissipation, methods of making microelectronic devices, and methods of cooling microelectronic devices are disclosed herein. In one embodiment, the microelectronic device includes a microelectronic substrate having a first surface, a second surface facing opposite from the first surface, and a plurality of active devices at least proximate to the first surface. The second surface has a plurality of heat transfer surface features that increase the surface area of the second surface. In another embodiment, an enclosure having a heat sink and a single or multi-phase thermal conductor can be positioned adjacent to the second surface to transfer heat from the active devices.

摘要翻译： 本文公开了具有改善的散热的微电子器件，制造微电子器件的方法以及冷却微电子器件的方法。 在一个实施例中，微电子器件包括具有第一表面，与第一表面相对的第二表面的微电子衬底以及至少靠近第一表面的多个有源器件。 第二表面具有增加第二表面的表面积的多个传热表面特征。 在另一个实施例中，具有散热器和单相或多相热导体的外壳可以邻近第二表面定位以传递来自有源器件的热量。

公开(公告)号：US20070018321A1

公开(公告)日：2007-01-25

申请号：US11535414

申请日：2006-09-26

申请人： William Hiatt ,  Warren Farnworth

发明人： William Hiatt ,  Warren Farnworth

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L24/12 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05557 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/11902 ,  H01L2224/13006 ,  H01L2224/13023 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/13099 ,  H01L2224/13155 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/29099 ,  H01L2924/00014

摘要： An integrated circuit connection is describe that includes a first, securing member and a second, connection member. The first member, in an embodiment, is a spike that has a portion of its body fixed in a layer of an integrated circuit structure and extends outwardly from the integrated circuit structure. The second material is adapted to form a mechanical connection to a further electrical device. The second material (e.g., solder), is held by the first member to the integrated circuit structure. The first member increases the strength of the connection and assists in controlling the collapse of second member to form the mechanical connection to another circuit. The connection is formed by coating the integrated circuit structure with a patterned resist and etching the layer beneath the resist. A first member material (e.g., metal) is deposited. The resist is removed. The collapsible material is fixed to the first member.

摘要翻译： 描述了包括第一固定构件和第二连接构件的集成电路连接。 在一个实施例中，第一构件是尖头，其具有其主体的一部分固定在集成电路结构的层中并且从集成电路结构向外延伸。 第二材料适于与另一电气装置形成机械连接。 第二材料（例如焊料）被第一部件保持在集成电路结构上。 第一构件增加了连接的强度，并且有助于控制第二构件的塌陷以形成到另一个电路的机械连接。 该连接通过用图案化的抗蚀剂涂覆集成电路结构并蚀刻抗蚀剂下方的层而形成。 沉积第一成分材料（例如金属）。 抗蚀剂被去除。 可折叠材料固定到第一构件。

公开(公告)号：US20050064695A1

公开(公告)日：2005-03-24

申请号：US10980554

申请日：2004-11-03

申请人： William Hiatt ,  Warren Farnworth ,  Charles Watkins ,  Nishant Sinha

发明人： William Hiatt ,  Warren Farnworth ,  Charles Watkins ,  Nishant Sinha

IPC分类号： H01L21/68 ,  H01L23/31 ,  H01L21/44 ,  G01R31/02

CPC分类号： H01L23/48 ,  B33Y80/00 ,  H01L21/44 ,  H01L21/6836 ,  H01L23/3114 ,  H01L23/49531 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/11 ,  H01L24/12 ,  H01L24/27 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2224/02333 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/06136 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/13022 ,  H01L2224/13083 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/136 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor component includes a die having a pattern of die contacts, and interconnect contacts bonded to the die contacts and encapsulated in an insulating layer. The component also includes terminal contacts formed on tip portions of the interconnect contacts. Alternately the component can include conductors and bonding pads in electrical communication with the interconnect contacts configured to redistribute the pattern of the die contacts. A method for fabricating the component includes the steps of forming the interconnect contacts on the die contacts, and forming the insulating layer on the interconnect contacts while leaving the tip portions exposed. The method also includes the step of forming the terminal contacts on the interconnect contacts, or alternately forming the conductors and bonding pads in electrical communication with the interconnect contacts and then forming the terminal contacts on the bonding pads.

摘要翻译： 半导体部件包括具有芯片触点图案的芯片，以及接合到芯片触点并且封装在绝缘层中的互连触点。 该部件还包括形成在互连触点的尖端部分上的端子触头。 或者，该部件可以包括导体和与构造成重新分布芯片触点的图案的互连触点电连通的焊盘。 一种用于制造该部件的方法包括以下步骤：在裸片触点上形成互连触点，并在互连触点上形成绝缘层，同时使尖端部分露出。 该方法还包括在互连触点上形成端子触点的步骤，或者交替地形成与互连触点电连通的导体和焊盘，然后在焊盘上形成端子触点。

公开(公告)号：US20060254808A1

公开(公告)日：2006-11-16

申请号：US11484962

申请日：2006-07-12

申请人： Warren Farnworth ,  Steven McDonald ,  Nishant Sinha ,  William Hiatt

发明人： Warren Farnworth ,  Steven McDonald ,  Nishant Sinha ,  William Hiatt

IPC分类号： H05K1/00

CPC分类号： H05K3/426 ,  H01L21/486 ,  H01L23/147 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K3/062 ,  H05K3/108 ,  H05K3/244 ,  H05K2203/072 ,  Y10T29/49117 ,  Y10T29/49123 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/4916 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T29/49167 ,  H01L2924/00

摘要： Substrate precursor structures include a substrate blank having at least one aperture extending substantially through the substrate blank. At least a portion of at least one conductive layer covers a surface of the at least one aperture of the substrate blank. A mask pattern covers a portion of the at least one conductive layer and exposes another portion of the at least one conductive layer to define at least one conductive element, at least a portion of which extends over the surface of the at least one aperture.

摘要翻译： 衬底前体结构包括具有基本上延伸穿过衬底坯料的至少一个孔的衬底坯料。 至少一个导电层的至少一部分覆盖衬底坯料的至少一个孔的表面。 掩模图案覆盖所述至少一个导电层的一部分并且暴露所述至少一个导电层的另一部分以限定至少一个导电元件，其至少一部分在所述至少一个孔的表面上延伸。

公开(公告)号：US20060211313A1

公开(公告)日：2006-09-21

申请号：US11429012

申请日：2006-05-04

申请人： Warren Farnworth ,  William Hiatt ,  Charles Watkins

发明人： Warren Farnworth ,  William Hiatt ,  Charles Watkins

IPC分类号： H01R13/02

CPC分类号： H01R13/02 ,  B33Y30/00 ,  B33Y80/00 ,  H01R13/2414 ,  H01R2201/20

摘要： An electrical contact for use with a semiconductor device, a carrier, a probe card, or another substrate includes a dielectric core, a conductive coating on at least a portion of the core, or both that are at least partially fabricated by a programmed material consolidation process, such as, but not limited to, stereolithography, in which unconsolidated material is selectively consolidated in accordance with a program. The electrical contact may be flexible and resilient or it may be rigid. Protective structures may accompany flexible, resilient contacts to prevent deformation thereof beyond their elastic limits.

摘要翻译： 与半导体器件，载体，探针卡或另一基底一起使用的电触点包括介电芯，芯的至少一部分上的导电涂层或两者，至少部分地由编程材料固结 方法，例如但不限于立体光刻术，其中根据程序选择性地固结未固结的材料。 电接触可以是柔性的和弹性的，或者它可以是刚性的。 保护结构可以伴随柔性弹性触点，以防止其变形超出其弹性极限。