Non-volatile ferroelectric SRAM
    42.
    发明授权
    Non-volatile ferroelectric SRAM 有权
    非易失性铁电SRAM

    公开(公告)号:US06996000B2

    公开(公告)日:2006-02-07

    申请号:US10961429

    申请日:2004-10-07

    IPC分类号: G11C7/00

    CPC分类号: G11C11/22

    摘要: A non-volatile SRAM memory comprising a plurality of memory cells, each memory cell including a SRAM memory cell portion and a ferroelectric memory cell portion including a ferroelectric element, the ferroelectric memory cell portion including a switch system for permitting the ferroelectric element to be isolated from the ferroelectric elements in all other memory cells.

    摘要翻译: 一种包括多个存储单元的非易失性SRAM存储器,每个存储单元包括一个SRAM存储单元部分和一个包括铁电元件的铁电存储单元部分,该铁电存储单元部分包括用于允许该铁电元件被隔离的开关系统 从所有其他记忆单元中的铁电元件。

    Low temperature oxidizing method of making a layered superlattice material
    44.
    发明授权
    Low temperature oxidizing method of making a layered superlattice material 有权
    制作层状超晶格材料的低温氧化法

    公开(公告)号:US06582972B1

    公开(公告)日:2003-06-24

    申请号:US09544697

    申请日:2000-04-07

    IPC分类号: H01G2100

    摘要: A thin film of precursor for forming a layered superlattice material is applied to an integrated circuit substrate, then a strong oxidizing agent is applied at low temperature in a range of from 100° C. to 300° C. to the precursor thin film, thereby forming a metal oxide thin film. The strong oxidizing agent may be liquid or gaseous. An example of a liquid strong oxidizing agent is hydrogen peroxide. An example of a gaseous strong oxidizing agent is ozone. The metal oxide thin film is crystallized by annealing at elevated temperature in a range of from 500° C. to 700° C., preferably not exceeding 650° C., for a time period in a range of from 30 minutes to two hours. Annealing is conducted in an oxygen-containing atmosphere, preferably including water vapor. Treatment by ultraviolet (UV) radiation may precede annealing. RTP in a range of from 500° C. to 700° C. may precede annealing.

    摘要翻译: 将用于形成层状超晶格材料的前体薄膜施加到集成电路基板上,然后在100℃至300℃的低温下向前体薄膜施加强氧化剂,由此 形成金属氧化物薄膜。 强氧化剂可以是液体或气体。 液体强氧化剂的实例是过氧化氢。 气态强氧化剂的实例是臭氧。 金属氧化物薄膜通过在500℃至700℃,优选不超过650℃的范围内的升高温度退火30分钟至2小时的时间段而结晶。 退火在含氧气氛中进行,优选包括水蒸气。 紫外线(UV)辐射处理可能退火之前。 可以在退火之前从500℃到700℃的范围内的RTP。

    Ferroelectric device with bismuth tantalate capping layer and method of making same
    45.
    发明授权
    Ferroelectric device with bismuth tantalate capping layer and method of making same 失效
    具有钽酸铋盖层的铁电元件及其制造方法

    公开(公告)号:US06437380B1

    公开(公告)日:2002-08-20

    申请号:US09819542

    申请日:2001-03-28

    IPC分类号: H01L2976

    CPC分类号: H01L29/516 H01L28/56

    摘要: An integrated circuit device includes a thin film of bismuth-containing layered superlattice material having a thickness not exceeding 100 nm, a capping layer thin film of bismuth tantalate, and an electrode. The capping layer has a thickness in a range of from 3 nm to 30 nm and is deposited between the thin film of layered superlattice material and the electrode to increase dielectric breakdown voltage. Preferably the capping layer contains an excess amount of bismuth relative to the stoichiometrically balanced amount represented by the balanced stoichiometric formula BiTaO4. Preferably, the layered superlattice material is ferroelectric SBT or SBTN. Preferably, the integrated circuit device is a nonvolatile ferroelectric memory. Heating treatments for fabrication of the integrated circuit device containing the bismuth tantalate capping layerare conducted at temperatures not exceeding 700° C., preferably in a range of from 650° C. to 700° C.

    摘要翻译: 集成电路器件包括厚度不超过100nm的含铋层状超晶格材料薄膜,钽酸铋覆盖层薄膜和电极。 覆盖层的厚度在3nm至30nm的范围内,并且沉积在层状超晶格材料的薄膜和电极之间以增加介电击穿电压。 优选地,封盖层相对于由平衡化学计量式BiTaO 4表示的化学计量平衡量含有过量的铋。 优选地,层状超晶格材料是铁电SBT或SBTN。 优选地,集成电路器件是非易失性铁电存储器。 用于制造包含钽酸铋覆盖层的集成电路器件的加热处理在不超过700℃的温度下进行,优选在650℃至700℃的范围内。

    Ferroelectric integrated circuit having hydrogen barrier layer
    46.
    发明授权
    Ferroelectric integrated circuit having hydrogen barrier layer 有权
    具有氢阻挡层的铁电集成电路

    公开(公告)号:US06365927B1

    公开(公告)日:2002-04-02

    申请号:US09541290

    申请日:2000-04-03

    IPC分类号: H01L2976

    摘要: A hydrogen diffusion barrier in an integrated circuit is located to inhibit diffusion of hydrogen to a thin film of metal oxide material in an integrated circuit. The hydrogen diffusion barrier comprises at least one of the following nitrides: aluminum titanium nitride (Al2Ti3N6), aluminum silicon nitride (Al2Si3N6), aluminum niobium nitride (AlNb3N6), aluminum tantalum nitride (AlTa3N6), aluminum copper nitride (Al2Cu3N4), tungsten nitride (WN), and copper nitride (Cu3N2). The thin film of metal oxide is ferroelectric or high-dielectric, nonferroelectric material. Preferably, the metal oxide comprises ferroelectric layered superlattice material. Preferably, the hydrogen barrier layer is located directly over the thin film of metal oxide.

    摘要翻译: 集成电路中的氢扩散阻挡层位于集成电路中以抑制氢扩散到金属氧化物材料的薄膜。 氢扩散阻挡层包括以下氮化物中的至少一种:氮化钛铝(Al 2 Ti 3 N 6),氮化硅铝(Al 2 Si 3 N 6),氮化铌(AlNb 3 N 6),氮化钽铝(AlTa 3 N 6),氮化铝铝(Al 2 Cu 3 N 4) (WN)和氮化铜(Cu3N2)。 金属氧化物的薄膜是铁电或高电介质非电介质材料。 优选地,金属氧化物包括铁电层状超晶格材料。 优选地,氢阻挡层位于金属氧化物的薄膜的正上方。

    Ferroelectric field effect transistor, memory utilizing same, and method of operating same
    47.
    发明授权
    Ferroelectric field effect transistor, memory utilizing same, and method of operating same 失效
    铁电场效应晶体管,利用其的存储器及其操作方法

    公开(公告)号:US06339238B1

    公开(公告)日:2002-01-15

    申请号:US09329670

    申请日:1999-06-10

    IPC分类号: H01L2972

    摘要: A ferroelectric non-volatile memory in which each memory cell consists of a single electronic element, a ferroelectric FET. The FET includes a source, drain, gate and substrate. A cell is selected for writing or reading by application of bias voltages to the source, drain, gate or substrate. A gate voltage equal to one truth table logic value and a drain voltage equal to another truth table logic value are applied via a row decoder, and a substrate bias equal to a third truth table logic value is applied via a column decoder to write to the memory a resultant Ids logic state, which can be non-destructively read by placing a voltage across the source and drain.

    摘要翻译: 一种铁电非易失性存储器,其中每个存储单元由单个电子元件,铁电FET组成。 FET包括源极,漏极,栅极和衬底。 通过对源极,漏极,栅极或衬底施加偏置电压来选择单元进行写入或读取。 通过行解码器施加等于一个真值表逻辑值的栅极电压和等于另一个真值表逻辑值的漏极电压,经由列解码器施加等于第三真值表逻辑值的衬底偏置以写入 记录结果Ids逻辑状态,通过在源极和漏极之间放置电压可以非破坏性地读取。

    Method and apparatus for misted liquid source deposition of thin film
with reduced mist particle size
    49.
    发明授权
    Method and apparatus for misted liquid source deposition of thin film with reduced mist particle size 失效
    具有减少雾粒度的薄膜雾化液体沉积的方法和装置

    公开(公告)号:US6116184A

    公开(公告)日:2000-09-12

    申请号:US971890

    申请日:1997-11-17

    摘要: A mass flow controller controls the delivery of a precursor to a mist generator. The precursor is misted utilizing a venturi in which a combination of oxygen and nitrogen gas is charged by a corona wire and passes over a precursor-filled throat. The mist is refined using a particle inertial separator, electrically filtered so that it comprises predominately negative ions, passes into a velocity reduction chamber, and then flows into a deposition chamber through inlet ports in an inlet plate that is both a partition between the chambers and a grounded electrode. The inlet plate is located above and substantially parallel to the plane of the substrate on which the mist is to be deposited. The substrate is positively charged to a voltage of about 5000 volts. There are 440 inlet ports per square inch in an 39 square inch inlet port area of the inlet plate directly above the substrate. The inlet port area is approximately equal to the substrate area. An exhaust port defines a channel about the periphery of an exhaust plane parallel to and below the substrate plane.

    摘要翻译: 质量流量控制器控制前体到雾发生器的输送。 使用文丘里管雾化前体,其中氧气和氮气的组合由电晕丝充电并且通过前体填充的喉部。 使用粒子惯性分离器精制雾气,使其主要包含负离子,进入减速室,然后通过入口板中的入口端口进入沉积室,该入口板是腔室之间的分隔, 接地电极。 入口板位于要沉积雾的基底的平面上方并且基本上平行。 基板被充电至约5000伏特的电压。 在基板正上方的入口板的39平方英寸进口端口区域中每平方英寸有440个入口端口。 入口面积大致等于衬底面积。 排气口围绕平行于和低于衬底平面的排气平面的周边限定通道。

    Ferroelectric non-volatile memory unit
    50.
    发明授权
    Ferroelectric non-volatile memory unit 失效
    铁电非易失性存储单元

    公开(公告)号:US5523964A

    公开(公告)日:1996-06-04

    申请号:US224241

    申请日:1994-04-07

    CPC分类号: G11C11/22 G11C11/223

    摘要: An integrated circuit non-volatile, non-destructive read-out memory unit includes a ferroelectric capacitor having first and second electrodes, a capacitance Cf, and an area Af, and a transistor having a gate, a source and a drain forming a gate capacitor having an area Ag and a gate capacitance Cg, a gate overlap b, and a channel depth a, with the capacitor first electrode connected to the gate of the transistor. The ferroelectric material has a dielectric constant .epsilon.f and the gate insulator has a dielectric constant .epsilon.g. A source of a constant reference voltage is connectable to the first electrode. A bit line connects to the second electrode. In one embodiment the first electrode and gate are the same conductive member. In another embodiment the second electrode and the gate are the same conductive member and the first electrode is formed by extensions of the transistor source and drains underlying the gate, with the ferroelectric material between the source and drain extensions and the gate. The memory unit has the parametric relationships: Cf

    摘要翻译: 集成电路非易失性非破坏性读出存储单元包括具有第一和第二电极的铁电电容器,电容Cf和区域Af,以及具有形成栅极电容器的栅极,源极和漏极的晶体管 具有面积Ag和栅极电容Cg,栅极重叠b和沟道深度a,其中电容器第一电极连接到晶体管的栅极。 铁电材料具有介电常数εf,栅极绝缘体具有介电常数εg。 恒定参考电压的源可连接到第一电极。 位线连接到第二电极。 在一个实施例中,第一电极和栅极是相同的导电构件。 在另一个实施例中,第二电极和栅极是相同的导电构件,并且第一电极由晶体管源的延伸和栅极下方的漏极形成,铁电材料在源极和漏极延伸部分之间以及栅极之间。 存储器单元具有参数关系:Cf <5xCg,Af / = 2a和epsilon g> / = epsilon f / 8。