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公开(公告)号:US09941565B2
公开(公告)日:2018-04-10
申请号:US14922037
申请日:2015-10-23
Applicant: Analog Devices Global
Inventor: Conor John McLoughlin , Michael John Flynn , Laurence B. O'Sullivan , Shane Geary , Stephen O'Brien , Bernard P. Stenson , Baoxing Chen , Sarah Carroll , Michael Morrissey , Patrick M. McGuinness
CPC classification number: H01P1/36 , H01L2224/48137 , H01P5/187
Abstract: An isolator device and a corresponding method of forming the isolator device to include first and second electrodes, a layer of first dielectric material between the first and second electrodes, and at least one region of second dielectric material between the layer of first dielectric material and at least one of the first and second electrodes. The second dielectric material has a higher relative permittivity than the first dielectric material.
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公开(公告)号:US20180095119A1
公开(公告)日:2018-04-05
申请号:US15284374
申请日:2016-10-03
Applicant: Analog Devices Global
Inventor: Vamshi Krishna Chillara , Pablo Cruz Dato , Declan M. Dalton
CPC classification number: G01R23/02 , H03L7/08 , H03L7/091 , H03L7/0993 , H03L7/1075 , H03L2207/50
Abstract: A chip includes a phase-locked loop (PLL) and a test controller. The PLL includes an oscillator and a phase detector. In a normal mode, a first feedback loop includes a phase detector and an oscillator that generates an output based on a frequency input signal. In a test mode, the PLL is re-configured. The output of the loop filter can be decoupled from the input of the oscillator in the test mode and instead be coupled to the input of the phase detector. The oscillator can receive a test tuning signal provided by the test controller. In this test mode configuration, the PLL can measure the frequency of the oscillator.
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公开(公告)号:US20180083645A1
公开(公告)日:2018-03-22
申请号:US15271697
申请日:2016-09-21
Applicant: Analog Devices Global
Inventor: Sandeep Monangi , Mahesh Madhavan
CPC classification number: H03M1/0617 , H03M1/1042 , H03M1/1245 , H03M1/38 , H03M1/468 , H03M3/378
Abstract: A successive approximation register analog to digital converter (SAR ADC) is provided in which impact of dielectric absorption is reduced with a correction circuit configured to adjust a present digital code value signal based at least in part upon a previous digital code value signal, an acquisition time and temperature.
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公开(公告)号:US20180083439A1
公开(公告)日:2018-03-22
申请号:US15269086
申请日:2016-09-19
Applicant: Analog Devices Global
Inventor: Padraig Liam Fitzgerald , Srivatsan Parthasarathy , Javier A. Salcedo
CPC classification number: H01H59/0009 , B81C1/0023 , B81C1/00246 , B81C2203/0735 , H01L23/3107 , H01L23/49541 , H01L27/0255 , H01L27/0262 , H01L27/1203 , H01L2224/48091 , H01L2224/48137 , H01L2224/48145 , H01L2224/48227 , H01L2224/48247 , H01L2924/16235 , H01L2924/181 , H01L2924/19105 , H02H9/041 , H02H9/046 , H01L2924/00012 , H01L2924/00014
Abstract: Micro-electromechanical switch (MEMS) devices can be fabricated using integrated circuit fabrication techniques and materials. Such switch devices can provide cycle life and insertion loss performance suiting for use in a broad range of applications including, for example, automated test equipment (ATE), switching for measurement instrumentation (such as a spectrum analyzer, network analyzer, or communication test system), and uses in communication systems, such as for signal processing. MEMS devices can be vulnerable to electrical over-stress, such as associated with electrostatic discharge (ESD) transient events. A solid-state clamp circuit can be incorporated in a MEMS device package to protect one or more MEMS devices from damaging overvoltage conditions. The clamp circuit can include single or multiple blocking junction structures having complementary current-voltage relationships, such as to help linearize a capacitance-to-voltage relationship presented by the clamp circuit.
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公开(公告)号:US20180059044A1
公开(公告)日:2018-03-01
申请号:US15251833
申请日:2016-08-30
Applicant: Analog Devices Global
Inventor: Alfonso Berduque , Helen Berney , William Allan Lane , Raymond J. Speer , Brendan Cawley , Donal Mcauliffe , Patrick Martin McGuinness
IPC: G01N27/403
CPC classification number: G01N27/403 , G01N27/4045
Abstract: An electrochemical sensor is provided which may be formed using micromachining techniques commonly used in the manufacture of integrated circuits. This is achieved by forming microcapillaries in a silicon substrate and forming an opening in an insulating layer to allow environmental gases to reach through to the top side of the substrate. A porous electrode is printed on the top side of the insulating layer such that the electrode is formed in the opening in the insulating layer. The sensor also comprises at least one additional electrode. The electrolyte is then formed on top of the electrodes. A cap is formed over the electrodes and electrolyte. This arrangement may easily be produced using micromachining techniques.
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公开(公告)号:US20180033565A1
公开(公告)日:2018-02-01
申请号:US15663628
申请日:2017-07-28
Applicant: Analog Devices Global
Inventor: Padraig Fitzgerald , Jo-ey Wong , Raymond C. Goggin , Bernard Patrick Stenson , Paul Lambkin , Mark Schirmer
CPC classification number: H01H1/0036 , H01H59/0009 , H01H2001/0084 , H01H2059/0018 , H01H2059/0072
Abstract: Several features are disclosed that improve the operating performance of MEMS switches such that they exhibit improved in-service life and better control over switching on and off.
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公开(公告)号:US09871373B2
公开(公告)日:2018-01-16
申请号:US14671767
申请日:2015-03-27
Applicant: Analog Devices Global
Inventor: Alan J. O'Donnell , David Aherne , Javier Alejandro Salcedo , David J. Clarke , John A. Cleary , Patrick Martin McGuinness , Albert C. O'Grady
CPC classification number: H02H9/04 , H01L27/0248 , H01L2224/32145 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/181 , H02H9/02 , H02H9/042 , H02H9/046 , H01L2924/00012 , H01L2924/00014 , H01L2924/00
Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
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公开(公告)号:US09871029B2
公开(公告)日:2018-01-16
申请号:US15149079
申请日:2016-05-06
Applicant: ANALOG DEVICES GLOBAL
Inventor: John Twomey , Brian Sweeney , Brian B. Moane
IPC: H03K17/687 , H01L27/02 , H01L29/78 , H03K5/08
CPC classification number: H01L27/0255 , H01L29/7802 , H01L29/7816 , H03K5/08 , H03K17/102 , H03K17/6871 , H03K17/6874
Abstract: A bus driver is provided that can withstand over voltages being applied to its output terminal without the protection circuit detracting from the voltage swing that can be provided by the driver. The circuit arrangement also allows transistors having good on state resistance and large tolerance of drain-to-source voltages to be used.
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公开(公告)号:US20170359079A1
公开(公告)日:2017-12-14
申请号:US15618392
申请日:2017-06-09
Applicant: Analog Devices Global
Inventor: DENNIS A. DEMPSEY
IPC: H03M1/10
CPC classification number: H03M1/1009 , H03M1/0881 , H03M1/66
Abstract: Digital to analog converters (DAC) are used to convert digital signals to analog values. The digital system providing data to the analog converter may be highly tasked. A DAC is provided with some in built logic to assist in reducing the load on the devices driving the DAC. The DAC may include a library of functions that it can apply to the input words to modify transitions in the analog output words. The DAC may further include a health checking system for monitoring the digital words being supplied to the DAC and raising a concern, and taking action if required, if the sequence of words is unlikely to be correct or beyond the target operating range.
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公开(公告)号:US20170359077A1
公开(公告)日:2017-12-14
申请号:US15618620
申请日:2017-06-09
Applicant: Analog Devices Global
Inventor: Dennis A. DEMPSEY , Harvey T. MERCADO
IPC: H03M1/08
Abstract: A buffer is provided where a part of the buffer is implemented in switched capacitor or other analog discrete time processing circuitry and a dynamic response characteristic, such as an effective gain or charge transfer coefficient between the input stage and an output stage is digitally controllable. This means that the buffer can be driven as if it was a system controlled by, for example a three (3) term controller, giving rise to greater, digital flexibility in tailoring the buffer's transient response.
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