公开(公告)号：US20050117420A1

公开(公告)日：2005-06-02

申请号：US10994140

申请日：2004-11-19

申请人： Soon-keun Jeon ,  Yong-cheul Kim ,  Han Kim ,  Bae-sun Jun

发明人： Soon-keun Jeon ,  Yong-cheul Kim ,  Han Kim ,  Bae-sun Jun

IPC分类号： G01R31/28 ,  G11C7/00 ,  G11C11/401 ,  G11C29/00 ,  G11C29/04 ,  G11C29/12 ,  G11C29/14

CPC分类号： G11C29/14 ,  G11C2029/0405

摘要： A memory test circuit and a test system are provided. The memory test circuit comprises a memory which outputs stored data through n-bit data output pins, and a built-in self test (BIST) unit. The BIST unit writes test data in the memory, and by comparing the test data output from the memory with expected data, determines a failure cell address in the memory. The BIST unit generates k preliminary failure signals having failure information indicating whether the test data correspond with the expected data, and outputs the k preliminary failure signals for m cycles of a clock signal, by outputting k/m preliminary failure signals each cycle as first through k/m failure signals. When a test operation is performed, the memory divides the n-bit data output pins into eight groups to make the groups correspond to respective areas in the memory, and when a repair operation is performed, repair is performed in each area of the memory corresponding to the eight groups of the data output pins. In the memory test circuit and test system, the BIST unit testing a memory and generating a failure signal is disposed in a memory apparatus and a failure analysis circuit analyzing a failure signal output by the BIST unit is disposed in the test apparatus. Thus, the burden of designing a memory for test operation can be reduced. In addition, by outputting failure signals after dividing the signals, the overhead of pins of the test apparatus can be reduced.

摘要翻译： 提供记忆测试电路和测试系统。 存储器测试电路包括通过n位数据输出引脚输出存储的数据的存储器和内置的自检（BIST）单元。 BIST单元将测试数据写入存储器，并通过将存储器输出的测试数据与预期数据进行比较，确定存储器中的故障单元地址。 BIST单元生成具有指示测试数据是否与期望数据相对应的故障信息的k个初始故障信号，并且通过每个周期作为第一到第一通过输出k / m个初步故障信号来输出用于时钟信号的m个周期的k个初步故障信号 k / m故障信号。 当执行测试操作时，存储器将n位数据输出引脚分成八组，使组对应于存储器中的相应区域，当执行修复操作时，在存储器对应的每个区域中执行修复 到八组数据输出引脚。 在存储器测试电路和测试系统中，测试存储器并产生故障信号的BIST单元被布置在存储器装置中，并且分析由BIST单元输出的故障信号的故障分析电路设置在测试装置中。 因此，可以减少设计用于测试操作的存储器的负担。 此外，通过在分割信号之后输出故障信号，可以减少测试装置的引脚的开销。

公开(公告)号：US08966746B2

公开(公告)日：2015-03-03

申请号：US13064847

申请日：2011-04-20

申请人： Han Kim ,  Je-Gwang Yoo ,  Chang-Sup Ryu

发明人： Han Kim ,  Je-Gwang Yoo ,  Chang-Sup Ryu

IPC分类号： H05K3/30 ,  H05K1/16 ,  H05K3/00 ,  H05K3/40 ,  H05K3/46

CPC分类号： H05K1/162 ,  H05K3/0035 ,  H05K3/4069 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09563 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A method of fabricating a cavity capacitor embedded in a printed circuit board including two conductive layers to be used as a power layer and a ground layer, respectively, and a first dielectric layer, placed between the two conductive layers, the method including: removing an upper conductive layer and the first dielectric layer excluding a lower conductive layer of the two conductive layers to allow a cavity to be formed between the two conductive layers, the lower conductive layer being supposed to be used as any one of electrodes of the cavity capacitor; stacking a dielectric material on the cavity to allow a second dielectric layer having a lower stepped portion than the first dielectric layer to be formed in the cavity; and stacking a conductive material on an upper part of the second dielectric layer and side parts of the cavity to allow the upper conductive layer to be used as the other electrode of the cavity capacitor.

摘要翻译： 一种嵌入在印刷电路板中的空腔电容器的方法，包括分别用作功率层和接地层的两个导电层和放置在两个导电层之间的第一介电层，所述方法包括： 上导电层和除了两个导电层的下导电层之外的第一电介质层，以允许在两个导电层之间形成腔，下导电层假定用作空腔电容器的任一电极; 在所述空腔上堆叠电介质材料以允许在所述空腔中形成具有比所述第一电介质层更低的台阶部分的第二电介质层; 并且在第二电介质层的上部和空腔的侧部上堆叠导电材料，以允许上部导电层用作空腔电容器的另一个电极。

公开(公告)号：US08422248B2

公开(公告)日：2013-04-16

申请号：US13137504

申请日：2011-08-22

申请人： Han Kim ,  Jae-Joon Lee ,  Mi-Ja Han ,  Dae-Hyun Park

发明人： Han Kim ,  Jae-Joon Lee ,  Mi-Ja Han ,  Dae-Hyun Park

IPC分类号： H05K9/00

CPC分类号： H05K1/0236 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H05K1/116 ,  H05K1/165 ,  H05K2201/09309 ,  H05K2201/09454 ,  H05K2201/09663 ,  H01L2224/0401

摘要： An electromagnetic bandgap structure, including: a first metal layer; a first dielectric layer, stacked in the first metal layer; a metal plate, stacked in the first dielectric layer; a via, having one end part which is connected to the first metal layer; a second dielectric layer, stacked in the metal plate and the first dielectric layer; and a second metal layer, stacked in the second dielectric layer, whereas the other end part of the via is connected to a via land which is placed in a hole formed in the metal plate, and the via land is connected to the metal plate through a metal line.

摘要翻译： 一种电磁带隙结构，包括：第一金属层; 第一介电层，堆叠在第一金属层中; 金属板，堆叠在第一介电层中; 通孔，其具有连接到所述第一金属层的一个端部; 第二电介质层，堆叠在所述金属板和所述第一介电层中; 以及第二金属层，层叠在第二电介质层中，而通孔的另一端部连接到放置在形成在金属板中的孔中的通孔焊盘，并且通路焊盘通过 金属线。

公开(公告)号：US08420949B2

公开(公告)日：2013-04-16

申请号：US12230871

申请日：2008-09-05

申请人： Mi-Ja Han ,  Dae-Hyun Park ,  Han Kim

发明人： Mi-Ja Han ,  Dae-Hyun Park ,  Han Kim

IPC分类号： H05K1/16 ,  H01G4/228

CPC分类号： H01P1/20327 ,  H01L2224/16225 ,  H01P1/2005 ,  H05K1/0236 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2201/09681

摘要： According to the present invention, the board can include a dielectric layer; a plurality of conductive plates; and a stitching via, to electrically connect two of the conductive plates to each other. Here, the stitching via can include a first via and a second via, respectively, passing through the dielectric layer and having one end part being placed on a same planar surface as each of the two conductive plates; a connection pattern, having each end part being connected to the other end part of the first via and the second via, respectively; and a first extension pattern, placed on the same planar surface as one of the conductive plates and having one end part being connected to the one end part of the first via and the end part being connected to one of the conductive plates.

公开(公告)号：US08253025B2

公开(公告)日：2012-08-28

申请号：US12654307

申请日：2009-12-16

申请人： Han Kim ,  Mi-Ja Han ,  Dae-Hyun Park

发明人： Han Kim ,  Mi-Ja Han ,  Dae-Hyun Park

IPC分类号： H05K9/00

CPC分类号： H05K1/0233 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H05K1/0236 ,  H05K1/112 ,  H05K2201/086 ,  H05K2201/1003 ,  H01L2924/00014

摘要： Disclosed is a printed circuit board including an electromagnetic bandgap structure. The electromagnetic bandgap structure for blocking a noise is inserted into the printed circuit board. The electromagnetic bandgap structure can include a first conductive plate; a second conductive plate arranged on a planar surface that is different from that of the first conductive plate; a third conductive plate arranged on a planar surface that is different from that of the second conductive plate; and a stitching via unit configured to connect the first conductive plate and the third conductive plate by bypassing the planar surface on which the second conductive plate is arranged and including a first inductor element.

摘要翻译： 公开了一种包括电磁带隙结构的印刷电路板。 用于阻挡噪声的电磁带隙结构被插入到印刷电路板中。 电磁带隙结构可以包括第一导电板; 布置在与第一导电板不同的平面上的第二导电板; 布置在与第二导电板的平面不同的平面上的第三导电板; 以及缝合通孔单元，其被配置为通过旁路布置所述第二导电板的平面并且包括第一电感器元件来连接所述第一导电板和所述第三导电板。

公开(公告)号：US08232478B2

公开(公告)日：2012-07-31

申请号：US12654766

申请日：2009-12-31

申请人： Han Kim ,  Je-Gwang Yoo ,  Chang-Sup Ryu

发明人： Han Kim ,  Je-Gwang Yoo ,  Chang-Sup Ryu

IPC分类号： H05K9/00

CPC分类号： H05K9/0071 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2924/00014 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0236 ,  H05K9/002 ,  H05K9/0064 ,  H05K2201/09309 ,  H05K2201/09627 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： An EMI noise reduction board using an electromagnetic bandgap structure is disclosed. In the EMI noise reduction board according to an embodiment of the present invention, an electromagnetic bandgap structure having band stop frequency properties can be inserted into an inner portion of the board so as to shield an EMI noise, in which the portion corresponds to an edge of the board and in which the EMI noise is conducted from the inside to the edge of the board and radiates to the outside of the board.

摘要翻译： 公开了一种使用电磁带隙结构的EMI降噪板。 在根据本发明实施例的EMI噪声抑制板中，具有带阻频率特性的电磁带隙结构可以插入到板的内部，以屏蔽EMI噪声，其中该部分对应于边缘 并且其EMI噪声从板的内部传导到边缘并辐射到板的外部。

公开(公告)号：US08212150B2

公开(公告)日：2012-07-03

申请号：US12654368

申请日：2009-12-17

申请人： Han Kim ,  Mi-Ja Han ,  Dae-Hyun Park ,  Hyo-Jic Jung ,  Kang-Wook Bong

发明人： Han Kim ,  Mi-Ja Han ,  Dae-Hyun Park ,  Hyo-Jic Jung ,  Kang-Wook Bong

IPC分类号： H05K9/00

CPC分类号： H05K1/0236 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H05K2201/09309 ,  H05K2201/09627 ,  H01L2924/00014

摘要： An EMI noise reduction board is disclosed. The electromagnetic interference (EMI) noise reduction board having an electromagnetic bandgap structure for shielding a noise includes: a first area having a ground layer and a power layer; a second area placed in a side portion of the first area having an electromagnetic bandgap structure therein. The electromagnetic bandgap structure includes: a plurality of first conductive plates and a plurality of second conductive plates placed on a same planar surface along the side portion of the first area; and a stitching via configured to electrically connect the first conductive plate to the second conductive plate through a planar surface that is different from the first conductive plate and the second conductive plate.

摘要翻译： 公开了一种EMI降噪板。 具有用于屏蔽噪声的电磁带隙结构的电磁干扰（EMI）降噪板包括：具有接地层和功率层的第一区域; 放置在其中具有电磁带隙结构的第一区域的侧部的第二区域。 电磁带隙结构包括：多个第一导电板和沿着第一区域的侧面部分放置在同一平面上的多个第二导电板; 以及缝合通孔，其被构造成通过不同于所述第一导电板和所述第二导电板的平坦表面将所述第一导电板电连接到所述第二导电板。

公开(公告)号：US08153907B2

公开(公告)日：2012-04-10

申请号：US12010437

申请日：2008-01-24

申请人： Dae-Hyun Park ,  Han Kim ,  Mi-Ja Han ,  Ja-Bu Koo

发明人： Dae-Hyun Park ,  Han Kim ,  Mi-Ja Han ,  Ja-Bu Koo

IPC分类号： H05K1/11

CPC分类号： H05K1/0236 ,  H05K1/0219 ,  H05K1/0222 ,  H05K1/115 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/09618 ,  H05K2201/09718 ,  H05K2201/09781 ,  Y10T29/4913 ,  Y10T29/49165 ,  Y10T428/12465

摘要： An electromagnetic bandgap structure and a printed circuit board that solve a mixed signal problem are disclosed. In accordance with embodiments of the present invention, the electromagnetic bandgap structure includes a first metal layer; a first dielectric layer, stacked in the first metal layer; a second metal layer, stacked in the first dielectric layer, and having a holed formed at a position of the second dielectric layer; a second dielectric layer, stacked in the second metal layer; a metal plate, stacked in the second dielectric layer; a first via, penetrating the hole formed in the second metal layer and connecting the first metal layer and the metal plate; a third dielectric layer, stacked in the metal plate and the second dielectric layer; a third metal layer, stacked in the third dielectric layer; and a second via, connecting the second metal layer to the third metal layer.

摘要翻译： 公开了一种解决混合信号问题的电磁带隙结构和印刷电路板。 根据本发明的实施例，电磁带隙结构包括第一金属层; 第一介电层，堆叠在第一金属层中; 第二金属层，堆叠在第一介电层中，并且具有形成在第二介电层的位置的孔; 第二介电层，堆叠在第二金属层中; 金属板，堆叠在第二介电层中; 穿过形成在第二金属层中的孔并连接第一金属层和金属板的第一通孔; 第三电介质层，堆叠在所述金属板和所述第二介电层中; 第三金属层，堆叠在第三介电层中; 以及将第二金属层连接到第三金属层的第二通孔。

公开(公告)号：US20120066902A1

公开(公告)日：2012-03-22

申请号：US13301063

申请日：2011-11-21

申请人： Han Kim ,  Je Gwang Yoo ,  Chang Sup Ryu ,  Chang Gun Oh

发明人： Han Kim ,  Je Gwang Yoo ,  Chang Sup Ryu ,  Chang Gun Oh

IPC分类号： H05K3/10

CPC分类号： H05K1/116 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/025 ,  H05K3/108 ,  H05K3/427 ,  H05K2201/0394 ,  H05K2201/09545 ,  Y10T29/49165

摘要： A method of manufacturing a printed circuit board, including: preparing a double-sided substrate which comprises an insulating layer, a first copper layer formed on one side of the insulating layer and a second copper layer formed on the other side of the insulating layer; forming a via-hole through the second copper layer and the insulating layer; forming a plating layer on an inner wall of the via-hole; and forming, on the double-sided substrate, a via, a first circuit layer including a circuit pattern that is formed on a surface of the via having a minimum diameter and has a line width smaller than the minimum diameter of the via, and a second circuit layer including a lower land.

摘要翻译： 一种制造印刷电路板的方法，包括：制备双面基板，其包括绝缘层，形成在所述绝缘层的一侧上的第一铜层和形成在所述绝缘层的另一侧上的第二铜层; 通过所述第二铜层和所述绝缘层形成通孔; 在所述通孔的内壁上形成镀层; 并且在双面基板上形成通孔，包括形成在具有最小直径并且具有小于通孔的最小直径的线宽度的通孔的表面上的电路图案的第一电路层，以及 第二电路层包括较低的焊盘。

公开(公告)号：US20110303452A1

公开(公告)日：2011-12-15

申请号：US13137504

申请日：2011-08-22

申请人： Han Kim ,  Jae-Joon Lee ,  Mi-Ja Han ,  Dae-Hyun Park

发明人： Han Kim ,  Jae-Joon Lee ,  Mi-Ja Han ,  Dae-Hyun Park

IPC分类号： H05K1/11

CPC分类号： H05K1/0236 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H05K1/116 ,  H05K1/165 ,  H05K2201/09309 ,  H05K2201/09454 ,  H05K2201/09663 ,  H01L2224/0401

摘要： An electromagnetic bandgap structure, including: a first metal layer; a first dielectric layer, stacked in the first metal layer; a metal plate, stacked in the first dielectric layer; a via, having one end part which is connected to the first metal layer; a second dielectric layer, stacked in the metal plate and the first dielectric layer; and a second metal layer, stacked in the second dielectric layer, whereas the other end part of the via is connected to a via land which is placed in a hole formed in the metal plate, and the via land is connected to the metal plate through a metal line.

摘要翻译： 一种电磁带隙结构，包括：第一金属层; 第一介电层，堆叠在第一金属层中; 金属板，堆叠在第一介电层中; 通孔，其具有连接到所述第一金属层的一个端部; 第二电介质层，堆叠在所述金属板和所述第一介电层中; 以及第二金属层，层叠在第二电介质层中，而通孔的另一端部连接到放置在形成在金属板中的孔中的通孔焊盘，并且通路焊盘通过 金属线。