公开(公告)号：US07528480B2

公开(公告)日：2009-05-05

申请号：US11645044

申请日：2006-12-22

申请人： Ichiro Mihara

发明人： Ichiro Mihara

IPC分类号： H01L23/12 ,  H01L23/053

CPC分类号： H01L21/6835 ,  H01L21/4857 ,  H01L23/5389 ,  H01L24/48 ,  H01L24/73 ,  H01L2221/68345 ,  H01L2221/68377 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/05647 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2224/82039 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A circuit board includes a semiconductor substrate which has a plurality of through holes passing from an upper surface to a lower surface thereof. A plurality of wiring lines are provided on the upper surface of the semiconductor substrate and have bottomed cylindrical portions located within regions corresponding to the through holes. Bottom surfaces of the bottomed cylindrical portions of the wiring lines serve as connection pad portions.

摘要翻译： 电路板包括具有从上表面到下表面通过的多个通孔的半导体基板。 在半导体衬底的上表面上设置有多个布线，并且具有位于对应于通孔的区域内的有底圆筒部。 布线的有底圆筒部分的底表面用作连接垫部分。

公开(公告)号：US20070228468A1

公开(公告)日：2007-10-04

申请号：US11729650

申请日：2007-03-29

申请人： Takeshi Wakabayashi ,  Ichiro Mihara ,  Osamu Okada

发明人： Takeshi Wakabayashi ,  Ichiro Mihara ,  Osamu Okada

IPC分类号： H01L27/12

CPC分类号： H01L29/78639 ,  H01L21/563 ,  H01L23/3114 ,  H01L23/492 ,  H01L23/50 ,  H01L24/16 ,  H01L24/24 ,  H01L24/73 ,  H01L24/82 ,  H01L24/91 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/16225 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/24998 ,  H01L2224/2518 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73259 ,  H01L2224/73267 ,  H01L2224/82007 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/07811 ,  H01L2924/10156 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/05599

摘要： A circuit substrate of a grounding structure of a semiconductor device according to the invention has a plurality of connection pads and a grounding wiring. The semiconductor device has a semiconductor substrate having one side face and the other side face opposite thereto, an insulating film formed thereon, an SOI integrated circuit provided thereon and including a plurality of connection pads, and electrodes for external connection each of which is connected to the corresponding connection pad. The semiconductor device has the external connection electrodes connected to the respective connection pads of the circuit substrate by a face-down bonding scheme. An under-filling material is provided between the semiconductor device and the circuit substrate, and there is provided a connection member which connects the other side face of the semiconductor device with the grounding wiring of the circuit substrate, and is made of a conductive material.

摘要翻译： 根据本发明的半导体器件的接地结构的电路基板具有多个连接焊盘和接地布线。 半导体器件具有一个半导体衬底，其具有一个侧面，另一个侧面与其相对，形成在其上的绝缘膜，设置在其上的SOI集成电路，并且包括多个连接焊盘，以及用于外部连接的电极， 相应的连接板。 半导体器件具有通过面向下接合方案连接到电路衬底的各个连接焊盘的外部连接电极。 在半导体器件和电路基板之间设置有填充不足的材料，并且设置有将半导体器件的另一个侧面与电路基板的接地布线连接的连接部件，并且由导电材料制成。

公开(公告)号：US20070069272A1

公开(公告)日：2007-03-29

申请号：US11524481

申请日：2006-09-20

申请人： Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L29/94 ,  H01L23/52 ,  H01L27/108 ,  H01L23/48 ,  H01L29/76 ,  H01L29/40 ,  H01L31/119

CPC分类号： H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/00

摘要： A semiconductor device includes a first semiconductor construct provided on a base plate and having a semiconductor substrate and external connection electrodes. An insulating layer is provided on the base plate around the first semiconductor construct. An upper layer insulating film is provided on the first semiconductor construct and insulating layer. Upper layer wiring lines are provided on the upper layer insulating film so that the upper layer wiring line is electrically connected to the external connection electrode. A second semiconductor construct is joined to and installed on connection pad portions. All jointing portions of the second semiconductor construct for the connection pad portions of the upper layer wiring lines are disposed in a region corresponding to the first semiconductor construct.

摘要翻译： 半导体器件包括设置在基板上并具有半导体衬底和外部连接电极的第一半导体结构。 绝缘层设置在第一半导体结构周围的基板上。 在第一半导体结构和绝缘层上设置上层绝缘膜。 上层布线设置在上层绝缘膜上，使得上层布线与外部连接电极电连接。 第二半导体结构连接到并安装在连接焊盘部分上。 用于上层布线的连接焊盘部分的第二半导体结构的所有连接部分设置在与第一半导体结构对应的区域中。

公开(公告)号：US20060186542A1

公开(公告)日：2006-08-24

申请号：US11349779

申请日：2006-02-08

申请人： Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L23/48

CPC分类号： H01L23/3114 ,  H01L21/561 ,  H01L24/11 ,  H01L24/12 ,  H01L24/94 ,  H01L24/96 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor device includes a semiconductor substrate which has an integrated circuit formed on a front surface thereof, and a rough surface with a height difference of 1 to 5 μm on a rear surface thereof. A protective film is provided on the rear surface of the semiconductor substrate.

摘要翻译： 半导体器件包括在其前表面上形成有集成电路的半导体衬底和在其后表面上具有1至5微米的高差的粗糙表面。 在半导体基板的背面设有保护膜。

公开(公告)号：US20060060984A1

公开(公告)日：2006-03-23

申请号：US11226769

申请日：2005-09-14

申请人： Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L23/48

CPC分类号： H01L21/6835 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/3135 ,  H01L24/10 ,  H01L24/13 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68331 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05569 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor device includes a semiconductor substrate having an integrated circuit and at least one connection pad, and at least one external connection electrode electrically connected with the connection pad. A first sealing material is provided on the semiconductor substrate around the external connection electrode, each impurity concentration of an Na ion, a K ion, a Ca ion and Cl ion contained in the first sealing material being not greater than 10 ppm. A second sealing material is provided on at least one of a lower surface and a peripheral side surface of the semiconductor substrate, a total impurity concentration of an Na ion, a K ion, a Ca ion and a Cl ion contained in the second sealing material being not smaller than 100 ppm.

摘要翻译： 半导体器件包括具有集成电路和至少一个连接焊盘的半导体衬底以及与连接焊盘电连接的至少一个外部连接电极。 第一密封材料设置在半导体衬底周围的外部连接电极上，所述第一密封材料中包含的Na离子，K离子，Ca离子和Cl离子的杂质浓度不大于10ppm。 第二密封材料设置在半导体衬底的下表面和周边表面中的至少一个上，包含在第二密封材料中的Na离子，K离子，Ca离子和Cl离子的总杂质浓度 不小于100ppm。

公开(公告)号：US06545354B1

公开(公告)日：2003-04-08

申请号：US09499599

申请日：2000-02-07

申请人： Yutaki Aoki ,  Ichiro Mihara ,  Takeshi Wakabayashi ,  Katsumi Watanabe

发明人： Yutaki Aoki ,  Ichiro Mihara ,  Takeshi Wakabayashi ,  Katsumi Watanabe

IPC分类号： H01L2940

CPC分类号： H01L23/3114 ,  H01L23/5223 ,  H01L23/5225 ,  H01L23/5227 ,  H01L23/5228 ,  H01L23/525 ,  H01L2924/0002 ,  H01L2924/1423 ,  H01L2924/19041 ,  H01L2924/00

摘要： In a semiconductor device such as a CSP, re-wiring is provided on a circuit element formation region of a semiconductor substrate and a columnar electrode for connection with a circuit board is provided on the re-wiring. A first insulating film is provided over the semiconductor substrate excluding a connection pad, and a ground potential layer connected to a ground potential is provided on an upper surface of the first insulating film on the circuit element formation region. A re-wiring is provided over the ground potential layer with a second insulating film interposed. Since the ground potential layer serves as a barrier layer for preventing crosstalk between the re-wiring and circuit element formation region, it is possible to eliminate crosstalk between the re-wiring and a circuit within the circuit element formation region and to freely position the re-wiring without restrictions.

摘要翻译： 在诸如CSP的半导体器件中，在半导体衬底的电路元件形成区域上设置再布线，并且在重新布线上设置用于与电路板连接的柱状电极。 在除了连接焊盘之外的半导体衬底上设置第一绝缘膜，并且在电路元件形成区域上的第一绝缘膜的上表面上设置连接到接地电位的接地电位层。 在地电位层上提供再布线，其中插入有第二绝缘膜。 由于接地电位层用作防止再布线和电路元件形成区域之间的串扰的阻挡层，因此可以消除电路元件形成区域内的再布线与电路之间的串扰，并且可以自由地定位re 接线无限制

公开(公告)号：US06501169B1

公开(公告)日：2002-12-31

申请号：US09708379

申请日：2000-11-08

申请人： Yutaka Aoki ,  Hiroshi Takenaka ,  Ichiro Mihara

发明人： Yutaka Aoki ,  Hiroshi Takenaka ,  Ichiro Mihara

IPC分类号： H01L2312

CPC分类号： H01L21/76885 ,  H01L23/5225 ,  H01L23/552 ,  H01L23/585 ,  H01L23/66 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05569 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/19015 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19104 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2924/013

摘要： A semiconductor device of a CSP structure is obtained by forming projection electrodes on a plurality of circuit element forming areas of a semiconductor wafer substrate, and then dividing the wafer into chips. Wiring patterns connected to connection pads for signal transmission are provided on the upper surface of an insulating film formed on the circuit element forming areas, and a conductive layer connected to a connection pad connected to a ground potential is provided on the resultant structure except for on the wiring patterns and on areas near the wiring patterns. Further, a thin film circuit element may be provided at the same layer as the conductive layer or below the conductive layer.

摘要翻译： 通过在半导体晶片基板的多个电路元件形成区域上形成投影电极，然后将晶片分割成芯片来获得CSP结构的半导体器件。 在形成在电路元件形成区域上的绝缘膜的上表面上设置有连接到信号传输用连接焊盘的布线图案，并且，在除了在 布线图案和布线图案附近的区域。 此外，薄膜电路元件可以设置在与导电层相同的层或者在导电层的下方。

公开(公告)号：US08749065B2

公开(公告)日：2014-06-10

申请号：US12009719

申请日：2008-01-22

申请人： Ichiro Kouno ,  Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Ichiro Kouno ,  Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L23/48

CPC分类号： H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L24/12 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05083 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/1148 ,  H01L2224/13006 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2224/13099 ,  H01L2224/29099 ,  H01L2924/00014

摘要： A semiconductor device includes a semiconductor substrate, a plurality of wiring lines which are provided on one side of the semiconductor substrate and which have connection pad portions, and a plurality of columnar electrodes respectively provided on the connection pad portions of the wiring lines, each of the columnar electrodes including an outer peripheral surface and a top surface. An electromigration prevention film is provided on at least the surfaces of the wiring lines. A sealing film is provided around the outer periphery surfaces of the columnar electrodes.

摘要翻译： 半导体器件包括半导体衬底，设置在半导体衬底的一侧上并具有连接焊盘部分的多个布线，以及分别设置在布线的连接焊盘部分上的多个柱状电极， 柱状电极包括外周面和顶面。 至少在布线的表面上设置有电迁移膜。 在柱状电极的外周面上设置密封膜。

公开(公告)号：US08293574B2

公开(公告)日：2012-10-23

申请号：US12719411

申请日：2010-03-08

申请人： Ichiro Mihara

发明人： Ichiro Mihara

IPC分类号： H01L21/00

CPC分类号： H01L23/5389 ,  H01L23/3114 ,  H01L24/24 ,  H01L24/82 ,  H01L24/94 ,  H01L24/97 ,  H01L2224/12105 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06568 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2224/83

摘要： A semiconductor device includes a plurality of semiconductor constructs, each of the semiconductor constructs including a semiconductor substrate and external connection electrodes provided on an upper surface of the semiconductor substrate. The semiconductor substrates of the semiconductor constructs are different in a planar-size. The plurality of semiconductor constructs are stacked from bottom to top in descending order of planar-sizes of the semiconductor substrates included in the plurality of semiconductor constructs. An insulating film at least is provided around one semiconductor construct disposed on the top of the plurality of semiconductor constructs and on another semiconductor construct disposed under the one semiconductor construct. Each of the upper surfaces of the plurality of external connection electrodes is exposed from the one semiconductor construct and from the insulating film.

摘要翻译： 半导体器件包括多个半导体构造，每个半导体构造包括半导体衬底和设置在半导体衬底的上表面上的外部连接电极。 半导体结构的半导体衬底在平面尺寸上是不同的。 多个半导体构造以从多个半导体构造体中包含的半导体衬底的平面尺寸的降序的顺序从底部到顶部堆叠。 绝缘膜至少设置在设置在多个半导体结构的顶部上的一个半导体构造周围，以及设置在一个半导体构造下的另一个半导体构造。 多个外部连接电极的每个上表面都从一个半导体结构和绝缘膜露出。

公开(公告)号：US20090079072A1

公开(公告)日：2009-03-26

申请号：US12001878

申请日：2007-12-13

申请人： Aiko Mizusawa ,  Osamu Okada ,  Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Aiko Mizusawa ,  Osamu Okada ,  Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L23/488 ,  H01L21/58

CPC分类号： H01L24/12 ,  H01L23/3114 ,  H01L23/525 ,  H01L24/11 ,  H01L24/94 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05569 ,  H01L2224/1147 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/274 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2224/13099 ,  H01L2924/00014

摘要： A semiconductor device includes a semiconductor substrate having an integrated circuit. A low dielectric film wiring line laminated structure portion is provided on the semiconductor substrate except a peripheral portion thereof, and is constituted by low dielectric films and wiring lines. The low dielectric film has a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the laminated structure portion. A connection pad portion is arranged on the insulating film and connected to a connection pad portion of an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film is provided on the insulating film which surrounds the pump electrode and on the peripheral portion of the semiconductor substrate. The side surfaces of the laminated structure portion are covered with the insulating film or the sealing film.

摘要翻译： 半导体器件包括具有集成电路的半导体衬底。 低电介质膜布线层叠结构部分设置在半导体衬底的周边部分以外，由低电介质膜和布线构成。 低电介质膜的相对介电常数为3.0以下，玻璃化转变温度为400℃以上。 绝缘膜形成在层叠结构部分上。 连接焊盘部分布置在绝缘膜上并且连接到层压结构部分的最上面布线的连接焊盘部分。 凸起电极设置在连接焊盘部分上。 在绝缘膜上设置密封膜，该绝缘膜围绕泵电极和半导体衬底的周边部分。 层叠结构部分的侧表面被绝缘膜或密封膜覆盖。