公开(公告)号：US5194629A

公开(公告)日：1993-03-16

申请号：US812582

申请日：1991-12-20

Applicant: Eberhard Kuehn ,  Juergen Beck ,  Hellmut Ahne ,  Siegfried Birkle ,  Rainer Leuschner ,  Michael Sebald ,  Recai Sezi ,  Hans-Juergen Bestmann

Inventor： Eberhard Kuehn ,  Juergen Beck ,  Hellmut Ahne ,  Siegfried Birkle ,  Rainer Leuschner ,  Michael Sebald ,  Recai Sezi ,  Hans-Juergen Bestmann

IPC: C07D207/452 ,  C07D207/44 ,  C07D207/444

CPC classification number: C07D207/452

Abstract: To produce N-tertiary butoxycarbonyl-maleinimide, maleinimide is reacted in the presence of a heterocyclic nitrogen compound having at least one tertiary nitrogen atom (as a base) with a more or less equimolar quantity of di-tertiary butyl-dicarbonate in a suitable solvent at temperatures of up to about 80.degree. C.

Abstract translation: 为了制备N-叔丁氧基羰基 - 马来酰亚胺，将马来酰亚胺在具有至少一个叔氮原子（作为碱）的杂环氮化合物的存在下与等摩尔量的二碳酸二叔丁酯在合适的溶剂中反应 在高达约80℃的温度下

公开(公告)号：US08309454B2

公开(公告)日：2012-11-13

申请号：US11746936

申请日：2007-05-10

Applicant: Markus Brunnbauer ,  Thorsten Meyer ,  Stephan Bradl ,  Ralf Plieninger ,  Jens Pohl ,  Klaus Pressel ,  Recai Sezi

Inventor： Markus Brunnbauer ,  Thorsten Meyer ,  Stephan Bradl ,  Ralf Plieninger ,  Jens Pohl ,  Klaus Pressel ,  Recai Sezi

IPC: H01L21/4763

CPC classification number: H01L25/50 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/48 ,  H01L23/5389 ,  H01L23/552 ,  H01L23/60 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1617 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2224/82 ,  H01L2924/00

Abstract: A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also comprises an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer.

Abstract translation: 工件具有至少两个半导体芯片，每个半导体芯片具有至少部分暴露的第一主表面和第二主表面。 所述工件还包括布置在所述至少两个半导体芯片上的导电层，所述导电层至少布置在所述第二主表面的区域上，所述模制化合物布置在所述导电层上。

公开(公告)号：US08076784B2

公开(公告)日：2011-12-13

申请号：US12904561

申请日：2010-10-14

Applicant: Markus Brunnbauer ,  Recai Sezi ,  Thorsten Meyer ,  Gottfried Beer

Inventor： Markus Brunnbauer ,  Recai Sezi ,  Thorsten Meyer ,  Gottfried Beer

IPC: H01L23/48

CPC classification number: H01L24/96 ,  H01L21/568 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/16145 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06582 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2224/81

Abstract: Stacked semiconductor chips are disclosed. One embodiment provides a method including a first substrate having a first surface and an opposing second surface. The first substrate includes an array of first connection elements on the first surface of the first substrate. A second substrate has a first surface and an opposing second surface. The second substrate includes an array of second connection elements on the first surface of the second substrate. The first connection elements is attached to the second connection elements; and is thinning at least one of the first substrate and the second substrate after the attachment of the first connection elements to the second connection elements.

Abstract translation: 公开了堆叠的半导体芯片。 一个实施例提供了包括具有第一表面和相对的第二表面的第一基底的方法。 第一衬底包括在第一衬底的第一表面上的第一连接元件的阵列。 第二基板具有第一表面和相对的第二表面。 第二衬底包括在第二衬底的第一表面上的第二连接元件的阵列。 第一连接元件附接到第二连接元件; 并且在将第一连接元件附接到第二连接元件之后使第一基板和第二基板中的至少一个变薄。

公开(公告)号：US07687895B2

公开(公告)日：2010-03-30

申请号：US11939938

申请日：2007-11-14

Applicant: Markus Brunnbauer ,  Jens Pohl ,  Klaus Pressel ,  Thorsten Meyer ,  Recai Sezi ,  Stephan Bradl ,  Ralf Plieninger

Inventor： Markus Brunnbauer ,  Jens Pohl ,  Klaus Pressel ,  Thorsten Meyer ,  Recai Sezi ,  Stephan Bradl ,  Ralf Plieninger

IPC: H01L23/02 ,  H01L23/043 ,  H01L23/10 ,  H01L23/34 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/28

CPC classification number: H01L23/552 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5389 ,  H01L23/60 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/056 ,  H01L2224/12105 ,  H01L2224/82039 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05099

Abstract: A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also includes an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer. In the molding compound a contact via is arranged.

Abstract translation: 工件具有至少两个半导体芯片，每个半导体芯片具有至少部分暴露的第一主表面和第二主表面。 工件还包括布置在至少两个半导体芯片上的导电层，导电层至少布置在第二主表面的区域上，以及配置在导电层上的模塑料。 在模塑料中配置有接触孔。

公开(公告)号：US20090294961A1

公开(公告)日：2009-12-03

申请号：US12131541

申请日：2008-06-02

Applicant: Thorsten Meyer ,  Recai Sezi ,  Markus Brunnbauer

Inventor： Thorsten Meyer ,  Recai Sezi ,  Markus Brunnbauer

IPC: H01L23/488 ,  H01L21/44

CPC classification number: H01L24/11 ,  H01L24/27 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05124 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/116 ,  H01L2224/1183 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/27462 ,  H01L2224/73104 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014

Abstract: A semiconductor device includes a semiconductor chip and a metal layer electrically coupled to the semiconductor chip. The semiconductor device includes an array of solder balls coupled to the metal layer and a front side protect material directly contacting the metal layer and laterally surrounding a portion of at least a plurality of solder balls. The front side protect material is configured to become fluid during solder reflow.

Abstract translation: 半导体器件包括电连接到半导体芯片的半导体芯片和金属层。 半导体器件包括耦合到金属层的焊料球阵列和直接接触金属层并横向围绕至少多个焊球的一部分的前侧保护材料。 正面保护材料配置成在回流焊时成为流体。

公开(公告)号：US20090079089A1

公开(公告)日：2009-03-26

申请号：US11859329

申请日：2007-09-21

Applicant: Markus Brunnbauer ,  Recai Sezi ,  Thorsten Meyer ,  Gottfried Beer

Inventor： Markus Brunnbauer ,  Recai Sezi ,  Thorsten Meyer ,  Gottfried Beer

IPC: H01L23/48 ,  H01L21/60

CPC classification number: H01L24/96 ,  H01L21/568 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/16145 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06582 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2224/81

Abstract: Stacked semiconductor chips are disclosed. One embodiment provides a method including a first substrate having a first surface and an opposing second surface. The first substrate includes an array of first connection elements on the first surface of the first substrate. A second substrate has a first surface and an opposing second surface. The second substrate includes an array of second connection elements on the first surface of the second substrate. The first connection elements is attached to the second connection elements; and is thinning at least one of the first substrate and the second substrate after the attachment of the first connection elements to the second connection elements.

Abstract translation: 公开了堆叠的半导体芯片。 一个实施例提供了包括具有第一表面和相对的第二表面的第一基底的方法。 第一衬底包括在第一衬底的第一表面上的第一连接元件的阵列。 第二基板具有第一表面和相对的第二表面。 第二衬底包括在第二衬底的第一表面上的第二连接元件的阵列。 第一连接元件附接到第二连接元件; 并且在将第一连接元件附接到第二连接元件之后使第一基板和第二基板中的至少一个变薄。

公开(公告)号：US20070194301A1

公开(公告)日：2007-08-23

申请号：US10580881

申请日：2004-11-24

Applicant: Recai Sezi ,  Andreas Walter ,  Reimund Engl ,  Anna Maltenberger ,  Christine Dehm ,  Sitaram Arkalgud ,  Igor Kasko ,  Joachim Nuetzel ,  Jakob Kriz ,  Thomas Mikolajick ,  Cay-Uwe Pinnow

Inventor： Recai Sezi ,  Andreas Walter ,  Reimund Engl ,  Anna Maltenberger ,  Christine Dehm ,  Sitaram Arkalgud ,  Igor Kasko ,  Joachim Nuetzel ,  Jakob Kriz ,  Thomas Mikolajick ,  Cay-Uwe Pinnow

IPC: H01L51/00 ,  H01L21/8232

CPC classification number: H01L51/0036 ,  B82Y10/00 ,  G11C13/0014 ,  G11C13/0016 ,  H01L27/28 ,  H01L51/0051 ,  H01L51/0062 ,  H01L51/0595

Abstract: One aspect of the invention relates to a semiconductor arrangement having at least one nonvolatile memory cell which has a first electrode comprising at least two layers; and having an organic material, the organic material forming a compound with that layer of the first electrode which is in direct contact. One aspect of the invention furthermore relates to a method for producing the nonvolatile memory cell, a semiconductor arrangement having a plurality of memory cells according to the invention, and a method for producing the same.

Abstract translation: 本发明的一个方面涉及具有至少一个非易失性存储单元的半导体装置，其具有包括至少两层的第一电极; 并且具有有机材料，所述有机材料与所述第一电极的所述层直接接触形成化合物。 本发明的一个方面还涉及一种用于制造非易失性存储单元的方法，具有根据本发明的多个存储单元的半导体装置及其制造方法。

公开(公告)号：US20070164276A1

公开(公告)日：2007-07-19

申请号：US11621756

申请日：2007-01-10

Applicant: Reimund Engl ,  Jorg Schumann ,  Andreas Walter ,  Recai Sezi ,  Anna Maltenberger

Inventor： Reimund Engl ,  Jorg Schumann ,  Andreas Walter ,  Recai Sezi ,  Anna Maltenberger

IPC: H01L51/00 ,  H01L51/40

CPC classification number: G11C13/0014 ,  B82Y10/00 ,  G11C2213/11 ,  H01L51/0003 ,  H01L51/0036 ,  H01L51/0051 ,  H01L51/0062

Abstract: Layers are produced, where the layers include a first layer formed of a metal and a second layer formed of an organic compound, the metal and the organic compound entering into an interaction, so that the layer serves as an electroactive layer for nonvolatile memories, the metal layer being deposited onto a substrate and, if appropriate, patterned, then being coated with an organic compound and being treated with a second organic compound.

Abstract translation: 产生层，其中层包括由金属形成的第一层和由有机化合物形成的第二层，金属和有机化合物进入相互作用，使得该层用作用于非易失性存储器的电活性层， 金属层沉积到基底上，并且如果合适，被图案化，然后用有机化合物涂覆并用第二有机化合物处理。

公开(公告)号：US20060237716A1

公开(公告)日：2006-10-26

申请号：US11392238

申请日：2006-03-29

Applicant: Recai Sezi ,  Andreas Walter ,  Reimund Engl ,  Anna Maltenberger ,  Joerg Schumann

Inventor： Recai Sezi ,  Andreas Walter ,  Reimund Engl ,  Anna Maltenberger ,  Joerg Schumann

IPC: H01L29/08 ,  H01L51/00 ,  C07D409/04 ,  H01L21/20

CPC classification number: H01L51/0595 ,  B82Y10/00 ,  H01L51/0051

Abstract: The present invention relates to compositions for storage applications, relates to a memory cell which comprises the abovementioned composition and two electrodes and furthermore relates to a process for the production of microelectronic components and the use of the composition according to the invention in the production of these microelectronic components.

Abstract translation: 本发明涉及用于存储应用的组合物，涉及一种包含上述组合物和两个电极的存储单元，此外还涉及一种用于生产微电子组件的方法以及根据本发明的组合物在制备这些组合物中的用途 微电子元件。

公开(公告)号：US20060214139A1

公开(公告)日：2006-09-28

申请号：US11439455

申请日：2006-05-23

Applicant: Recai Sezi ,  Andreas Walter ,  Klaus Lowack ,  Anna Maltenberger ,  Robert Banfic

Inventor： Recai Sezi ,  Andreas Walter ,  Klaus Lowack ,  Anna Maltenberger ,  Robert Banfic

IPC: H01B3/20 ,  C08G69/26 ,  B32B27/00

CPC classification number: H01L21/02118 ,  C08G69/26 ,  C08G69/44 ,  C08G73/22 ,  H01L21/02203 ,  H01L21/02205 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/312 ,  H01L21/31695 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0346 ,  H01L2924/00

Abstract: Poly-o-hydroxyamides include binaphthyl substituents as repeating units. The poly-o-hydroxyamides can be cyclized to give the polybenzoxazole by heating. Pore formation occurs, so that a dielectric having a very low dielectric constant k of less than 2.5 is obtained.

Abstract translation: 聚邻羟基酰胺包括作为重复单元的联萘基取代基。 可以将聚邻羟基酰胺环化，通过加热得到聚苯并恶唑。 发生孔形成，从而获得具有小于2.5的非常低的介电常数k的电介质。