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    Carrier for a module integrated circuit handler
    61.
    发明授权
    Carrier for a module integrated circuit handler 失效
    用于模块集成电路处理器的载体

    公开(公告)号：US06425178B1

    公开(公告)日：2002-07-30

    申请号：US09428477

    申请日：1999-10-28

    Applicant: Sang Soo Lee ,  Wan Gu Lee ,  Jong Won Kim ,  Hee Soo Kim ,  Young Hak Oh ,  Dong Chun Lee

    Inventor： Sang Soo Lee ,  Wan Gu Lee ,  Jong Won Kim ,  Hee Soo Kim ,  Young Hak Oh ,  Dong Chun Lee

    IPC: B23P1900

    CPC classification number: G01R31/2867 ,  G01R1/04 ,  G01R31/2851 ,  G01R31/2893 ,  Y10T29/5313 ,  Y10T29/53174 ,  Y10T29/53178 ,  Y10T29/53261 ,  Y10T29/53265

    Abstract: A module integrated circuit (IC) carrier is used to move module ICs through a testing machine. The module IC carrier has a housing with a pair of installation elements installed parallel to one another in a receiving space of the housing. A plurality of holding members are installed on each of the installation elements. Each holding member on one of the installation elements faces a corresponding holding member on the other of the installation elements. Module ICs are held between corresponding pairs of the holding members. The holding elements can be biased towards each other to help hold the module ICs. Each holding element may include a rotator with a grooved edge which helps to hold a module IC, and which allows the module ICs to be easily inserted into and removed from the carrier.

    Abstract translation: 模块集成电路（IC）载体用于通过测试机器移动模块IC。 模块IC载体具有在壳体的容纳空间中彼此平行安装的一对安装元件的壳体。 多个保持构件安装在每个安装元件上。 其中一个安装元件上的每个保持构件面对另一个安装元件上的对应的保持构件。 模块IC保持在相应的保持构件对之间。 保持元件可以彼此偏置以帮助固定模块IC。 每个保持元件可以包括具有带槽边缘的旋转器，其有助于保持模块IC，并且其允许模块IC容易地插入载体和从载体移除。

    Apparatus and method for collecting game data
    62.
    发明授权
    Apparatus and method for collecting game data 有权
    用于收集游戏数据的装置和方法

    公开(公告)号：US08827817B2

    公开(公告)日：2014-09-09

    申请号：US13333340

    申请日：2011-12-21

    Applicant: Ju-Young Kim ,  Dong-Chun Lee ,  Hang-Kee Kim ,  Kang-Min Sohn ,  Chang Joon Park

    Inventor： Ju-Young Kim ,  Dong-Chun Lee ,  Hang-Kee Kim ,  Kang-Min Sohn ,  Chang Joon Park

    IPC: A63F13/00 ,  A63F13/12

    CPC classification number: A63F13/70 ,  A63F13/12 ,  A63F13/335 ,  A63F13/56 ,  A63F2300/407 ,  A63F2300/534 ,  A63F2300/535 ,  A63F2300/6045 ,  A63F2300/646

    Abstract: Disclosed herein is an apparatus for collecting game data in order to test performance of a game server. The apparatus includes a capture and filtering module, a control module, and a data management module. The capture and filtering module captures packets, transmitted and received between the game server and each of a plurality of game clients, using the plurality of game clients, and extracts a plurality of necessary data by performing filtering on the results of the capturing. The control module determines the movement route of a game character in such a way as to correspond to the plurality of necessary data, and controls the plurality of game clients based on the movement route. The data management module stores and manages the plurality of necessary data.

    Abstract translation: 这里公开了一种用于收集游戏数据以便测试游戏服务器的性能的装置。 该装置包括捕获和过滤模块，控制模块和数据管理模块。 捕获和过滤模块使用多个游戏客户端捕获在游戏服务器和多个游戏客户端中的每一个之间发送和接收的分组，并且通过对捕获结果进行滤波来提取多个必需的数据。 控制模块以与多个所需数据相对应的方式确定游戏角色的移动路线，并且基于移动路线来控制多个游戏客户端。 数据管理模块存储和管理多个必要的数据。

    PRINTED CIRCUIT BOARD CAPABLE OF VOID CONTROL DURING SURFACE MOUNTING PROCESS
    64.
    发明申请
    PRINTED CIRCUIT BOARD CAPABLE OF VOID CONTROL DURING SURFACE MOUNTING PROCESS 审中-公开
    印刷电路板在表面安装过程中能够进行无声控制

    公开(公告)号：US20080164054A1

    公开(公告)日：2008-07-10

    申请号：US11971854

    申请日：2008-01-09

    Applicant: Dong-Woo SHIN ,  Dong-Chun LEE ,  Seong-Chan HAN ,  Hyo-Jae BANG ,  Si-Suk KIM ,  Su-Jin JUNG

    Inventor： Dong-Woo SHIN ,  Dong-Chun LEE ,  Seong-Chan HAN ,  Hyo-Jae BANG ,  Si-Suk KIM ,  Su-Jin JUNG

    IPC: H05K1/00 ,  B23K31/00

    CPC classification number: B23K1/0016 ,  B23K1/20 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/099 ,  H05K2201/2081 ,  Y02P70/613

    Abstract: Example embodiments of the present invention include a printed circuit board (PCB) capable of controlling the size and position of voids during a surface mounting process. To this end, the PCB includes: an insulating plate made of an insulating material; printed circuit patterns formed on the insulating plate; a plurality of lands to support a plurality of solder joints, each land coupled to one end of each of the printed circuit patterns; and anti-wetting layers mounted on a surface of each of the lands for solder joint therein. The anti-wetting layers allow a void produced during a surface mounting process to move to a central surface on a pad, so that the solder joint reliability between the solder ball and the land is increased. As a result, the reliability of a semiconductor device is enhanced.

    Abstract translation: 本发明的示例性实施例包括能够在表面安装处理期间控制空隙的尺寸和位置的印刷电路板（PCB）。 为此，PCB包括：由绝缘材料制成的绝缘板; 形成在绝缘板上的印刷电路图案; 多个焊盘以支撑多个焊点，每个焊盘连接到每个印刷电路图案的一端; 以及安装在每个焊盘的表面上的防润湿层，用于焊接接头。 抗潮湿层允许在表面安装过程期间产生的空隙移动到焊盘上的中心表面，使得焊球和焊盘之间的焊点可靠性增加。 结果，提高了半导体器件的可靠性。

    Semiconductor device and method of manufacturing the same
    65.
    发明申请
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US20080111235A1

    公开(公告)日：2008-05-15

    申请号：US11978370

    申请日：2007-10-29

    Applicant: Hyo-Jae Bang ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Seong-Chan Han ,  Jung-Hyeon Kim

    Inventor： Hyo-Jae Bang ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Seong-Chan Han ,  Jung-Hyeon Kim

    IPC: H01L23/488 ,  H01L21/60

    CPC classification number: H05K3/303 ,  H05K2201/0305 ,  H05K2201/09781 ,  H05K2201/10689 ,  H05K2201/2036 ,  Y02P70/613

    Abstract: A semiconductor device includes a semiconductor package, a circuit board and an interval maintaining member. The semiconductor package has a body and a lead protruded from the body. The circuit board has a first land electrically connected to the lead. The interval maintaining member is interposed between the circuit board and the body. The interval maintaining member maintains an interval between the lead and the first land. Thus, an interval between the lead and the land is uniformly maintained, so that a thermal and/or mechanical reliability of the semiconductor device is improved.

    Abstract translation: 半导体器件包括半导体封装，电路板和间隔保持元件。 半导体封装具有从主体突出的主体和引线。 电路板具有与引线电连接的第一焊盘。 间隔保持构件插入在电路板和主体之间。 间隔保持构件保持引线与第一焊盘之间的间隔。 因此，均匀地保持引线和焊盘之间的间隔，从而提高了半导体器件的热和/或机械可靠性。

    Methods of compensating for an alignment error during fabrication of structures on semiconductor substrates
    66.
    发明申请
    Methods of compensating for an alignment error during fabrication of structures on semiconductor substrates 有权
    在半导体衬底上的结构制造期间补偿对准误差的方法

    公开(公告)号：US20070120220A1

    公开(公告)日：2007-05-31

    申请号：US11590072

    申请日：2006-10-31

    Applicant: Jung-Taek Lim ,  Dong-Chun Lee ,  Young-Jee Yoon ,  Sung-Hong Park

    Inventor： Jung-Taek Lim ,  Dong-Chun Lee ,  Young-Jee Yoon ,  Sung-Hong Park

    IPC: H01L29/00

    CPC classification number: G03F7/70633

    Abstract: In the methods of compensating for an alignment error during fabrication of structures on semiconductor substrates, a conductive pattern structure is formed at a first position on a first semiconductor substrate. The conductive pattern structure includes a grid of first and second conductive patterns arranged as columns and intersecting rows with openings bounded therebetween. A first conductive contact structure overlaps the conductive pattern structure, and includes a plurality of spaced apart conductive contacts arranged as a grid of rows and columns that can be tilted at a non-zero angle relative to the grid of the conductive pattern structure. A determination is made as to whether the first conductive contact structure is electrically connected to the conductive pattern structure. A second conductive contact structure is formed at a position on a second semiconductor substrate that is determined in response to the determination of whether the first conductive contact structure is electrically connected to the conductive pattern structure.

    Abstract translation: 在半导体衬底上的结构制造期间补偿对准误差的方法中，在第一半导体衬底上的第一位置处形成导电图案结构。 导电图案结构包括布置成列和相交行的第一和第二导电图案的格栅，其间具有开口。 第一导电接触结构与导电图案结构重叠，并且包括布置成可以相对于导电图案结构的格栅非零角度倾斜的行和列格栅的多个间隔开的导电接点。 确定第一导电接触结构是否电连接到导电图案结构。 第二导电接触结构形成在第二半导体衬底上的响应于第一导电接触结构是否电连接到导电图案结构的确定而确定的位置。

    Open socket
    69.
    发明申请
    Open socket 失效
    打开插座

    公开(公告)号：US20050118878A1

    公开(公告)日：2005-06-02

    申请号：US10868976

    申请日：2004-06-17

    Applicant: Dong-Chun Lee ,  Byung-Man Kim ,  Kwang-Su Yu ,  Dong-Woo Shin ,  Young-Soo Lee

    Inventor： Dong-Chun Lee ,  Byung-Man Kim ,  Kwang-Su Yu ,  Dong-Woo Shin ,  Young-Soo Lee

    IPC: H01R33/76 ,  H01R13/24 ,  H01R24/00

    CPC classification number: H01R13/2471 ,  H01R13/111

    Abstract: An open socket, into which a module can be inserted, may include: a body into which the module is insertable; a pin to contact an electrical connection member of the inserted module, the pin serving as at least a part of an electrical signal path to/from the module upon insertion thereof; an elastic biasing member to exert an elastic biasing force to cause the pin to contact the module; and at least one lower support to limit insertion depth as being a depth at which a lower portion of the inserted module comes to rest upon the at least one lower support; the body and the at least one lower support being constructed and arranged to provide a gap adjacent the at least one support, which leaves an area of the socket underlying the lower portion of the inserted module open to the outside.

    Abstract translation: 可以插入模块的开放式插座可以包括：可插入模块的主体; 一个与所插入的模块的电连接构件接触的销，所述销用作在插入模块时与模块电信号路径的至少一部分的一部分; 弹性偏置构件，以施加弹性偏压力以使销与模块接触; 以及至少一个下部支撑件，以将插入深度限制为所述插入模块的下部部分停靠在所述至少一个下部支撑件上的深度; 所述主体和所述至少一个下支撑件被构造和布置成提供邻近所述至少一个支撑件的间隙，所述间隙将所述插入模块的下部的下方的所述插座的区域留在外部。

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