公开(公告)号：US20150171323A1

公开(公告)日：2015-06-18

申请号：US14636421

申请日：2015-03-03

Applicant: Intermolecular Inc. ,  KABUSHIKI KAISHA TOSHIBA ,  SanDisk 3D LLC

Inventor： Imran Hashim ,  Ryan C. Clarke ,  Nan Lu ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC: H01L45/00

CPC classification number: H01L45/146 ,  G11C11/56 ,  G11C11/5685 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0064 ,  G11C13/0069 ,  G11C13/0097 ,  G11C2213/32 ,  G11C2213/71 ,  G11C2213/77 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253

Abstract: Provided are resistive random access memory (ReRAM) cells, each having three or more resistive states and being capable of storing multiple bits of data, as well as methods of fabricating and operating such ReRAM cells. Such ReRAM cells or, more specifically, their resistive switching layer have wide range of resistive states and are capable of being very conductive (e.g., about 1 kOhm) in one state and very resistive (e.g., about 1 MOhm) in another state. In some embodiments, a resistance ratio between resistive states may be between 10 and 1,000 even up to 10,000. The resistive switching layers also allow establishing stable and distinct intermediate resistive states that may be assigned different data values. These layers may be configured to switching between their resistive states using fewer programming pulses than conventional systems by using specific materials, switching pluses, and resistive state threshold.

Abstract translation: 提供了电阻随机存取存储器（ReRAM）单元，每个单元具有三个或更多个电阻状态，并且能够存储多个数据位，以及制造和操作这样的ReRAM单元的方法。 这样的ReRAM单元或更具体地，它们的电阻式开关层具有宽范围的电阻状态，并且在另一状态下能够在一种状态下非常导电（例如，约1kOhm），并且在另一状态下具有很强的电阻（例如约1MOhm）。 在一些实施例中，电阻状态之间的电阻比可以在10和1,000之间甚至高达10,000。 电阻式开关层还允许建立可分配不同数据值的稳定和不同的中间电阻状态。 这些层可以被配置为使用比常规系统更少的编程脉冲在其电阻状态之间切换，通过使用特定的材料，开关和电阻状态阈值。

公开(公告)号：US20150170908A1

公开(公告)日：2015-06-18

申请号：US14109622

申请日：2013-12-17

Applicant: Intermolecular Inc.

Inventor： Chien-Lan Hsueh ,  Chen-An Chen ,  Tony P. Chiang ,  Martin Romero ,  James Tsung

IPC: H01L21/02 ,  H01L21/67

CPC classification number: H01L21/02271 ,  C23C16/45548 ,  C23C16/45561 ,  C23C16/45565 ,  C23C16/45574

Abstract: Provided are apparatus for high productivity combinatorial (HPC) processing of semiconductor substrates and HPC methods. An apparatus includes a showerhead and two or more self-controlled one-way valves connected to the showerhead and used for controlling flow of different processing gases into the showerhead. The self-controlled one-way valves are not externally controlled by any control systems. Instead, these valves open and close in response to preset conditions, such as pressure differentials and/or flow differentials. One example of such self-controlled one-way valves is a check valve. These valves generally allow the flow only in one direction, i.e., into the showerhead. Furthermore, lack of external controls and specific mechanical designs allow positioning these self-controlled one-way valves in close proximity to the showerhead thereby reducing the dead volume between the valves and the showerhead and also operating these valves at high temperatures.

Abstract translation: 提供了用于半导体衬底和HPC方法的高生产率组合（HPC）处理的装置。 一种装置包括一个淋浴喷头和两个或多个连接到喷头的自控单向阀，用于控制不同处理气体进入喷头的流量。 自控单向阀不受任何控制系统的外部控制。 相反，这些阀响应预设条件（例如压力差和/或流量差）打开和关闭。 这种自控单向阀的一个例子是止回阀。 这些阀通常仅在一个方向上流动，即进入喷头。 此外，缺乏外部控制和特定的机械设计允许将这些自我控制的单向阀定位在靠近喷淋头的位置，从而减小了阀和喷头之间的死体积并且还在高温下操作这些阀。

公开(公告)号：US20150170760A1

公开(公告)日：2015-06-18

申请号：US14108877

申请日：2013-12-17

Applicant: Intermolecular Inc.

Inventor： Federico Nardi ,  Ryan C. Clarke ,  Yun Wang

IPC: G11C27/02

CPC classification number: G11C27/02 ,  G11C13/0002 ,  G11C13/0007

Abstract: A nonvolatile sample and hold circuit can include a resistive switching circuit, a sample circuit, a reset circuit, and a converter circuit. The resistive switching circuit can be operable to accept an input voltage Vg, and provide a resistance response Rrs that corresponds to the input signal Vg. The sampling circuit can be operable to sample an input signal such as an input voltage Vin, to provide a sampled voltage Vg. The reset circuit can be operable to reset the resistive switching circuit to a high resistance state. The converter circuit can be operable to convert the resistive switching circuit to an output voltage. The novel sample and hold circuit can have no issues related to charge injection, no settling time and instantaneous sampling time, together with potentially infinite hold time.

Abstract translation: 非易失性采样和保持电路可以包括电阻开关电路，采样电路，复位电路和转换器电路。 电阻开关电路可操作以接受输入电压Vg，并且提供对应于输入信号Vg的电阻响应Rrs。 采样电路可以用于对诸如输入电压Vin的输入信号进行采样，以提供采样电压Vg。 复位电路可以用于将电阻式开关电路复位到高电阻状态。 转换器电路可操作以将电阻开关电路转换成输出电压。 新颖的采样和保持电路可以没有与电荷注入相关的问题，无需建立时间和瞬间采样时间，以及潜在的无限延时时间。

公开(公告)号：US20150166795A1

公开(公告)日：2015-06-18

申请号：US14108551

申请日：2013-12-17

Applicant: Intermolecular Inc.

Inventor： Nikhil Kalyankar ,  Scott Jewhurst ,  Liang Liang ,  James Mulligan

IPC: C09D5/00

CPC classification number: C09D5/006 ,  C08K9/12 ,  C08K2201/005 ,  C09D7/60 ,  C09D7/70 ,  Y10T428/24372 ,  Y10T428/2438 ,  Y10T428/24413

Abstract: Embodiments provided herein describe optical coatings, panels having optical coatings thereon, and methods for forming optical coatings and panels. A substrate is provided. A coating is formed above the substrate. The coating includes a plurality of micro-particles including a UV-absorbing material and has a surfaces roughness suitable to provide the coating with anti-glare properties.

Abstract translation: 本文提供的实施方案描述了光学涂层，其上具有光学涂层的面板，以及用于形成光学涂层和面板的方法。 提供基板。 在基材上方形成涂层。 该涂层包括多个包含紫外线吸收材料的微粒，并具有适于提供涂层抗眩光性能的表面粗糙度。

公开(公告)号：US20150155368A1

公开(公告)日：2015-06-04

申请号：US14095834

申请日：2013-12-03

Applicant: Intermolecular, Inc.

Inventor： Khaled Ahmed

IPC: H01L29/66

CPC classification number: H01L29/66765 ,  H01L29/458 ,  H01L29/78618 ,  H01L29/78669

Abstract: Embodiments described herein provide amorphous silicon thin-film transistors (a-Si TFTs) and methods for forming a-Si TFTs. A substrate is provided. A gate electrode is formed above the substrate. An a-Si channel layer is formed above the gate electrode. A contact layer is formed above the a-Si channel layer. The contact layer includes titanium, zinc, arsenic, or a combination thereof. A source electrode and a drain electrode are formed above the contact layer.

Abstract translation: 本文描述的实施例提供非晶硅薄膜晶体管（a-Si TFT）以及用于形成a-Si TFT的方法。 提供基板。 在基板上方形成栅电极。 在栅电极上方形成a-Si沟道层。 在a-Si沟道层上形成接触层。 接触层包括钛，锌，砷或其组合。 源电极和漏极形成在接触层上方。

公开(公告)号：US09047940B2

公开(公告)日：2015-06-02

申请号：US13738524

申请日：2013-01-10

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Federico Nardi ,  Yun Wang

IPC: G11C11/00 ,  G11C13/00 ,  H01L45/00 ,  H01L27/24

CPC classification number: G11C13/0007 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2213/12 ,  G11C2213/15 ,  G11C2213/52 ,  G11C2213/71 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/149

Abstract: Provided are resistive random access memory (ReRAM) cells forming arrays and methods of operating such cells and arrays. The ReRAM cells of the same array may have the same structure, such as have the same bottom electrodes, top electrodes, and resistive switching layers. Yet, these cells may be operated in a different manner. For example, some ReRAM cells may be restively switched using lower switching voltages than other cells. The cells may also have different data retention characteristics. These differences may be achieved by using different forming operations for different cells or, more specifically, flowing forming currents in different directions for different cells. The resulting conductive paths formed within the resistive switching layers are believed to switch at or near different electrode interfaces, i.e., within a so called switching zone. In some embodiments, a switching zone of a ReRAM cell may be changed even after the initial formation.

Abstract translation: 提供形成阵列的电阻随机存取存储器（ReRAM）单元和操作这样的单元和阵列的方法。 相同阵列的ReRAM单元可以具有相同的结构，例如具有相同的底部电极，顶部电极和电阻式开关层。 然而，这些电池可以以不同的方式操作。 例如，可以使用比其他单元更低的开关电压来重新切换一些ReRAM单元。 细胞也可能具有不同的数据保留特征。 这些差异可以通过对于不同的单元使用不同的成形操作来实现，或者更具体地，针对不同的单元流动形成不同方向的电流。 形成在电阻开关层内的所得导电路径被认为在不同的电极接口处，即在所谓的开关区域内或附近切换。 在一些实施例中，即使在初始形成之后，ReRAM单元的切换区也可能改变。

公开(公告)号：US20150147866A1

公开(公告)日：2015-05-28

申请号：US14614143

申请日：2015-02-04

Applicant: Intermolecular, Inc.

Inventor： Tony P. Chiang ,  Chi-I Lang ,  Prashant B. Phatak

IPC: H01L45/00

CPC classification number: H01L45/1608 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/14 ,  H01L45/148 ,  H01L45/149 ,  H01L45/1616 ,  H01L45/1641

Abstract: A resistive-switching memory element is described. The memory element includes a first electrode, a porous layer over the first electrode including a point defect embedded in a plurality of pores of the porous layer, and a second electrode over the porous layer, wherein the nonvolatile memory element is configured to switch between a high resistive state and a low resistive state.

Abstract translation: 描述电阻式切换存储元件。 所述存储元件包括第一电极，所述第一电极上的多孔层，包括嵌入所述多孔层的多个孔中的点缺陷，以及位于所述多孔层上的第二电极，其中所述非易失性存储元件构造成在 高电阻状态和低电阻状态。

公开(公告)号：US20150146341A1

公开(公告)日：2015-05-28

申请号：US14092431

申请日：2013-11-27

Applicant: GLOBALFOUNDRIES, Inc. ,  Intermolecular Inc.

Inventor： Nobumichi Fuchigami ,  David Paul Brunco ,  Karthik Ramani ,  Dina Triyoso

IPC: H01G4/10 ,  C23C16/455 ,  H01G4/30

CPC classification number: H01G4/10 ,  C23C16/403 ,  C23C16/405 ,  C23C16/45525 ,  H01G4/085 ,  H01G4/1281 ,  H01G4/306 ,  H01G4/33 ,  H01L28/40

Abstract: A thin sub-layer ( 12) host material. The sub-layer may be formed by atomic layer deposition (ALD). The layer and sub-layer are annealed to form a composite dielectric layer. The host material crystallizes, but the crystalline lattice and grain boundaries are disrupted near the impurity sub-layer, impeding the migration of electrons. The impurity may be a material with a lower dielectric constant than the high-k material, added in such a small relative amount that the composite dielectric is still high-k. Metal-insulator-metal capacitors may be fabricated by forming the composite dielectric layer between two electrodes.

Abstract translation: 在高k（k> 12）主体材料的较厚层（〜30-100）的下面，上方或内部形成杂质的薄亚层（<15Å）。 子层可以通过原子层沉积（ALD）形成。 层和子层进行退火以形成复合介电层。 主体材料结晶，但晶格和晶界在杂质子层附近被破坏，阻碍了电子迁移。 杂质可以是具有比高k材料低的介电常数的材料，以如此小的相对量添加复合电介质仍然高k。 可以通过在两个电极之间形成复合介电层来制造金属 - 绝缘体 - 金属电容器。

公开(公告)号：US09040413B2

公开(公告)日：2015-05-26

申请号：US13714162

申请日：2012-12-13

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Randall J. Higuchi ,  Chien-Lan Hsueh ,  Yun Wang

IPC: H01L21/44 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1608 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616

Abstract: A nonvolatile memory device contains a resistive switching memory element with improved device switching performance and lifetime by custom tailoring the average concentration of defects in the resistive switching film and methods of forming the same. The nonvolatile memory element includes a first electrode layer, a second electrode layer, and a resistive switching layer disposed between the first electrode layer and the second electrode layer. The resistive switching layer comprises a first sub-layer and a second sub-layer, wherein the first sub-layer has more defects than the first sub-layer. A method includes forming a first sub-layer on the first electrode layer by a first ALD process and forming a second sub-layer on the first sub-layer by a second ALD process, where the first sub-layer has a different amount of defects than the second sub-layer.

Abstract translation: 非易失性存储器件包含电阻式开关存储器元件，通过定制电阻式开关膜中的平均缺陷浓度及其形成方法，具有改进的器件切换性能和寿命。 非易失性存储元件包括设置在第一电极层和第二电极层之间的第一电极层，第二电极层和电阻开关层。 电阻开关层包括第一子层和第二子层，其中第一子层具有比第一子层更多的缺陷。 一种方法包括通过第一ALD工艺在第一电极层上形成第一子层，并通过第二ALD工艺在第一子层上形成第二子层，其中第一子层具有不同的缺陷量 比第二个子层。

公开(公告)号：US09029232B2

公开(公告)日：2015-05-12

申请号：US14281550

申请日：2014-05-19

Applicant: Intermolecular Inc.

Inventor： Sandra G Malhotra ,  Sean Barstow ,  Tony P. Chiang ,  Wayne R French ,  Pragati Kumar ,  Prashant B Phatak ,  Sunil Shanker ,  Wen Wu

IPC: H01L21/02 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1608 ,  H01L27/2418 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1641

Abstract: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.

Abstract translation: 提供了基于电阻式开关存储元件层的非易失性存储元件。 非易失性存储元件可以具有电阻性开关金属氧化物层。 电阻式开关金属氧化物层可以具有一层或多层氧化物。 电阻式开关金属氧化物可以掺杂有增加其熔融温度并增强其热稳定性的掺杂剂。 可以形成层以增强非易失性存储元件的热稳定性。 用于非易失性存储元件的电极可以包含导电层和缓冲层。