公开(公告)号：US20090267704A1

公开(公告)日：2009-10-29

申请号：US12395065

申请日：2009-02-27

申请人： Huey-Ru CHANG ,  Min-Lin Lee ,  Jiin-Shing Perng ,  Sheng-Che Hung ,  Shinn-Juh Lai

发明人： Huey-Ru CHANG ,  Min-Lin Lee ,  Jiin-Shing Perng ,  Sheng-Che Hung ,  Shinn-Juh Lai

IPC分类号： H03H7/01

CPC分类号： H03H1/02 ,  H01G4/40 ,  H05K1/0231 ,  H05K1/0233 ,  H05K1/162 ,  H05K1/165 ,  H05K1/181 ,  H05K1/185 ,  H05K2201/1006

摘要： A capacitor device is provided. The capacitor device includes at least one capacitor. The capacitor device also includes a first capacitor and a first filter coupling the first capacitor and a conductive region, wherein the first capacitor has a first resonance frequency and the first filter is configured to operate at a first frequency band covering the first resonance frequency.

摘要翻译： 提供电容器装置。 电容器装置包括至少一个电容器。 电容器装置还包括第一电容器和耦合第一电容器和导电区域的第一滤波器，其中第一电容器具有第一谐振频率，并且第一滤波器被配置为在覆盖第一谐振频率的第一频带上操作。

公开(公告)号：US20090180225A1

公开(公告)日：2009-07-16

申请号：US12191179

申请日：2008-08-13

申请人： Chi-Liang Pan ,  Min-Lin Lee ,  Shinn-Juh Lai ,  Shih-Hsien Wu ,  Chen-Hsuan Chiu

发明人： Chi-Liang Pan ,  Min-Lin Lee ,  Shinn-Juh Lai ,  Shih-Hsien Wu ,  Chen-Hsuan Chiu

IPC分类号： H02H9/00

CPC分类号： H01L23/60 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/0373 ,  H05K1/116 ,  H05K1/167 ,  H05K3/4688 ,  H05K2201/0738 ,  H05K2201/09718 ,  H01L2924/00014

摘要： An ESD protection structure is provided. A substrate includes a first voltage variable material and has a first surface, a second surface substantially paralleled to the first surface and a via connecting the first and second surfaces. A first metal layer is disposed in the substrate for coupling to a ground terminal. The first voltage variable material is in a conductive state when an ESD event occurs, such that the via is electrically connected with the first metal layer to form a discharge path, and the first voltage variable material is in an isolation state when the ESD event is absent, such that the via is electrically isolated from the first metal layer.

摘要翻译： 提供ESD保护结构。 衬底包括第一电压可变材料，并具有第一表面，与第一表面基本平行的第二表面和连接第一表面和第二表面的通孔。 第一金属层设置在衬底中用于耦合到接地端子。 当ESD事件发生时，第一电压可变材料处于导通状态，使得通孔与第一金属层电连接以形成放电路径，并且当ESD事件为ESD时，第一电压可变材料处于隔离状态 不存在，使得通孔与第一金属层电隔离。

公开(公告)号：US20090128993A1

公开(公告)日：2009-05-21

申请号：US12173032

申请日：2008-07-15

申请人： Shih-Hsien Wu ,  Min-Lin Lee ,  Shinn-Juh Lai ,  Shur-Fen Liu

发明人： Shih-Hsien Wu ,  Min-Lin Lee ,  Shinn-Juh Lai ,  Shur-Fen Liu

IPC分类号： H01G4/38

CPC分类号： H01G4/30 ,  H01G4/232 ,  H01G4/38 ,  H01L23/49822 ,  H01L23/50 ,  H01L2924/0002 ,  H05K1/162 ,  H05K3/243 ,  H05K3/4611 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09736 ,  H05K2201/09845 ,  H01L2924/00

摘要： A multi-tier capacitor structure has at least one multi-tier conductive layer. At least one conductive via passes through the multi-tier conductive layer. When currents flow through the conductive via, different current paths are presented in the conductive via in response to different current frequency; in other words, different inductor is induced. Therefore, a single plate capacitor structure has function of hierarchical decoupling capacitor effect.

摘要翻译： 多层电容器结构具有至少一个多层导电层。 至少一个导电通孔穿过多层导电层。 当电流流过导电通孔时，响应于不同的电流频率，在导电通孔中呈现不同的电流路径; 换句话说，感应不同的电感。 因此，单板电容器结构具有分层去耦电容效应的功能。

公开(公告)号：US20090051469A1

公开(公告)日：2009-02-26

申请号：US12260254

申请日：2008-10-29

申请人： Uei-Ming Jow ,  Chang-Sheng Chen ,  Chin-Sun Shyu ,  Min-Lin Lee ,  Shinn-Juh Lay ,  Ying-Jiunn Lai

发明人： Uei-Ming Jow ,  Chang-Sheng Chen ,  Chin-Sun Shyu ,  Min-Lin Lee ,  Shinn-Juh Lay ,  Ying-Jiunn Lai

IPC分类号： H01P1/00

CPC分类号： H01L23/14 ,  H01F17/0006 ,  H01F41/046 ,  H01F2017/0066 ,  H01G4/30 ,  H01G4/40 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49894 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/162 ,  H05K1/165 ,  H05K3/4626 ,  H05K3/4652 ,  H05K3/4655 ,  H05K3/4688 ,  H05K2201/0187 ,  H05K2201/086 ,  H05K2201/09672 ,  H01L2924/00

摘要： A multi-functional composite substrate structure is provided. The first substrate with high dielectric constant and the second substrate with low dielectric constant and low loss tangent are interlaced above the third substrate. One or more permeance blocks may be formed above each substrate, so that one or more inductors may be fabricated thereon. One or more capacitors may be fabricated on the first substrate. Also, one or more signal transmission traces of the system impedance are formed on the second substrate of the outside layer. Therefore, the inductance of the inductor(s) is effectively enhanced. Moreover, the area of built-in components is reduced. Furthermore, it has shorter delay time, smaller dielectric loss, and better return loss for the transmission of high speed and high frequency signal.

摘要翻译： 提供了多功能复合基板结构。 具有高介电常数的第一衬底和具有低介电常数和低损耗角正切的第二衬底交错在第三衬底之上。 可以在每个衬底上方形成一个或多个磁导块，从而可以在其上制造一个或多个电感器。 可以在第一基板上制造一个或多个电容器。 此外，系统阻抗的一个或多个信号传输迹线形成在外层的第二基板上。 因此，有效地提高了电感器的电感。 此外，内置组件的面积减少。 此外，它具有更短的延迟时间，更小的介电损耗和更高的传输高速和高频信号的回波损耗。

公开(公告)号：US20080093113A1

公开(公告)日：2008-04-24

申请号：US11861297

申请日：2007-09-26

申请人： Uei-Ming Jow ,  Min-Lin Lee ,  Shinn-Juh Lay ,  Chin-Sun Shyu ,  Chang-Sheng Chen ,  Ying-Jiunn Lai

发明人： Uei-Ming Jow ,  Min-Lin Lee ,  Shinn-Juh Lay ,  Chin-Sun Shyu ,  Chang-Sheng Chen ,  Ying-Jiunn Lai

IPC分类号： H05K1/16

CPC分类号： H05K1/167 ,  H05K1/0224 ,  H05K1/025 ,  H05K1/0298 ,  H05K2201/0792 ,  H05K2201/09681 ,  H05K2201/0969

摘要： A complementary mirror image embedded planar resistor architecture is provided. In the architecture, a complementary hollow structure is formed on a ground plane or an electrode plane to minimize the parasitic resistance, so as to efficiently enhance the application frequency. In addition, in some cases, some signal transmission lines pass through the position below the embedded planar resistor, and if there is no shield at all, serious interference or cross talk phenomenon occurs. Therefore, the complementary hollow structure of the ground plane, the electrode plane, or a power layer adjacent to the embedded planar resistor is designed to be a mesh structure, so as to reduce the interference or cross talk phenomenon. In this manner, the whole resistor structure has preferable high frequency electrical characteristic in the circuit.

摘要翻译： 提供了一种互补镜像嵌入式平面电阻架构。 在该结构中，在接地平面或电极平面上形成互补的中空结构以最小化寄生电阻，从而有效地提高施加频率。 此外，在某些情况下，一些信号传输线通过嵌入式平面电阻器下方的位置，如果根本没有屏蔽，则会发生严重的干扰或串扰现象。 因此，将接地平面，电极平面或与嵌入式平面电阻器相邻的功率层的互补空心结构设计为网格结构，以减少干扰或串扰现象。 以这种方式，整个电阻器结构在电路中具有优选的高频电特性。

公开(公告)号：US20070152339A1

公开(公告)日：2007-07-05

申请号：US11708935

申请日：2007-02-20

申请人： Uei-Ming Jow ,  Min-Lin Lee ,  Shinn-Juh Lay ,  Chin-Sun Shyu ,  Chang-Sheng Chen

发明人： Uei-Ming Jow ,  Min-Lin Lee ,  Shinn-Juh Lay ,  Chin-Sun Shyu ,  Chang-Sheng Chen

IPC分类号： H01L21/00 ,  H01L21/4763

CPC分类号： H05K1/0268 ,  G01R31/2818 ,  H05K1/0298 ,  H05K1/116 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167

摘要： A method is provided for testing a built-in component including multiple terminals in a multi-layered circuit board. At least one signal pad is provided on a top surface of the multi-layered circuit board for signal transmission. Each of the signal pads are electrically connected to one of the multiple terminals. At least one test pad is provided on the top surface of the multi-layered circuit board and each of the test pads is electrically connected to one of the multiple terminals. Then, detection occurs regarding one of the signal pads and one of the test pads that are electrically connected to a same one of the multiple terminals in order to determine a connection status of an electric path extending from the one signal pad through the same one terminal to the one test pad.

摘要翻译： 提供一种用于在多层电路板中测试包括多个端子的内置组件的方法。 在用于信号传输的多层电路板的顶表面上提供至少一个信号焊盘。 每个信号焊盘电连接到多个端子中的一个。 在多层电路板的顶表面上提供至少一个测试焊盘，并且每个测试焊盘电连接到多个端子之一。 然后，对于电连接到多个端子中的一个的一个信号焊盘和测试焊盘之一进行检测，以便确定从一个信号焊盘延伸通过相同的一个端子的电通路的连接状态 到一个测试垫。

公开(公告)号：US07102876B2

公开(公告)日：2006-09-05

申请号：US11039924

申请日：2005-01-24

申请人： Min-Lin Lee ,  Chin-Sun Shyu ,  Shur-Fen Liu ,  Jing-Pin Pan ,  Jinn-Shing King

发明人： Min-Lin Lee ,  Chin-Sun Shyu ,  Shur-Fen Liu ,  Jing-Pin Pan ,  Jinn-Shing King

IPC分类号： H01G4/20

CPC分类号： H01G4/35 ,  H01G4/20 ,  H05K1/162 ,  H05K2201/0187 ,  H05K2201/0195 ,  H05K2201/0355

摘要： An interleaving striped capacitor substrate structure for pressing-type print circuit boards is disclosed. To meet the high-frequency, high-speed, and high-density requirements in modern electronic systems, the interleaving striped capacitor substrate structure uses several dielectric materials of different dielectric coefficients to make a dielectric layer. One dielectric layer can be stacked on another to form a multi-layered capacitor substrate so that a single capacitor substrate can provide the highest capacitance required for the decoupling capacitor to suppress high-frequency noise signals, and the lower dielectric coefficient substrate required for high-speed signal transmission. This simultaneously achieves the effects of reducing high-frequency transmission time and suppressing high-frequency noise.

摘要翻译： 公开了一种用于按压式印刷电路板的交错条纹电容器基底结构。 为了满足现代电子系统的高频，高速和高密度要求，交错条纹电容器基板结构使用不同介电系数的几种介电材料制成介电层。 一个电介质层可以堆叠在另一个上以形成多层电容器基板，使得单个电容器基板可以提供去耦电容器所需的最高电容以抑制高频噪声信号，并且高电平基板所需的低介电系数基板， 速度信号传输。 这同时实现了降低高频传输时间并抑制高频噪声的效果。