公开(公告)号：US20200295138A1

公开(公告)日：2020-09-17

申请号：US16086275

申请日：2017-03-31

Applicant: Soitec

Inventor： Christophe Figuet ,  Ludovic Ecarnot ,  Bich-Yen Nguyen ,  Walter Schwarzenbach ,  Daniel Delprat ,  Ionut Radu

IPC: H01L29/161 ,  H01L23/00

Abstract: A method for manufacturing a structure comprising a first substrate comprising at least one electronic component likely to be damaged by a temperature higher than 400° C. and a semiconductor layer extending on the first comprises: (a) providing a first bonding metal layer on the first substrate, (b) providing a second substrate comprising successively: a semiconductor base substrate, a stack of a plurality of semiconductor epitaxial layers, a layer of SixGe1-x, with 0≤x≤1 being located at the surface of said stack opposite to the base substrate, and a second bonding metal layer, (c) bonding the first substrate and the second substrate through the first and second bonding metal layers at a temperature lower than or equal to 400° C., and (d) removing a part of the second substrate so as to transfer the layer of SixGe1-x on the first substrate using a selective etching process.

公开(公告)号：US10608610B2

公开(公告)日：2020-03-31

申请号：US16064419

申请日：2016-12-21

Applicant: Soitec

Inventor： Marcel Broekaart ,  Thierry Barge ,  Pascal Guenard ,  Ionut Radu ,  Eric Desbonnets ,  Oleg Kononchuk

IPC: H03H3/10 ,  H03H9/13 ,  H03H9/145 ,  H03H9/17 ,  H03H9/25 ,  H03H9/56 ,  H03H9/64 ,  H01L27/20 ,  H01L41/047 ,  H03H9/02 ,  H01L41/312 ,  H03H3/02 ,  H03H3/04 ,  H01L41/335

Abstract: A substrate for a surface acoustic wave device or bulk acoustic wave device, comprising a support substrate and an piezoelectric layer on the support substrate, wherein the support substrate comprises a semiconductor layer on a stiffening substrate having a coefficient of thermal expansion that is closer to the coefficient of thermal expansion of the material of the piezoelectric layer than that of silicon, the semiconductor layer being arranged between the piezoelectric layer and the stiffening substrate.

公开(公告)号：US20190157137A1

公开(公告)日：2019-05-23

申请号：US16308602

申请日：2017-06-06

Applicant: Soitec

Inventor： Eric Desbonnets ,  Ionut Radu ,  Oleg Kononchuk ,  Jean-Pierre Raskin

IPC: H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L29/06

Abstract: A substrate for microelectronic radiofrequency devices includes a carrier substrate made of a first semiconductor material having a resistivity higher than 500 ohms·cm; a plurality of trenches in the carrier substrate, which trenches are filled with a second material, and defining on a first side of the carrier substrate a plurality of first zones made of a first material and at least one second zone made of a second material. The second material has a resistivity higher than 10 kohms·cm, and the first zones have a maximum dimension smaller than 10 microns and are insulated from one another by the second zone.

公开(公告)号：US20180309426A1

公开(公告)日：2018-10-25

申请号：US15769684

申请日：2016-10-17

Applicant: Soitec

Inventor： Pascal Guenard ,  Ionut Radu

IPC: H03H9/02 ,  H03H3/10 ,  H01L41/053 ,  H03H9/145 ,  H01L41/047 ,  H01L41/337 ,  H01L41/23

CPC classification number: H03H9/02834 ,  H01L41/0475 ,  H01L41/0533 ,  H01L41/23 ,  H01L41/337 ,  H03H3/10 ,  H03H9/02574 ,  H03H9/02984 ,  H03H9/145 ,  H03H9/64 ,  H03H9/725

Abstract: A production method for a surface acoustic wave device comprises the following steps: a step of providing a piezoelectric substrate comprising a transducer arranged on the main front face; a step of depositing a dielectric encapsulation layer on the main front face of the piezoelectric substrate and on the transducer; and a step of assembling the dielectric encapsulation layer with the main front face of a support substrate having a coefficient of thermal expansion less than that of the piezoelectric substrate. In additional embodiments, a surface acoustic wave device comprises a layer of piezoelectric material equipped with a transducer on a main front face, arranged on a substrate support of which the coefficient of thermal expansion is less than that of the piezoelectric material. The transducer is arranged in a dielectric encapsulation layer, between the layer of piezoelectric material and the support substrate.

公开(公告)号：US20170207164A1

公开(公告)日：2017-07-20

申请号：US15405867

申请日：2017-01-13

Applicant: Soitec

Inventor： Ionut Radu ,  Eric Desbonnets

IPC: H01L23/522 ,  H01L23/528 ,  H01L21/768 ,  H01L23/66

CPC classification number: H01L23/5226 ,  H01L21/76254 ,  H01L21/76877 ,  H01L23/528 ,  H01L23/66 ,  H01L2223/6616

Abstract: Methods of forming a semiconductor structure include forming a device layer on an initial substrate, attaching a first surface of the device layer to a temporary substrate and forming a high resistivity layer on a second surface of the device layer by removing a portion of the initial substrate. Methods further include attaching a final substrate to the high resistivity layer and removing the temporary substrate. Semiconductor structures are fabricated by such methods that include a final substrate, a high resistivity layer disposed over the final substrate and a device layer disposed over the high resistivity layer.

公开(公告)号：US09659777B2

公开(公告)日：2017-05-23

申请号：US14362208

申请日：2012-12-13

Applicant: Soitec

Inventor： Didier Landru ,  Carole David ,  Ionut Radu ,  Lucianna Capello ,  Yann Sinquin

IPC: H01L21/428 ,  H01L21/268 ,  H01L21/02 ,  H01L21/20 ,  H01L21/324

CPC classification number: H01L21/268 ,  H01L21/02354 ,  H01L21/2007 ,  H01L21/324 ,  H01L21/428

Abstract: The invention relates to a process for stabilizing a bonding interface, located within a structure for applications in the fields of electronics, optics and/or optoelectronics and that comprises an oxide layer buried between an active layer and a receiver substrate, the bonding interface having been obtained by molecular adhesion. In accordance with the invention, the process further comprises irradiating this structure with a light energy flux provided by a laser, so that the flux, directed toward the structure, is absorbed by the energy conversion layer and converted to heat in this layer, and in that this heat diffuses into the structure toward the bonding interface, so as to thus stabilize the bonding interface.

公开(公告)号：US20160358805A1

公开(公告)日：2016-12-08

申请号：US15170532

申请日：2016-06-01

Applicant: Soitec

Inventor： Marcel Broekaart ,  Ionut Radu ,  Didier Landru

IPC: H01L21/683 ,  H01L21/762 ,  H01L21/48 ,  H01L23/13 ,  H01L21/56 ,  H01L23/15

CPC classification number: H01L21/6835 ,  H01L21/4803 ,  H01L21/76251 ,  H01L2221/6835 ,  H01L2221/68368 ,  H01L2221/68381

Abstract: The present disclosure relates to a method for mechanically separating layers, in particular in a double layer transfer process. The present disclosure relates more in particular to a method for mechanically separating layers, comprising the steps of providing a semiconductor compound comprising a layer of a handle substrate and an active layer with a front main side and a back main side opposite the front main side, wherein the layer of the handle substrate is attached to the front main side of the active layer, then providing a layer of a carrier substrate onto the back main side of the active layer, and then initiating mechanical separation of the layer of the handle substrate, wherein the layer of the handle substrate and the layer of the carrier substrate are provided with a substantially symmetrical mechanical structure.

Abstract translation: 本公开涉及用于机械分离层的方法，特别是在双层转移工艺中。 本公开更具体地涉及用于机械分离层的方法，包括以下步骤：提供包括手柄衬底层和活性层的半导体化合物，其具有与前主侧相对的前主侧和后主侧， 其中所述手柄基板的所述层附着到所述有源层的前主侧，然后在所述有源层的所述后主侧上提供载体基板层，然后开始所述手柄基板的所述层的机械分离， 其中所述手柄基板的层和所述载体基板的层设置有基本对称的机械结构。

公开(公告)号：US20160086974A1

公开(公告)日：2016-03-24

申请号：US14830332

申请日：2015-08-19

Applicant: Soitec

Inventor： Mariam Sadaka ,  Bich-Yen Nguyen ,  Ionut Radu

IPC: H01L27/12 ,  H01L29/78 ,  H01L27/092 ,  H01L29/16 ,  H01L29/161

CPC classification number: H01L27/1203 ,  H01L21/26513 ,  H01L21/324 ,  H01L21/823807 ,  H01L21/84 ,  H01L21/845 ,  H01L27/092 ,  H01L27/0922 ,  H01L27/1211 ,  H01L29/16 ,  H01L29/161 ,  H01L29/7847

Abstract: Methods of fabricating a semiconductor structure include implanting ion into a second region of a strained semiconductor layer on a multi-layer substrate to amorphize a portion of crystalline semiconductor material in the second region of the strained semiconductor layer without amorphizing a first region of the strained semiconductor layer. The amorphous region is recrystallized, and elements are diffused within the semiconductor layer to enrich a concentration of the diffused elements in a portion of the second region of the strained semiconductor layer and alter a strain state therein relative to a strain state of the first region of the strained semiconductor layer. A first plurality of transistor channel structures are formed that each comprise a portion of the first region of the semiconductor layer, and a second plurality of transistor channel structures are formed that each comprise a portion of the second region of the semiconductor layer.

Abstract translation: 制造半导体结构的方法包括将离子注入到多层衬底上的应变半导体层的第二区域中，以使应变半导体层的第二区域中的部分晶体半导体材料非晶化，而不会使应变半导体的第一区域失活 层。 非晶区域被重结晶，并且元件在半导体层内扩散以富集在应变半导体层的第二区域的一部分中的扩散元件的浓度，并且相对于第一区域的第一区域的应变状态改变其中的应变状态 应变半导体层。 形成第一多个晶体管沟道结构，每个晶体管沟道结构各自包括半导体层的第一区域的一部分，并且形成第二多个晶体管沟道结构，每个晶体管沟道结构各自包括半导体层的第二区域的一部分。

公开(公告)号：US09165945B1

公开(公告)日：2015-10-20

申请号：US14489798

申请日：2014-09-18

Applicant: Soitec

Inventor： Mariam Sadaka ,  Bich-Yen Nguyen ,  Ionut Radu

IPC: H01L31/18 ,  H01L27/12 ,  H01L27/092 ,  H01L29/78 ,  H01L21/84 ,  H01L21/8238 ,  H01L21/265 ,  H01L21/324 ,  H01L29/16 ,  H01L29/161

CPC classification number: H01L27/1203 ,  H01L21/26513 ,  H01L21/324 ,  H01L21/823807 ,  H01L21/845 ,  H01L27/092 ,  H01L27/0922 ,  H01L27/1211 ,  H01L29/16 ,  H01L29/161 ,  H01L29/7847

Abstract: Methods of fabricating a semiconductor structure include implanting ion into a second region of a strained semiconductor layer on a multi-layer substrate to amorphize a portion of crystalline semiconductor material in the second region of the strained semiconductor layer without amorphizing a first region of the strained semiconductor layer. The amorphous region is recrystallized, and elements are diffused within the semiconductor layer to enrich a concentration of the diffused elements in a portion of the second region of the strained semiconductor layer and alter a strain state therein relative to a strain state of the first region of the strained semiconductor layer. A first plurality of transistor channel structures are formed that each comprise a portion of the first region of the semiconductor layer, and a second plurality of transistor channel structures are formed that each comprise a portion of the second region of the semiconductor layer.

Abstract translation: 制造半导体结构的方法包括将离子注入到多层衬底上的应变半导体层的第二区域中，以使应变半导体层的第二区域中的部分晶体半导体材料非晶化，而不会使应变半导体的第一区域失活 层。 非晶区域被重结晶，并且元件在半导体层内扩散以富集在应变半导体层的第二区域的一部分中的扩散元件的浓度，并且相对于第一区域的第一区域的应变状态改变其中的应变状态 应变半导体层。 形成第一多个晶体管沟道结构，每个晶体管沟道结构各自包括半导体层的第一区域的一部分，并且形成第二多个晶体管沟道结构，每个晶体管沟道结构各自包括半导体层的第二区域的一部分。

公开(公告)号：US09041214B2

公开(公告)日：2015-05-26

申请号：US13900157

申请日：2013-05-22

Applicant: Soitec

Inventor： Mariam Sadaka ,  Ionut Radu

IPC: H01L23/52 ,  H01L21/20 ,  H01L21/683 ,  H01L21/768 ,  H01L23/538 ,  H01L23/00 ,  H01L25/00

CPC classification number: H01L21/76254 ,  H01L21/2007 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/5384 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/28 ,  H01L24/29 ,  H01L24/32 ,  H01L24/80 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L24/98 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68363 ,  H01L2221/68377 ,  H01L2221/68381 ,  H01L2224/03616 ,  H01L2224/0362 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05009 ,  H01L2224/056 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/08121 ,  H01L2224/08146 ,  H01L2224/0903 ,  H01L2224/16145 ,  H01L2224/27444 ,  H01L2224/27616 ,  H01L2224/29187 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/80 ,  H01L2224/80006 ,  H01L2224/80011 ,  H01L2224/80121 ,  H01L2224/802 ,  H01L2224/80203 ,  H01L2224/80357 ,  H01L2224/80805 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80905 ,  H01L2224/83 ,  H01L2224/83005 ,  H01L2224/83011 ,  H01L2224/83022 ,  H01L2224/83121 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/832 ,  H01L2224/83203 ,  H01L2224/83205 ,  H01L2224/83805 ,  H01L2224/83896 ,  H01L2224/92 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/3512

Abstract: Methods of fabricating semiconductor structures include implanting atom species into a carrier die or wafer to form a weakened region within the carrier die or wafer, and bonding the carrier die or wafer to a semiconductor structure. The semiconductor structure may be processed while using the carrier die or wafer to handle the semiconductor structure. The semiconductor structure may be bonded to another semiconductor structure, and the carrier die or wafer may be divided along the weakened region therein. Bonded semiconductor structures are fabricated using such methods.

Abstract translation: 制造半导体结构的方法包括将原子物质注入到载体晶粒或晶片中以在载体晶粒或晶片内形成弱化区域，并将载体晶片或晶片结合到半导体结构。 可以在使用载体晶片或晶片来处理半导体结构的同时对半导体结构进行处理。 半导体结构可以结合到另一个半导体结构，并且载体晶片或晶片可以沿其中的弱化区域分割。 使用这种方法制造粘合的半导体结构。