Method of manufacturing semiconductor device
    62.
    发明授权
    Method of manufacturing semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号:US06767826B2

    公开(公告)日:2004-07-27

    申请号:US10392933

    申请日:2003-03-21

    申请人: Kazuhide Abe

    发明人: Kazuhide Abe

    IPC分类号: H01L214763

    摘要: A first insulating layer is formed on first wiring and thereafter an etching resistant film is formed thereon. A lower layer portion of a second insulating layer is formed on the etching resistant film. Upon etching for forming dummy trenches, the rate of etching of the etching resistant film is less than or equal to one-tenth the rate of etching of the insulating layer. Therefore, the etching resistant film functions as an etching stopper and the etching thereof does not proceed to the first insulating layer. Thus, the interval between the corresponding first wiring and a second wiring can be reliably maintained and an increase in parasitic capacitance is hence prevented. An insulator lying within a wiring section is made unnecessary while a dishing phenomenon is prevented, by bottom-up filling of a copper-plated film due to the dummy trenches. Thus, wiring resistance is prevented from increasing.

    摘要翻译: 在第一布线上形成第一绝缘层,然后在其上形成耐蚀刻膜。 第二绝缘层的下层部分形成在耐蚀刻膜上。 在蚀刻形成虚拟沟槽时,耐腐蚀膜的蚀刻速率小于或等于绝缘层蚀刻速率的十分之一。 因此,耐腐蚀膜用作蚀刻阻挡层,并且其蚀刻不会进行到第一绝缘层。 因此,可以可靠地保持对应的第一布线和第二布线之间的间隔,从而防止寄生电容的增加。 通过由虚拟沟槽自下而上填充镀铜膜,不需要位于布线部内的绝缘体,同时防止凹陷现象。 因此,防止布线电阻增加。

    Thin film dielectric device
    63.
    发明授权
    Thin film dielectric device 失效
    薄膜电介质器件

    公开(公告)号:US6060735A

    公开(公告)日:2000-05-09

    申请号:US923123

    申请日:1997-09-04

    IPC分类号: H01L21/02 H01L29/78 H01L33/00

    CPC分类号: H01L28/75 H01L28/55

    摘要: A thin film dielectric device is disclosed, that comprises a substrate, a lower electrode formed on the substrate and composed of a laminate film having columnar grains that have grown in a vertical to a surface of the substrate, a dielectric thin film formed on the lower electrode and composed of a perovskite oxide, the dielectric thin film being a polycrystalline film having columnar grains that have successively grown from the columnar grains of the lower electrode and that takes over a crystal orientation of the lower electrode, the lattice constant of the lower electrode being matched with the lattice constant of the dielectric thin film at the interface therebetween with the columnar grains, and an upper electrode formed on the dielectric thin film. The lattice matching of the columnar grains solves problems of the increase of the leak current of the thin film dielectric device and the degradation of the dielectric breakdown resistance. In addition, the polycrystalline film having the columnar grains that succeed at the interface of the electrode/dielectric thin film can be properly formed on the semiconductor substrate such as Si substrate. Thus, the thin film dielectric device according to the present invention can be applied to a real LSI circuit and so forth.

    摘要翻译: 公开了一种薄膜电介质器件,其包括:衬底,形成在衬底上的下电极,由具有在垂直于衬底表面生长的柱状晶粒的层压膜构成;电介质薄膜,形成在下层 电极,由钙钛矿氧化物构成,所述电介质薄膜是具有从下部电极的柱状晶粒连续生长并且接受下部电极的晶体取向的柱状晶粒的多晶膜,下部电极的晶格常数 与介电薄膜在与柱状晶粒之间的界面处的晶格常数和形成在电介质薄膜上的上电极匹配。 柱状晶粒的晶格匹配解决了薄膜电介质器件的漏电流增加和介电击穿电阻的劣化的问题。 此外,可以在诸如Si衬底的半导体衬底上适当地形成具有在电极/电介质薄膜的界面处成功的柱状晶粒的多晶膜。 因此,根据本发明的薄膜电介质器件可以应用于真正的LSI电路等。

    Semiconductor memory device using ferroelectric capacitor
    65.
    发明授权
    Semiconductor memory device using ferroelectric capacitor 失效
    使用铁电电容器的半导体存储器件

    公开(公告)号:US5909389A

    公开(公告)日:1999-06-01

    申请号:US883600

    申请日:1997-06-26

    摘要: A semiconductor memory device has a plurality of memory cells arranged in a matrix format. Each memory cell includes a thin film capacitor with a ferroelectric film and a pair of electrodes opposing each other through the ferroelectric film, and a transfer gate MOS transistor arranged to be connected to the thin film capacitor. The operating voltage value corresponding to the central axis of the polarization hysteresis characteristic curve of the thin film capacitor shifts from 0V by Vf. When no write or read operation is performed for the memory cell, the transistor is turned on, and an adjustment voltage set to be from 0 to 2 Vf is constantly applied across the electrodes of the thin film capacitor.

    摘要翻译: 半导体存储器件具有以矩阵形式布置的多个存储单元。 每个存储单元包括具有铁电膜的薄膜电容器和通过铁电体膜彼此相对的一对电极,以及布置成连接到薄膜电容器的传输门MOS晶体管。 与薄膜电容器的极化滞后特性曲线的中心轴相对应的工作电压值从0V向Vf移动。 当不对存储单元执行写入或读取操作时,晶体管导通,并且设置为0至2Vf的调整电压恒定地施加在薄膜电容器的电极之间。

    Semiconductor device with a resonator using acoustic standing wave excited in semiconductor crystal
    67.
    发明授权
    Semiconductor device with a resonator using acoustic standing wave excited in semiconductor crystal 有权
    具有在半导体晶体中激发的声驻波的谐振器的半导体器件

    公开(公告)号:US09117931B2

    公开(公告)日:2015-08-25

    申请号:US13685859

    申请日:2012-11-27

    IPC分类号: H01L29/84 H03H9/24 H03H9/02

    摘要: A semiconductor device according to an embodiment has: a semiconductor substrate; an acoustic resonator formed on the semiconductor substrate, having a semiconductor layer including impurity electrically isolated from the substrate by depletion layer and configured to resonate at a predetermined resonance frequency based on acoustic standing wave excited in the semiconductor layer; a temperature detector formed on the semiconductor substrate and configured to detect temperature of the semiconductor substrate; a calculating unit formed on the semiconductor substrate and configured to perform calculation of temperature compensation based on the temperature detected by the temperature detector, kind of the impurity and concentration of the impurity; and a controller formed on the semiconductor substrate and configured to control the resonance frequency based on a result of the calculation by the calculating unit.

    摘要翻译: 根据实施例的半导体器件具有:半导体衬底; 形成在所述半导体衬底上的声谐振器,具有包括通过耗尽层与所述衬底电绝缘的杂质的半导体层,并且被配置为基于在所述半导体层中激发的声驻波以预定的谐振频率谐振; 温度检测器,形成在所述半导体衬底上,并被配置为检测所述半导体衬底的温度; 计算单元,其形成在所述半导体基板上,并且被配置为基于由所述温度检测器检测到的温度进行温度补偿的计算,所述杂质的种类和所述杂质的浓度; 以及控制器,其形成在所述半导体基板上,并且被配置为基于所述计算单元的计算结果来控制所述共振频率。

    Piezoelectric-driven MEMS device and method for manufacturing the same
    68.
    发明授权
    Piezoelectric-driven MEMS device and method for manufacturing the same 失效
    压电驱动MEMS器件及其制造方法

    公开(公告)号:US08038890B2

    公开(公告)日:2011-10-18

    申请号:US12038568

    申请日:2008-02-27

    摘要: A piezoelectric-driven MEMS device can be fabricated reliably and consistently. The piezoelectric-driven MEMS device includes: a movable flat beam having a piezoelectric film disposed above a substrate with a recessed portion such that the piezoelectric film is bridged over the recessed portion, piezoelectric drive mechanisms disposed at both ends of the piezoelectric film and configured to drive the piezoelectric film, and a first electrode disposed at the center of the substrate-side of the piezoelectric film, and a second electrode disposed on a flat part of the recessed portion of the substrate and facing the first electrode of the movable flat beam.

    摘要翻译: 可以可靠且一致地制造压电驱动的MEMS器件。 压电驱动MEMS器件包括:可移动平板光束,其具有设置在具有凹部的基板上方的压电膜,使得压电膜桥接在凹部上,压电驱动机构设置在压电膜的两端并被配置为 驱动所述压电膜,以及设置在所述压电膜的基板侧的中心的第一电极,以及设置在所述基板的所述凹部的平坦部分上并且面对所述可动平坦梁的所述第一电极的第二电极。

    Semiconductor device
    69.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号:US07851833B2

    公开(公告)日:2010-12-14

    申请号:US12409926

    申请日:2009-03-24

    IPC分类号: H01L29/76

    摘要: A semiconductor device includes a first transistor unit including first field effect transistors with first gate electrodes electrically connected together, first sources electrically connected together, and first drains electrically connected together, the first gate electrodes being electrically connected to the first drains, a second transistor unit including second field effect transistors with second gate electrodes electrically connected together, second sources electrically connected together, and second drains electrically connected together, the second gate electrodes being electrically connected to the first gate electrodes, and dummy gate electrodes electrically isolated from the first gate electrodes and the second gate electrodes. The first gate electrodes, the second gate electrodes, and the dummy gate electrodes are arranged parallel to one another, and at least one dummy gate electrode is located between any one of the first gate electrodes and any one of the second gate electrodes.

    摘要翻译: 半导体器件包括第一晶体管单元,其包括第一场效应晶体管,第一栅电极电连接在一起,电连接在一起的第一源和电连接在一起的第一漏极,第一栅电极电连接到第一漏极,第二晶体管单元 包括第二场效应晶体管,其中第二栅电极电连接在一起,第二源电连接在一起,第二漏极电连接在一起,第二栅电极电连接到第一栅电极,以及虚栅极与第一栅电极电隔离 和第二栅电极。 第一栅电极,第二栅电极和伪栅极彼此平行布置,并且至少一个虚拟栅电极位于第一栅极电极和第二栅极电极中的任一个之间。