公开(公告)号：US3500538A

公开(公告)日：1970-03-17

申请号：US3500538D

申请日：1966-08-29

Applicant: GEN ELECTRIC

Inventor： RACITI JOSEPH A

IPC: H05K3/30 ,  H05K3/34 ,  H01R9/06

CPC classification number: B21C3/02 ,  H01R12/58 ,  H05K3/308 ,  H05K3/3405 ,  H05K3/3447 ,  H05K3/3468 ,  H05K2201/0373 ,  H05K2201/09181 ,  H05K2201/10287 ,  H05K2201/10446 ,  H05K2201/10568 ,  H05K2201/10651 ,  H05K2201/10696 ,  H05K2201/10704 ,  H05K2201/1081 ,  H05K2201/2036 ,  Y10T29/49117

公开(公告)号：US3059152A

公开(公告)日：1962-10-16

申请号：US79225259

申请日：1959-02-05

Applicant: GLOBE UNION INC

Inventor： KHOURI ALFRED S

IPC: H01R12/00 ,  H05K3/30 ,  H05K3/34 ,  H05K3/40

CPC classification number: H05K3/308 ,  H05K3/3447 ,  H05K3/4046 ,  H05K2201/10696 ,  H05K2201/10803 ,  H05K2201/10818 ,  H05K2201/10871 ,  H05K2201/10878 ,  Y10T29/49945

公开(公告)号：US20070090529A1

公开(公告)日：2007-04-26

申请号：US11250687

申请日：2005-10-14

Applicant: Daniel McCarthy ,  Lakshman Withanawasam

Inventor： Daniel McCarthy ,  Lakshman Withanawasam

IPC: H01L23/48

CPC classification number: H01L23/3121 ,  H01L21/4846 ,  H01L23/49805 ,  H01L25/105 ,  H01L2224/48247 ,  H01L2225/1005 ,  H01L2225/1023 ,  H01L2225/1064 ,  H05K3/3442 ,  H05K2201/10454 ,  H05K2201/10696 ,  Y02P70/613

Abstract: A method of fabricating a vertically mountable integrated circuit (IC) package is presented. An integrated circuit is mounted on a printed circuit board (PCB) and electrically coupled to a bond pad on the PCB. The bond pad is coupled with a via that is embedded in the PCB. The IC, the bond pad, the via, and a portion of the PCB are singulated in order to create a vertically mountable IC package. The via is cut through cross-sectionally during singulation so as to expose a portion of the via and thereby provide a mountable area for the IC package. The IC package may be encapsulated or housed in a dielectric material. In addition, the via may be treated with a preservative or other suitable electroless metal plating deposition that prevents oxidation and promotes solderability.

Abstract translation: 提出了制造可垂直安装的集成电路（IC）封装的方法。 集成电路安装在印刷电路板（PCB）上并电耦合到PCB上的接合焊盘。 接合焊盘与嵌入在PCB中的通孔耦合。 将IC，接合焊盘，通孔和PCB的一部分分开以形成可垂直安装的IC封装。 在分割期间通孔横截面切割，以便露出通孔的一部分，从而为IC封装提供可安装区域。 IC封装可以封装或容纳在电介质材料中。 此外，通孔可以用防腐剂或其它合适的无电金属电镀沉积进行处理，防止氧化并促进可焊性。

公开(公告)号：US20060033190A1

公开(公告)日：2006-02-16

申请号：US11257428

申请日：2005-10-24

Applicant: Larry Kinsman ,  Walter Moden ,  Warren Farnworth

Inventor： Larry Kinsman ,  Walter Moden ,  Warren Farnworth

IPC: H01L23/02

CPC classification number: H05K3/301 ,  H01L25/105 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K2201/10454 ,  H05K2201/10696 ,  Y10S83/942 ,  Y10T29/49121 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49147 ,  Y10T29/49156 ,  Y10T29/49169 ,  Y10T29/53174 ,  Y10T29/53178 ,  H01L2924/00

Abstract: A semiconductor device package includes a die, a package encapsulating at least a portion of the die, and a plurality of leads. Each lead of the plurality includes an external portion. The external portion of each lead is substantially planar and extends outward from a bottom edge of the package. The external portion of each lead may be oriented in a plane that is substantially parallel to a plane within which the die is located. A semiconductor device including these features may be part of an assembly that also includes an alignment device for orienting the semiconductor device package in nonparallel relation to a substrate.

Abstract translation: 半导体器件封装包括管芯，封装至少一部分裸片的封装以及多个引线。 多个的每个引线包括外部部分。 每个引线的外部部分基本上是平面的并且从封装的底部边缘向外延伸。 每个引线的外部部分可以在基本上平行于管芯所在的平面的平面内取向。 包括这些特征的半导体器件可以是组件的一部分，该组件还包括用于将半导体器件封装以非平行关系定向到衬底的对准装置。

公开(公告)号：US20060001150A1

公开(公告)日：2006-01-05

申请号：US11219134

申请日：2005-09-01

Applicant: Larry Kinsman ,  Walter Moden ,  Warren Farnworth

Inventor： Larry Kinsman ,  Walter Moden ,  Warren Farnworth

IPC: H01L23/48

CPC classification number: H05K3/301 ,  H01L25/105 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K2201/10454 ,  H05K2201/10696 ,  Y10S83/942 ,  Y10T29/49121 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49147 ,  Y10T29/49156 ,  Y10T29/49169 ,  Y10T29/53174 ,  Y10T29/53178 ,  H01L2924/00

Abstract: A semiconductor device including a plurality of stub contacts extending from a single edge thereof. A complementary alignment device includes at least one receptacle for receiving the semiconductor device. The alignment device is securable to a carrier substrate. A contact element may be configured to bias the semiconductor device in such a way as to establish and maintain electrical communication between the semiconductor device and the carrier substrate.

Abstract translation: 一种半导体器件，包括从其单个边缘延伸的多个短截线触点。 互补对准装置包括用于接收半导体器件的至少一个插座。 对准装置可固定到载体基板。 接触元件可以被配置为以这样的方式偏置半导体器件，以便建立和维持半导体器件和载体衬底之间的电连通。

公开(公告)号：US06963128B2

公开(公告)日：2005-11-08

申请号：US10352698

申请日：2003-01-27

Applicant: Larry D. Kinsman ,  Walter L. Moden ,  Warren M. Farnworth

Inventor： Larry D. Kinsman ,  Walter L. Moden ,  Warren M. Farnworth

IPC: H01L25/10 ,  H05K3/30 ,  H01L23/48 ,  H01L23/52

CPC classification number: H05K3/301 ,  H01L25/105 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K2201/10454 ,  H05K2201/10696 ,  Y10S83/942 ,  Y10T29/49121 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49147 ,  Y10T29/49156 ,  Y10T29/49169 ,  Y10T29/53174 ,  Y10T29/53178 ,  H01L2924/00

Abstract: A vertically mountable semiconductor device including a plurality of stub contacts extending perpendicularly from a bottom edge thereof. A complementary alignment device includes a receptacle for receiving the vertically mountable semiconductor device. The alignment device is attachable to a carrier substrate. Upon attachment of the alignment device to a carrier substrate and insertion of a vertically mountable semiconductor device into the receptacle, a contact element applies a downward force to the vertically mountable semiconductor device to establish and maintain an electrical connection between the vertically mountable semiconductor device and the carrier substrate.

Abstract translation: 一种可垂直安装的半导体器件，包括从其底部边缘垂直延伸的多个短截线触头。 互补对准装置包括用于接收垂直安装的半导体器件的插座。 对准装置可附接到载体基板。 在将对准装置附接到载体基板并将可垂直安装的半导体装置插入到插座中时，接触元件向垂直安装的半导体器件施加向下的力，以建立并保持可垂直安装的半导体器件与 载体衬底。

公开(公告)号：US06909055B2

公开(公告)日：2005-06-21

申请号：US10301990

申请日：2002-11-22

Applicant: Salman Akram ,  Warren M. Farnworth ,  Alan G. Wood ,  J. Michael Brooks ,  Eugene H. Cloud

Inventor： Salman Akram ,  Warren M. Farnworth ,  Alan G. Wood ,  J. Michael Brooks ,  Eugene H. Cloud

IPC: H01L23/495 ,  H05K1/02 ,  H05K1/09 ,  H05K3/32 ,  H05K1/11

CPC classification number: H05K3/4007 ,  H01L23/4951 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H05K1/0271 ,  H05K1/095 ,  H05K3/321 ,  H05K3/325 ,  H05K3/326 ,  H05K2201/0133 ,  H05K2201/0314 ,  H05K2201/0367 ,  H05K2201/09909 ,  H05K2201/10454 ,  H05K2201/10696 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A device comprising a circuit, a lead having a first end connected to the circuit and having a second end, and a deformable structure connected to the second end of the lead. The invention may be embodied on a circuit board, so that the circuit board includes a substrate and a deformable structure connected to said substrate.

Abstract translation: 一种装置，包括电路，具有连接到所述电路并具有第二端的第一端的引线和连接到所述引线的第二端的可变形结构。 本发明可以实现在电路板上，使得电路板包括基板和连接到所述基板的可变形结构。

公开(公告)号：US06836003B2

公开(公告)日：2004-12-28

申请号：US09819874

申请日：2001-03-28

Applicant: David J. Corisis ,  Tracy Reynolds ,  Michael Slaughter ,  Daniel Cram ,  Leland R. Nevill ,  Jerrold L. King

Inventor： David J. Corisis ,  Tracy Reynolds ,  Michael Slaughter ,  Daniel Cram ,  Leland R. Nevill ,  Jerrold L. King

IPC: H01L23495

CPC classification number: G01R31/2851 ,  G01R1/0408 ,  G01R31/2884 ,  H01L23/4951 ,  H01L23/544 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/303 ,  H05K2201/10568 ,  H05K2201/10689 ,  H05K2201/10696 ,  H05K2203/167 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: An integrated circuit is provided having an alignment feature integral with the lead frame. The integrated circuit includes a lead frame coupled with a semiconductor die, and is partially encapsulated in insulating material. The lead frame has the alignment feature therein. The alignment feature includes a cut out on the lead frame taking the form of a semicircle, protuberance, apertures, or slots. Alternatively, the alignment feature includes a removably coupled tab. After testing of the integrated circuit has been completed, the alignment tab is removed from the integrated circuit. The alignment feature can also be provided on a heat spreader which is attached to a side of or within the lead frame package.

Abstract translation: 提供了具有与引线框一体的对准特征的集成电路。 集成电路包括与半导体管芯耦合的引线框架，并部分封装在绝缘材料中。 引线框架具有其中的对准特征。 对准特征包括在引线框架上切割出半圆形，突起，孔或槽的形式。 或者，对准特征包括可移除地耦合的突片。 集成电路测试完成后，对准标签从集成电路中取出。 对准特征也可以设置在附着于引线框架封装的一侧或内部的散热器上。

公开(公告)号：US06781839B2

公开(公告)日：2004-08-24

申请号：US10457122

申请日：2003-06-09

Applicant: Larry D. Kinsman ,  Jerry M. Brooks ,  Walter L. Moden

Inventor： Larry D. Kinsman ,  Jerry M. Brooks ,  Walter L. Moden

IPC: H05K720

CPC classification number: H05K3/303 ,  H01L23/3675 ,  H01L23/4334 ,  H01L2924/0002 ,  H05K1/0203 ,  H05K2201/09709 ,  H05K2201/10454 ,  H05K2201/10659 ,  H05K2201/10696 ,  Y02P70/613 ,  H01L2924/00

Abstract: A high density vertical surface mount package and thermal carrier therefore including a heat sink.

Abstract translation: 因此，高密度垂直表面安装封装和热载体包括散热器。

公开(公告)号：US20020008310A1

公开(公告)日：2002-01-24

申请号：US09939849

申请日：2001-08-27

Inventor： Larry D. Kinsman ,  Walter L. Moden ,  Warren M. Farnworth

IPC: H01L023/02

CPC classification number: H05K3/301 ,  H01L25/105 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K2201/10454 ,  H05K2201/10696 ,  Y10S83/942 ,  Y10T29/49121 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49147 ,  Y10T29/49156 ,  Y10T29/49169 ,  Y10T29/53174 ,  Y10T29/53178 ,  H01L2924/00

Abstract: A vertically mountable semiconductor device including a plurality of stub contacts extending perpendicular from a bottom edge thereof. A complementary alignment device includes a receptacle for receiving the vertically mountable semiconductor device. The alignment device is attachable to a carrier substrate. Upon attachment of the alignment device to a carrier substrate and insertion of a vertically mountable semiconductor device into the receptacle, a contact element applies a downward force to the vertically mountable semiconductor device to establish and maintain an electrical connection between the vertically mountable semiconductor device and the carrier substrate.

Abstract translation: 一种可垂直安装的半导体器件，包括从其底部边缘垂直延伸的多个短截线触头。 互补对准装置包括用于接收垂直安装的半导体器件的插座。 对准装置可附接到载体基板。 在将对准装置附接到载体基板并将可垂直安装的半导体装置插入到插座中时，接触元件向垂直安装的半导体器件施加向下的力，以建立并保持可垂直安装的半导体器件与 载体衬底。