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95 条记录 (耗时 0.025 秒)

    On-demand activation of memory path during sleep or active modes
    73.
    发明授权
    On-demand activation of memory path during sleep or active modes 有权

    公开(公告)号：US12050789B2

    公开(公告)日：2024-07-30

    申请号：US17981149

    申请日：2022-11-04

    申请人： Ambiq Micro, Inc.

    发明人： Daniel Martin Cermak ,  Scott McLean Hanson ,  Yousof Mortazavi ,  Ramakanth Kondagunturi

    IPC分类号： G06F3/06

    CPC分类号： G06F3/0625 ,  G06F3/0626 ,  G06F3/0655 ,  G06F3/0673

    摘要： A low-power system-on-chip includes an originating controller, a fabric, and a power controller. The originating controller is configured to initiate a memory transaction request including a source address. The fabric includes an arbiter configured to receive the memory transaction request and determine a first memory device associated with the memory transaction request. The power controller is configured to selectively change a first memory bank of the first memory device from a first power mode to a second power mode based at least in part on the source address. The fabric is configured to perform a memory operation by (a) receiving stored data from memory storage locations corresponding to the source address when the memory transaction request includes a read request, and (b) sending data included in the memory transaction request to the memory storage locations when the memory transaction request includes a program or a write request.

    On-chip system with context-based energy reduction
    75.
    发明授权
    On-chip system with context-based energy reduction 有权

    公开(公告)号：US11940865B2

    公开(公告)日：2024-03-26

    申请号：US18154793

    申请日：2023-01-13

    申请人： Ambiq Micro, Inc.

    发明人： Carlos Morales

    IPC分类号： G06F1/32 ,  G06F1/3296

    CPC分类号： G06F1/3296

    摘要： A system for computing devices includes a central processing unit (CPU that is configured to perform in a plurality of power modes, each power mode being pre-defined to have a different code-execution performance capability than remaining ones of the plurality of power modes. The system further includes a sampling peripheral, an electrical output, and a memory device. The memory device is configured to select and execute a specific module from the plurality of modules based on the context-identifying input triggering the specific module. If triggered, each module is executed to receive the context-identifying input from the sampling peripheral, and to operate the CPU in a dedicated power mode of the plurality of power modes.

    ON-CHIP SYSTEM WITH CONTEXT-BASED ENERGY REDUCTION
    76.
    发明公开
    ON-CHIP SYSTEM WITH CONTEXT-BASED ENERGY REDUCTION 审中-公开

    公开(公告)号：US20240028105A1

    公开(公告)日：2024-01-25

    申请号：US18154793

    申请日：2023-01-13

    申请人： Ambiq Micro, Inc.

    发明人： Carlos Morales

    IPC分类号： G06F1/3296

    CPC分类号： G06F1/3296

    摘要： A system for computing devices includes a central processing unit (CPU that is configured to perform in a plurality of power modes, each power mode being pre-defined to have a different code-execution performance capability than remaining ones of the plurality of power modes. The system further includes a sampling peripheral, an electrical output, and a memory device. The memory device is configured to select and execute a specific module from the plurality of modules based on the context-identifying input triggering the specific module. If triggered, each module is executed to receive the context-identifying input from the sampling peripheral, and to operate the CPU in a dedicated power mode of the plurality of power modes.

    Method for generating power profile in low power processor
    78.
    发明授权
    Method for generating power profile in low power processor 有权

    公开(公告)号：US11853188B2

    公开(公告)日：2023-12-26

    申请号：US17745570

    申请日：2022-05-16

    申请人： Ambiq Micro, Inc.

    发明人： Scott Hanson ,  RongKai Xu

    IPC分类号： G06F11/30 ,  G06F11/32

    CPC分类号： G06F11/3062 ,  G06F11/3013 ,  G06F11/3072 ,  G06F11/324

    摘要： A method of determining power data of a system on a chip is disclosed. A plug-in module is provided for installation on the chip. The plug-in module is activated to take a snapshot of the data in power related registers of components on the chip when user provided software is executed on the system on a chip. The collected data is streamed to an external computing device. A spreadsheet of the collected register data may be displayed. A graphic representation of the collected register data may be displayed.

    SYSTEM FOR PROVIDING POWER TO LOW POWER SYSTEMS
    79.
    发明公开
    SYSTEM FOR PROVIDING POWER TO LOW POWER SYSTEMS 审中-公开

    公开(公告)号：US20230400909A1

    公开(公告)日：2023-12-14

    申请号：US18093907

    申请日：2023-01-06

    申请人： Ambiq Micro, INc.

    发明人： Ivan Bogue ,  Yousof Mortazavi ,  Jesse Coulon ,  Rajeev Srivastava

    IPC分类号： G06F1/3296 ,  G06F1/26

    CPC分类号： G06F1/3296 ,  G06F1/263

    摘要： In some embodiments, a system comprises a microcontroller system comprising a CPU, an I/O module, and a microcontroller system power input, a power supply comprising a first power supply output providing power at a first power level, and a second power supply output providing power at a second power level, and a switch comprising a signal input communicatively coupled to the I/O module and configured to receive a status signal from the I/O module, a first switch power input electrically coupled to the first power supply output, a second switch power input electrically coupled to the second power supply output, and a switch power output electrically coupled to the microcontroller system power input and configured to output power to the microcontroller system.

    ENHANCED PERIPHERAL PROCESSING SYSTEM TO OPTIMIZE POWER CONSUMPTION
    80.
    发明公开
    ENHANCED PERIPHERAL PROCESSING SYSTEM TO OPTIMIZE POWER CONSUMPTION 审中-公开

    公开(公告)号：US20230385214A1

    公开(公告)日：2023-11-30

    申请号：US18295180

    申请日：2023-04-03

    申请人： Ambiq Micro, Inc.

    发明人： Stephen James SHEAFOR ,  Daniel Martin CERMAK ,  Roger SERWY ,  Marc MILLER

    IPC分类号： G06F13/28 ,  G06F13/16 ,  G06F1/3296

    CPC分类号： G06F13/28 ,  G06F13/1673 ,  G06F1/3296

    摘要： A microcontroller system that includes a central processing unit (CPU), a first system memory, a first peripheral module, and a DMA controller is disclosed. The DMA controller includes a DMA processor, a DMA memory, and a DMA interconnect. The DMA memory stores information associated with the DMA processor. The DMA processor receives a command from the CPU or a signal from a peripheral processor of the first peripheral module that a first data transfer is requested. The DMA processor receives first data from the first system memory or the first peripheral module. The DMA processor, based at least in part on the information stored in the DMA memory, transmits the first data to the first peripheral module or the first system memory, thereby sparing the CPU from managing the transferring of the first data.