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公开(公告)号:US08748322B1
公开(公告)日:2014-06-10
申请号:US13942950
申请日:2013-07-16
Applicant: Applied Materials, Inc.
Inventor: Nancy Fung , David T. Or , Qingjun Zhou , Lina Zhu , Jeremiah T. Pender , Srinivas D. Nemani , Sean S. Kang , Sergey G. Belostotskiy , Chinh Dinh
IPC: H01L21/302
CPC classification number: H01L21/31116 , H01J37/32357 , H01L21/67028 , H01L21/76229
Abstract: A method of etching silicon oxide from a trench is described which allows more homogeneous etch rates across a varying pattern on a patterned substrate. The method also provides a more rectilinear profile following the etch process. Methods include a sequential exposure of gapfill silicon oxide. The gapfill silicon oxide is exposed to a local plasma treatment prior to a remote-plasma dry etch which may produce salt by-product on the surface. The local plasma treatment has been found to condition the gapfill silicon oxide such that the etch process proceeds at a more even rate within each trench and across multiple trenches. The salt by-product may be removed by raising the temperature in a subsequent sublimation step.
Abstract translation: 描述了从沟槽中蚀刻二氧化硅的方法,其允许跨越图案化衬底上的变化图案的更均匀的蚀刻速率。 该方法还提供了在蚀刻工艺之后的更直线的轮廓。 方法包括间隙填充氧化硅的顺序曝光。 在远程等离子体干蚀刻之前,将间隙填充氧化硅暴露于局部等离子体处理,其可以在表面上产生副产物盐。 已经发现局部等离子体处理可以调节填隙氧化硅的间隙,使得蚀刻过程在每个沟槽内并跨越多个沟槽以更均匀的速率进行。 可以通过在随后的升华步骤中升高温度来除去盐副产物。
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公开(公告)号:US12142467B2
公开(公告)日:2024-11-12
申请号:US17333533
申请日:2021-05-28
Applicant: Applied Materials, Inc.
Inventor: Qiwei Liang , Srinivas D. Nemani , Keith Tatseun Wong , Antony K. Jan
IPC: H01J37/32 , C23C16/04 , H01L21/027 , H01L21/32
Abstract: The present disclosure generally relates to a substrate processing chamber, a substrate processing apparatus, and a substrate processing method for self-assembled monolayer (SAM) deposition of low vapor pressure organic molecules (OM) followed by further substrate processing, such as atomic layer deposition.
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公开(公告)号:US20240194526A1
公开(公告)日:2024-06-13
申请号:US18581598
申请日:2024-02-20
Applicant: Applied Materials, Inc.
Inventor: Srinivas Gandikota , Steven C.H. Hung , Srinivas D. Nemani , Yixiong Yang , Susmit Singha Roy , Nikolaos Bekiaris
IPC: H01L21/768 , H01L23/48
CPC classification number: H01L21/76864 , H01L21/76898 , H01L23/481
Abstract: A method of forming an electronic device is disclosed. The method comprises forming depositing a metal on a substrate, the metal comprising one or more of copper (Cu), titanium (Ti), or tantalum (Ta). A metal cap is deposited on the metal. The metal cap comprises one or more of molybdenum (Mo), ruthenium (Ru), iridium (Ir), rhodium (Rh), palladium (Pd), silver (Ag), osmium (Os), platinum (Pt), or gold (Au). The substrate is then exposed to an anneal process, e.g., a hydrogen high-pressure anneal. The formation of the metal cap on the metal minimizes parasitic adsorption of hydrogen by the underlying metal.
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公开(公告)号:US11993845B2
公开(公告)日:2024-05-28
申请号:US16809318
申请日:2020-03-04
Applicant: Applied Materials, Inc.
Inventor: Jong Choi , Christopher Ahles , Andrew C. Kummel , Keith Tatseun Wong , Srinivas D. Nemani
IPC: C23C16/455 , C23C16/40 , C23C16/458 , H01L21/02 , H01L21/285
CPC classification number: C23C16/45553 , C23C16/401 , C23C16/4583 , H01L21/02142 , H01L21/0228 , H01L21/28518 , H01L21/02211
Abstract: Methods for depositing a metal containing material formed on a certain material of a substrate using an atomic layer deposition process for semiconductor applications are provided. In one embodiment, a method of forming a metal containing material on a substrate comprises pulsing a first gas precursor comprising a metal containing precursor to a surface of a substrate, pulsing a second gas precursor comprising a silicon containing precursor to the surface of the substrate, forming a metal containing material selectively on a first material of the substrate, and thermal annealing the metal containing material formed on the substrate.
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公开(公告)号:US11948828B2
公开(公告)日:2024-04-02
申请号:US16744478
申请日:2020-01-16
Applicant: Applied Materials, Inc.
Inventor: Sultan Malik , Srinivas D. Nemani , Adib M. Khan , Qiwei Liang
IPC: H01L21/687 , H01L21/677
CPC classification number: H01L21/68735 , H01L21/67706 , H01L21/67748 , H01L21/68707 , H01L21/68742
Abstract: The present disclosure generally relates to a pin-less substrate transfer apparatus and method for a processing chamber. The processing chamber includes a pedestal. The pedestal includes a pedestal plate. The pedestal plate has a radius, a top surface, and a bottom surface. The pedestal plate further includes a plurality of cut outs on a perimeter of the pedestal plate. Flat edges are disposed on opposite sides of the pedestal plate. Recesses are disposed in the bottom surface below each of the flat edges.
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公开(公告)号:US11798606B2
公开(公告)日:2023-10-24
申请号:US17328491
申请日:2021-05-24
Applicant: Applied Materials, Inc.
Inventor: John O. Dukovic , Srinivas D. Nemani , Ellie Y. Yieh , Praburam Gopalraja , Steven Hiloong Welch , Bhargav S. Citla
Abstract: One or more embodiments described herein generally relate to patterning semiconductor film stacks. Unlike in conventional embodiments, the film stacks herein are patterned without the need of etching the magnetic tunnel junction (MTJ) stack. Instead, the film stack is etched before the MTJ stack is deposited such that the spin on carbon layer and the anti-reflective coating layer are completely removed and a trench is formed within the dielectric capping layer and the oxide layer. Thereafter, MTJ stacks are deposited on the buffer layer and on the dielectric capping layer. An oxide capping layer is deposited such that it covers the MTJ stacks. An oxide fill layer is deposited over the oxide capping layer and the film stack is polished by chemical mechanical polishing (CMP). The embodiments described herein advantageously result in no damage to the MTJ stacks since etching is not required.
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公开(公告)号:US11682556B2
公开(公告)日:2023-06-20
申请号:US17672305
申请日:2022-02-15
Applicant: Applied Materials, Inc.
Inventor: Jie Zhou , Erica Chen , Qiwei Liang , Chentsau Chris Ying , Srinivas D. Nemani , Ellie Y. Yieh
CPC classification number: H01L21/02527 , C23C16/02 , C23C16/26 , H01L21/0262 , H01L21/02425 , H01L21/02488
Abstract: A method of forming graphene layers is disclosed. A method of improving graphene deposition is also disclosed. Some methods are advantageously performed at lower temperatures. Some methods advantageously provide graphene layers with lower resistance. Some methods advantageously provide graphene layers in a relatively short period of time.
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公开(公告)号:US11664215B2
公开(公告)日:2023-05-30
申请号:US16802290
申请日:2020-02-26
Applicant: Applied Materials, Inc.
Inventor: Christopher Ahles , Jong Choi , Andrew C. Kummel , Keith Tatseun Wong , Srinivas D. Nemani
IPC: H01L21/02 , C23C16/40 , C23C16/455
CPC classification number: H01L21/02186 , C23C16/405 , C23C16/45527 , C23C16/45553 , H01L21/0228 , H01L21/02205
Abstract: Methods for depositing a metal containing material formed on a certain material of a substrate using an atomic layer deposition process for semiconductor applications are provided. In one example, a method of forming a metal containing material on a substrate comprises pulsing a first gas precursor comprising a metal containing precursor to a surface of a substrate, pulsing a second gas precursor comprising a carboxylic acid to the surface of the substrate, and forming a metal containing material selectively on a first material of the substrate. In another example, a method of forming a metal containing material on a substrate includes selectively forming a metal containing layer on a silicon material or a metal material on a substrate than on an insulating material on the substrate by an atomic layer deposition process by alternatively supplying a metal containing precursor and a water free precursor to the substrate.
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公开(公告)号:US11631591B2
公开(公告)日:2023-04-18
申请号:US17408943
申请日:2021-08-23
Applicant: Applied Materials, Inc.
Inventor: Bhargav S. Citla , Jethro Tannos , Jingyi Li , Douglas A. Buchberger, Jr. , Zhong Qiang Hua , Srinivas D. Nemani , Ellie Y. Yieh
IPC: C23C16/505 , H01L21/311 , H01L21/762 , H01J37/32 , H01L21/3065 , H01L21/67 , C23C16/515 , H01L21/02 , C23C16/509 , C23C16/517
Abstract: Methods for depositing a dielectric material using RF bias pulses along with remote plasma source deposition for manufacturing semiconductor devices, particularly for filling openings with high aspect ratios in semiconductor applications are provided. For example, a method of depositing a dielectric material includes providing a gas mixture into a processing chamber having a substrate disposed therein, forming a remote plasma in a remote plasma source and delivering the remote plasma to an interior processing region defined in the processing chamber, applying a RF bias power to the processing chamber in pulsed mode, and forming a dielectric material in an opening defined in a material layer disposed on the substrate in the presence of the gas mixture and the remote plasma.
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公开(公告)号:US11609505B2
公开(公告)日:2023-03-21
申请号:US17222696
申请日:2021-04-05
Applicant: Applied Materials, Inc.
Inventor: Mangesh Ashok Bangar , Gautam Pisharody , Lancelot Huang , Alan L. Tso , Douglas A. Buchberger, Jr. , Huixiong Dai , Dmitry Lubomirsky , Srinivas D. Nemani , Christopher Siu Wing Ngai
Abstract: Embodiments of the present disclosure generally relate to apparatus and methods for verification and re-use of process fluids. The apparatus generally includes a tool for performing lithography, and a recirculation path coupled to the tool. The recirculation path generally includes a collection unit coupled at first end to a first end of the tool, and a probe coupled at a first end to a second end of the collection unit, the probe for determining one or more characteristics of a fluid flowing from the tool. The recirculation path of the apparatus further generally includes a purification unit coupled at a first end to a third end of the collection unit, the purification unit further coupled at a second end to a second end of the probe, the purification unit for changing a characteristic of the fluid.
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