摘要:
Microelectronic imagers and methods for packaging microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging unit can include a microelectronic die, an image sensor, an integrated circuit electrically coupled to the image sensor, and a bond-pad electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the die and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad with conductive fill material at least partially disposed in the passage. An electrically conductive support member is carried by and projects from the bond-pad. A cover over the image sensor is coupled to the support member.
摘要:
The present invention is directed toward apparatus and methods of testing and assembling bumped die and bumped devices using an anisotropically conductive layer. In one embodiment, a semiconductor device comprises a bumped device having a plurality of conductive bumps formed thereon, a substrate having a plurality of contact pads distributed thereon and approximately aligned with the plurality of conductive bumps, and an anisotropically conductive layer disposed between and mechanically coupled to the bumped device and to the substrate. The anisotropically conductive layer electrically couples each of the conductive bumps with a corresponding one of the contact pads. In another embodiment, an apparatus for testing a bumped device having a plurality of conductive bumps includes a substrate having a plurality of contact pads distributed thereon and substantially alignable with the plurality of conductive bumps, and an anisotropically conductive layer disposed on the first surface and engageable with the plurality of conductive bumps to electrically couple each of the conductive bumps with a corresponding one of the contact pads. Alternately, the test apparatus may also include an alignment device or a bumped device handler. In another embodiment, a method of testing a bumped device includes engaging a plurality of contact pads with an anisotropically conductive layer, engaging the plurality of conductive bumps with the anisotropically conductive layer substantially opposite from and in approximate alignment with the plurality of contact pads, forming a plurality of conductive paths through the anisotropically conductive layer so that each of the conductive bumps is electrically coupled to one of the contact pads, and applying test signals through at least some of the contact pads and the conductive paths to at least some of the conductive bumps.
摘要:
A spring element used in a temporary package for testing semiconductors is provided. The spring element is compressed so as to press the semiconductor, either in the form of a bare semiconductor die or as part of a package, against an interconnect structure. The spring element is configured so that it provides sufficient pressure to keep the contacts on the semiconductor in electrical contact with the interconnect structure. Material is added and/or removed from the spring element so that it has the desired modulus of elasticity. The shape of the spring element may also be varied to change the modulus of elasticity, the spring constant, and the force transfer capabilities of the spring element.
摘要:
A semiconductor wafer saw for dicing semiconductor wafers comprises variable lateral indexing capabilities and multiple blades. The wafer saw, because of its variable indexing capabilities, can dice wafers having a plurality of differently sized semiconductor devices thereon into their respective discrete components. In addition, the wafer saw with its multiple blades, some of which may be independently laterally or vertically movable relative to other blades, can more efficiently dice silicon wafers into individual semiconductor devices.
摘要:
The present invention provides a metallization structure for semiconductor device interconnects such as a conductive line, including a substrate with a substantially planar upper surface, foundation metal layer disposed on a portion of the substrate upper surface, primary conducting metal layer overlying the foundation metal layer, and metal spacer on the sidewalls of the primary conducting metal layer and the foundation metal layer. The present invention also provides a metallization structure including a substrate with a foundation metal layer disposed thereon, a dielectric layer with an aperture therethrough being disposed on the substrate, where the bottom of the aperture exposes the foundation metal layer of the substrate, and a metal spacer on the sidewall of the aperture and a line or plug of a primary conducting metal fill the remaining portion of the aperture. The present invention also includes methods for making the metallization structures.
摘要:
Protective structures for bond wires or other intermediate conductive elements of a semiconductor device assembly cover the intermediate conductive elements without covering a substantial portion of a semiconductor device from which the intermediate conductive elements extend. In addition to coating at least portions of one or more intermediate conductive elements, the protective structure may include a fence which is configured to receive a semiconductor device. Such a fence may be formed integrally with the remainder of the protective structure or a separately formed member. The protective structures may be formed from a photopolymer material which has been at least partially cured, for example, by stereolithography processes. Accordingly, the protective structures may include a single layer or a plurality of superimposed, contiguous, mutually adhered layers.
摘要:
Metal traces and solder bump pads are formed on a semiconductor substrate by way of a semiconductor template that has been micromachined to receive solder paste material. The solder paste material is then formed into precisely controlled ball shapes and metal trace geometries.
摘要:
The present invention relates to enhanced protection of the active surface and the bond wires or ball array of a microelectronic device, and to thermal management of the microelectronic device as it is packaged with a printed circuit board (PCB) or other substrate. The enhanced protection and thermal management are accomplished with a high-temperature thermal grease that is glob topped or encapsulated over the bond wires or ball array, and the active surface of the microelectronic device. The high-temperature thermal grease exchanges heat, particularly by conduction, away from the active surface of the microelectronic device as well as away from the bond wires.
摘要:
Multiple integrated circuit devices in a stacked configuration that use a spacing element for allowing increased device density and increased thermal conduction or heat removal for semiconductor devices and the methods for the stacking thereof are disclosed.
摘要:
An electrochemical reaction assembly of inducing electrochemical reactions, such as for deposition of materials on semiconductor substrates. The assembly achieves a highly uniform thickness and composition of deposition material or uniform etching or polishing on the semiconductor substrates by retaining the semiconductor substrates on a moving cathode immersed in an appropriate reaction solution wherein a wire mesh anode rotates about the moving cathode during electrochemical reaction.