公开(公告)号：US5408458A

公开(公告)日：1995-04-18

申请号：US92936

申请日：1993-07-19

申请人： Noboru Akiyama

发明人： Noboru Akiyama

IPC分类号： G11B17/04 ,  G11B23/03 ,  G11B3/70

CPC分类号： G11B23/031 ,  G11B17/0436 ,  G11B23/0303 ,  G11B23/0308

摘要： A guide portion is provided in a front edge of a disc cartridge in an insertion direction to a recording and reproducing apparatus, A slider is slidingly engaged with the guide portion. A shutter is fixed to the slider. Head insertion holes and spindle holes formed in the cartridge case are opened or closed by the shutter. A generation of friction or wear chips due to the sliding contact between the shutter and cartridge may be prevented.

摘要翻译： 引导部分沿插入方向设置在盘盒的前边缘到记录和再现装置.A滑块与引导部分滑动接合。 快门固定在滑块上。 形成在盒壳体中的头部插入孔和主轴孔由快门打开或关闭。 可以防止由于快门和暗盒之间的滑动接触而产生的摩擦或磨损碎屑的产生。

公开(公告)号：US5325257A

公开(公告)日：1994-06-28

申请号：US116807

申请日：1993-09-03

申请人： Noboru Akiyama ,  Katsumi Kameda

发明人： Noboru Akiyama ,  Katsumi Kameda

IPC分类号： G11B23/03

CPC分类号： G11B23/0303 ,  G11B23/0307 ,  G11B23/0308 ,  G11B23/0316

摘要： A disk cartridge comprises a case with an upper and a lower shell halves united together to accommodate a disk of 3.5 inches therein, a guide portion, a shutter, and a slider slid in the guide portion of the case for supporting the shutter. The shutter is moved by a drive pin to open and close a head and spindle holes. The slider enables the shutter to move smoothly along the guide portion and prevents the shutter from being disconnected from the guide portion when the case is dropped.

摘要翻译： 磁盘盒包括壳体，其具有联合在一起以容纳其中3.5英寸的盘的上部和下部半部件，引导部分，快门和滑块，其滑动在壳体的用于支撑快门的引导部分中。 快门由驱动销移动以打开和关闭头部和主轴孔。 该滑块使得快门能够沿着引导部分平滑移动，并且防止当壳体掉落时快门与导向部分断开。

公开(公告)号：US5210754A

公开(公告)日：1993-05-11

申请号：US710522

申请日：1991-06-04

申请人： Toshiro Takahashi ,  Takayuki Nakajima ,  Tetsuo Sotome ,  Noboru Akiyama

发明人： Toshiro Takahashi ,  Takayuki Nakajima ,  Tetsuo Sotome ,  Noboru Akiyama

IPC分类号： H04L1/00 ,  H04J3/06 ,  H04L7/00

CPC分类号： H04J3/0608

摘要： An Nth one of N parallel sequences of low-speed data demultiplexed by a demultiplexer from high-speed input data in synchronization with a high-speed clock is compared by N comparators with N parallel sequences of reference patterns. The N parallel sequences of reference patterns are each generated in synchronization with a frequency divided clock obtained by frequency dividing the high-speed clock into 1/N. When any of the comparators provides a disagreement output at least once, one clock pulse is eliminated by a post-clock eliminating circuit from the divided clock so that the N sequences of reference patterns are each delayed by one bit. When a counter detects that any one of the comparators does not provide the disagreement signal for n consecutive bits, the sequence of reference patterns corresponding to this comparator and the Nth sequence of low-speed data are in synchronization with each other. Clock pulses of the number corresponding to the line position of the synchronized sequence of reference patterns are eliminated by a pre-clock eliminating circuit from the high-speed clock which is applied to the demultiplexer. By this, line positions of the N parallel sequences of low-speed data are sequentially shifted so that the Nth sequence of low-speed data assumes the same line position as that of the synchronized reference pattern, and as a result, the N parallel sequences of low-speed data are synchronized with the N parallel sequences of reference patterns, respectively.

公开(公告)号：US5158640A

公开(公告)日：1992-10-27

申请号：US537834

申请日：1990-06-13

申请人： Noboru Akiyama

发明人： Noboru Akiyama

IPC分类号： G11B23/00 ,  G11B23/03

CPC分类号： G11B23/00 ,  G11B23/0326 ,  Y10T156/171 ,  Y10T156/1751 ,  Y10T156/1783

摘要： An apparatus is provided for applying a part, e.g., a guide plate, onto a cartridge. A plurality of two-sided adhesive pieces are provided on a tape and, while each piece is intermittently positioned, a part is attached thereon. The part having an adhesive piece attached to it is then attached to a cartridge. The cartridge is held in a support which is capable of rotating the cartridge upside down to allow a second part to be attached to the other side of the cartridge.

公开(公告)号：US09977090B2

公开(公告)日：2018-05-22

申请号：US14726898

申请日：2015-06-01

申请人： Takanori Yamashita ,  Hirohisa Akita ,  Noboru Akiyama ,  Masataka Okushita

发明人： Takanori Yamashita ,  Hirohisa Akita ,  Noboru Akiyama ,  Masataka Okushita

IPC分类号： G01R31/28 ,  G01R31/36 ,  H01G11/06 ,  H01G11/14 ,  H01G11/80 ,  H01M10/48 ,  H01M10/04 ,  G01R31/12 ,  H01M10/0525

CPC分类号： G01R31/3641 ,  G01R31/025 ,  G01R31/12 ,  G01R31/1263 ,  H01G11/06 ,  H01G11/14 ,  H01G11/20 ,  H01G11/80 ,  H01G11/82 ,  H01M10/04 ,  H01M10/0525 ,  H01M10/48 ,  Y02E60/13 ,  Y10T29/49004

摘要： Disclosed is a method for manufacturing an electrochemical cell, wherein an insulation failure product can be accurately rejected, and an electrochemical cell can be used again after the insulation failure inspection. In the method for manufacturing the electrochemical cell (1), which is configured by hermetically housing an electrochemical cell main body (20) such that the leading end of a metal terminal (21) protrudes to the outside of the outer housing (10), an impulse voltage is applied between the metal terminal (21) and a metal foil layer (12), the waveform of the voltage applied to the capacitance between the metal terminal (21) and the metal foil layer (12) is measured, and the insulation failure inspection step is performed.

公开(公告)号：US20120186071A1

公开(公告)日：2012-07-26

申请号：US13498953

申请日：2010-09-29

申请人： Takanori Yamashita ,  Hirohisa Akita ,  Noboru Akiyama ,  Masataka Okushita

发明人： Takanori Yamashita ,  Hirohisa Akita ,  Noboru Akiyama ,  Masataka Okushita

IPC分类号： G01R31/28 ,  G01R31/36 ,  G01R31/12

CPC分类号： G01R31/3641 ,  G01R31/025 ,  G01R31/12 ,  G01R31/1263 ,  H01G11/06 ,  H01G11/14 ,  H01G11/20 ,  H01G11/80 ,  H01G11/82 ,  H01M10/04 ,  H01M10/0525 ,  H01M10/48 ,  Y02E60/13 ,  Y10T29/49004

摘要： Disclosed is a method for manufacturing an electrochemical cell, wherein an insulation failure product can be accurately rejected, and an electrochemical cell can be used again after the insulation failure inspection. In the method for manufacturing the electrochemical cell (1), which is configured by hermetically housing an electrochemical cell main body (20) such that the leading end of a metal terminal (21) protrudes to the outside of the outer housing (10), an impulse voltage is applied between the metal terminal (21) and a metal foil layer (12), the waveform of the voltage applied to the capacitance between the metal terminal (21) and the metal foil layer (12) is measured, and the insulation failure inspection step is performed.

摘要翻译： 公开了一种用于制造电化学电池的方法，其中可以准确地拒绝绝缘破坏产物，并且可以在绝缘故障检查之后再次使用电化学电池。 在通过气密地容纳电化学电池主体（20）构成的电化学电池（1）的制造方法中，金属端子（21）的前端突出到外壳（10）的外部， 在金属端子（21）和金属箔层（12）之间施加脉冲电压，测量施加在金属端子（21）与金属箔层（12）之间的电容的电压的波形， 进行绝缘故障检查步骤。

公开(公告)号：US20110037450A1

公开(公告)日：2011-02-17

申请号：US12912796

申请日：2010-10-27

申请人： Masaki Shiraishi ,  Noboru Akiyama ,  Tomoaki Uno ,  Nobuyoshi Matsuura

发明人： Masaki Shiraishi ,  Noboru Akiyama ,  Tomoaki Uno ,  Nobuyoshi Matsuura

IPC分类号： G05F3/24

CPC分类号： G05F3/08 ,  H01L23/3107 ,  H01L23/4824 ,  H01L23/49551 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L25/16 ,  H01L29/1095 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/41766 ,  H01L29/4238 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7835 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/371 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49431 ,  H01L2224/73221 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2224/85375 ,  H01L2924/01002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01059 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12032 ,  H01L2924/12036 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H02M7/003 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： In order to reduce parasitic inductance of a main circuit in a power supply circuit, a non-insulated DC-DC converter is provided including a circuit in which a power MOS•FET for a high-side switch and a power MOS•FET for a low-side switch are connected in series. In the non-insulated DC-DC converter, the power MOS•FET for the high-side switch is formed by a p-channel vertical MOS•FET, and the power MOS•FET for the low-side switch is formed by an n channel vertical MOS•FET. Thus, a semiconductor chip formed with the power MOSFET for the high-side switch and a semiconductor chip formed with the power MOS•FET for the low-side switch are mounted over the same die pad and electrically connected to each other through the die pad.

摘要翻译： 为了减少电源电路中的主电路的寄生电感，提供了一种非绝缘DC-DC转换器，其包括其中用于高侧开关的功率MOS•FET和功率MOS•FET用于 低侧开关串联连接。 在非绝缘DC-DC转换器中，高侧开关的功率MOS•FET由p沟道垂直MOS•FET形成，而低边开关的功率MOS•FET由n形成 通道垂直MOS•FET。 因此，形成有用于高侧开关的功率MOSFET的半导体芯片和形成有用于低侧开关的功率MOS•FET的半导体芯片安装在相同的芯片焊盘上并通过芯片焊盘彼此电连接 。

公开(公告)号：US07852651B2

公开(公告)日：2010-12-14

申请号：US12430972

申请日：2009-04-28

申请人： Masaki Shiraishi ,  Noboru Akiyama ,  Tomoaki Uno ,  Nobuyoshi Matsuura

发明人： Masaki Shiraishi ,  Noboru Akiyama ,  Tomoaki Uno ,  Nobuyoshi Matsuura

IPC分类号： H02M1/00 ,  H01L23/48 ,  H05K7/02

CPC分类号： G05F3/08 ,  H01L23/3107 ,  H01L23/4824 ,  H01L23/49551 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L25/16 ,  H01L29/1095 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/41766 ,  H01L29/4238 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7835 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/371 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49431 ,  H01L2224/73221 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2224/85375 ,  H01L2924/01002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01059 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12032 ,  H01L2924/12036 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H02M7/003 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： The object of the present invention is to reduce parasitic inductance of a main circuit in a power supply circuit. The present invention provides a non-insulated DC-DC converter having a circuit in which a power MOS•FET for a high-side switch and a power MOS•FET for a low-side switch are connected in series. In the non-insulated DC-DC converter, the power MOS•FET for the high-side switch is formed by a p channel vertical MOS•FET, and the power MOS•FET for the low-side switch is formed by an n channel vertical MOS•FET. Thus, a semiconductor chip formed with the power MOS•FET for the high-side switch and a semiconductor chip formed with the power MOS•FET for the low-side switch are mounted over the same die pad and electrically connected to each other through the die pad.

摘要翻译： 本发明的目的是减少电源电路中的主电路的寄生电感。 本发明提供了一种非绝缘DC-DC转换器，其具有用于高侧开关的功率MOS•FET和低侧开关的功率MOS•FET串联连接的电路。 在非绝缘DC-DC转换器中，高侧开关的功率MOS•FET由ap沟道垂直MOS•FET形成，低边开关功率MOS•FET由n沟道垂直 MOS•FET。 因此，形成有用于高侧开关的功率MOS·FET的半导体芯片和形成有用于低侧开关的功率MOS·FET的半导体芯片安装在相同的芯片焊盘上，并且通过 芯片垫

公开(公告)号：US07598605B2

公开(公告)日：2009-10-06

申请号：US11495585

申请日：2006-07-31

申请人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

发明人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

IPC分类号： H01L23/24 ,  H01L23/02 ,  H01L23/28 ,  H05K7/02

CPC分类号： H01L23/3107 ,  H01L23/3121 ,  H01L23/48 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/162 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/16265 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/49175 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12036 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A primary side circuit and a secondary side circuit are provided on first and second semiconductor substrates, respectively. A first capacitive insulator on the first substrate electrically insulates and isolates between the primary and secondary side circuits while permitting signal transmission between these circuits. A second capacitive insulator on the second semiconductor substrate electrically isolates the primary and secondary side circuit while permitting signal transmission therebetween. First and second frames are provided for input and output of signals to and from the primary and secondary side circuits. External electrodes of the first and second capacitive insulators are connected together by a third lead frame via a conductive adhesive body including more than one solder ball. The first and second substrates and the lead frames are sealed by a dielectric resin.

摘要翻译： 初级侧电路和次级侧电路分别设置在第一和第二半导体衬底上。 第一基板上的第一电容绝缘体在允许这些电路之间的信号传输的同时在一次侧电路和次侧电路之间电绝缘和隔离。 第二半导体衬底上的第二电容绝缘体电隔离初级和次级侧电路，同时允许它们之间的信号传输。 第一和第二帧被提供用于输入和输出到主电路和次级侧电路的信号。 第一和第二电容性绝缘体的外部电极通过包括多于一个焊球的导电粘合体由第三引线框架连接在一起。 第一和第二基板和引线框由绝缘树脂密封。

公开(公告)号：US07091588B2

公开(公告)日：2006-08-15

申请号：US11024680

申请日：2004-12-30

申请人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

发明人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

IPC分类号： H01L23/02 ,  H01L23/34 ,  H01L23/28 ,  H01L22/16 ,  H05K7/02

CPC分类号： H01L23/3107 ,  H01L23/3121 ,  H01L23/48 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/162 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/16265 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/49175 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12036 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A primary side circuit and a secondary side circuit are provided on first and second semiconductor substrates, respectively. A first capacitive insulator on the first substrate electrically insulates and isolates between the primary and secondary side circuits while permitting signal transmission between these circuits. A second capacitive insulator on the second semiconductor substrate electrically isolates the primary and secondary side circuit while permitting signal transmission therebetween. First and second frames are provided for input and output of signals to and from the primary and secondary side circuits. External electrodes of the first and second capacitive insulators are connected together by a third lead frame via a conductive adhesive body including more than one solder ball. The first and second substrates and the lead frames are sealed by a dielectric resin.

摘要翻译： 初级侧电路和次级侧电路分别设置在第一和第二半导体衬底上。 第一基板上的第一电容绝缘体在允许这些电路之间的信号传输的同时在一次侧电路和次侧电路之间电绝缘和隔离。 第二半导体衬底上的第二电容绝缘体电隔离初级和次级侧电路，同时允许它们之间的信号传输。 第一和第二帧被提供用于输入和输出到主电路和次级侧电路的信号。 第一和第二电容性绝缘体的外部电极通过包括多于一个焊球的导电粘合体由第三引线框架连接在一起。 第一和第二基板和引线框由绝缘树脂密封。