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    METHOD TO PRESERVE THE CRITICAL DIMENSION (CD) OF AN INTERCONNECT STRUCTURE
    84.
    发明申请
    METHOD TO PRESERVE THE CRITICAL DIMENSION (CD) OF AN INTERCONNECT STRUCTURE 审中-公开
    保持互连结构的关键尺寸（CD）的方法

    公开(公告)号：US20100285667A1

    公开(公告)日：2010-11-11

    申请号：US12436459

    申请日：2009-05-06

    申请人： Griselda Bonilla ,  Satyanarayana V. Nitta ,  Terry A. Spooner

    发明人： Griselda Bonilla ,  Satyanarayana V. Nitta ,  Terry A. Spooner

    IPC分类号： H01L21/302

    CPC分类号： H01L21/3105 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76831 ,  H01L21/76835 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of restoring the dielectric constant, loss and leakage of an exposed surface of a low k dielectric material caused during dry etching of the low k dielectric material prior to the removal of the damaged layer by wet etch chemistries is provided. Once restored, the surface of the dielectric material will no longer be susceptible to removal by the highly anisotropic wet etching process. However, the wet etch will still pose an advantage as it can remove any etch/ash residues at the bottom of a feature formed into the low k dielectric material.

    摘要翻译： 提供了一种在通过湿蚀刻化学去除损伤层之前，在低k电介质材料的干蚀刻期间恢复低k电介质材料的暴露表面的介电常数，损耗和泄漏的方法。 一旦恢复，电介质材料的表面将不再易于被高度各向异性的湿法蚀刻工艺去除。 然而，湿式蚀刻仍将具有优势，因为它可以去除形成在低k电介质材料中的特征底部的任何蚀刻/灰渣。

    INTERCONNECT STRUCTURES WITH PARTIALLY SELF ALIGNED VIAS AND METHODS TO PRODUCE SAME
    88.
    发明申请
    INTERCONNECT STRUCTURES WITH PARTIALLY SELF ALIGNED VIAS AND METHODS TO PRODUCE SAME 审中-公开
    具有部分自对准VIAS的互连结构及其生产方法

    公开(公告)号：US20090200683A1

    公开(公告)日：2009-08-13

    申请号：US12030756

    申请日：2008-02-13

    申请人： Matthew Earl Colburn ,  Nicholas C. Fuller ,  Elbert Huang ,  Satyanarayana V. Nitta

    发明人： Matthew Earl Colburn ,  Nicholas C. Fuller ,  Elbert Huang ,  Satyanarayana V. Nitta

    IPC分类号： H01L23/48 ,  H01L21/4763

    CPC分类号： H01L21/76811 ,  H01L21/76813

    摘要： An interconnect structure having partially self aligned vias with an interlayer dielectric layer on a substrate, containing at least two conducting metal lines that traverse parallel to the substrate and at least two conducting metal vias that are orthogonal to the substrate. A method of producing the self aligned vias by depositing an interlayer dielectric layer onto a substrate, depositing at least one hardmask onto the interlayer dielectric layer, lithographically forming a via pattern with elongated via features and lithographically forming a line pattern in either order, then either transferring the line patterns first into the interlayer dielectric layer forming line features or transferring the via pattern first into the interlayer dielectric layer as long as the patterns overlap to forming self aligned via features, depositing conducting metals and filling regions corresponding to the line and via features, and planarizing and removing excess metal from the line and via features.

    摘要翻译： 具有部分自对准的通孔的互连结构，其中在衬底上具有层间电介质层，其包含至少两条横穿平行于衬底的导电金属线和至少两个与衬底正交的导电金属通孔。 一种通过在衬底上沉积层间电介质层来生产自对准通孔的方法，将至少一个硬掩模沉积到层间电介质层上，以光刻方式形成具有细长通孔特征的通孔图案，并以任何顺序光刻形成线图案，然后 只要图案重叠以形成自对准的通孔特征，沉积导电金属和对应于该线的通孔特征的填充区域，首先将线图案首先转移到层间介质层形成线的特征中或者将该通孔图案转移到层间电介质层中 并且从线和通孔特征平坦化和去除多余的金属。

    Nonlithographic method to produce masks by selective reaction, articles produced, and composition for same
    89.
    发明授权
    Nonlithographic method to produce masks by selective reaction, articles produced, and composition for same 失效
    通过选择性反应制备掩模的非光刻方法，制备的制品和用于其的组合物

    公开(公告)号：US07485341B2

    公开(公告)日：2009-02-03

    申请号：US10421306

    申请日：2003-04-23

    申请人： Matthew E Colburn ,  Stephen M Gates ,  Jeffrey C Hedrick ,  Elbert Huang ,  Satyanarayana V Nitta ,  Sampath Purushothaman ,  Muthumanickam Sankarapandian

    发明人： Matthew E Colburn ,  Stephen M Gates ,  Jeffrey C Hedrick ,  Elbert Huang ,  Satyanarayana V Nitta ,  Sampath Purushothaman ,  Muthumanickam Sankarapandian

    IPC分类号： B05D1/32

    CPC分类号： H01L21/76849 ,  B82Y30/00 ,  G03F7/165 ,  H01L21/0331 ,  H01L21/31058 ,  H05K3/0079 ,  Y10T428/24802 ,  Y10T428/24917 ,  Y10T428/24926

    摘要： A method for forming a self aligned pattern on an existing pattern on a substrate comprising applying a coating of the masking material to the substrate; and allowing at least a portion of the masking material to preferentially attach to portions of the existing pattern. The pattern is comprised of a first set of regions of the substrate having a first atomic composition and a second set of regions of the substrate having a second atomic composition different from the first composition. The first set of regions may include one or more metal elements and the second set of regions may include a dielectric. The masking material may comprise a polymer containing a reactive grafting site that selectively binds to the portions of the pattern. The masking material may include a polymer that binds to the portions of the pattern to provide a layer of functional groups suitable for polymerization initiation, a reactive molecule having functional groups suitable for polymerization propagation, or a reactive molecule, wherein reaction of the reactive molecule with the portion of the pattern generates a layer having reactive groups, which participate in step growth polymerization. Structures in accordance with the method. Compositions for practicing the method.

    摘要翻译： 一种用于在衬底上的现有图案上形成自对准图案的方法，包括将掩模材料的涂层施加到衬底上; 并且允许掩模材料的至少一部分优先地附着到现有图案的部分上。 该图案由具有第一原子组成的基底的第一组区域和具有不同于第一组成的第二原子组成的基底的第二组区域组成。 第一组区域可以包括一个或多个金属元件，并且第二组区域可以包括电介质。 掩模材料可以包含含有选择性结合图案部分的反应性接枝位点的聚合物。 掩蔽材料可以包括聚合物，其结合图案的部分以提供适于聚合起始的官能团层，具有适用于聚合扩展的官能团的反应性分子或反应性分子，其中反应性分子与 图案的部分产生具有反应性基团的层，其参与步骤生长聚合。 结构按照方法。 组合练习方法。