Method of forming button-type batteries
    81.
    发明授权
    Method of forming button-type batteries 失效
    形成钮扣型电池的方法

    公开(公告)号:US5494495A

    公开(公告)日:1996-02-27

    申请号:US321251

    申请日:1994-10-11

    申请人: Mark E. Tuttle

    发明人: Mark E. Tuttle

    IPC分类号: H01M2/02 H01M6/18 H01M6/02

    摘要: A method of forming a button-type battery includes: a) providing a sheet of cathode material bonded to solid electrolyte material; b) cutting the cathode material and solid electrolyte material from the sheet into a plurality of composite cathode/solid electrolyte pieces which are individually sized and shaped to constitute the electrolyte and cathode components of a single button-type battery; c) providing a pair of first and second terminal housing members in facing juxtaposition to one another, the first and second terminal housing members having respective peripheries; d) providing one of the composite cathode/electrolyte pieces intermediate the juxtaposed first and second terminal housing members; e) providing an anode intermediate the juxtaposed first and second terminal housing members, the anode being positioned to electrically connect with one of the first or second terminal housing members and the solid electrolyte, and the cathode being positioned to electrically connect with the other of the first or second terminal housing members; f) providing electrically insulative sealing gasket material intermediate the first and second terminal housing member peripheries; and g) crimping the first and second terminal housing member peripheries together into an enclosed dry battery housing with the gasket material being interposed between the first and second terminal housing members to provide a fluid-tight seal and to provide electrical insulation therebetween. A button-type battery is also disclosed.

    摘要翻译: 形成钮扣型电池的方法包括:a)提供与固体电解质材料结合的阴极材料片; b)将阴极材料和固体电解质材料从片材切割成多个复合阴极/固体电解质片,其分别尺寸和形状以构成单键型电池的电解质和阴极组分; c)提供一对彼此并置的第一和第二端子壳体构件,所述第一和第二端子壳体构件具有相应的周边; d)在并置的第一和第二端子壳体构件之间提供复合阴极/电解质片之一; e)在并置的第一和第二端子壳体构件之间提供阳极,阳极被定位成与第一或第二端子壳体构件和固体电解质中的一个电连接,并且阴极被定位成与另一个 第一或第二终端壳体构件; f)在第一和第二端子壳体构件周围的中间设置电绝缘密封垫片材料; 以及g)将所述第一和第二端子壳体构件周边卷绕在一起成为封闭的干式电池壳体,所述垫圈材料插入在所述第一和第二端子壳体构件之间,以提供流体密封并在其间提供电绝缘。 还公开了纽扣式电池。

    Polishing pad
    84.
    发明授权
    Polishing pad 失效
    抛光垫

    公开(公告)号:US5177908A

    公开(公告)日:1993-01-12

    申请号:US468348

    申请日:1990-01-22

    申请人: Mark E. Tuttle

    发明人: Mark E. Tuttle

    摘要: A polishing pad for semiconductor wafers, having a face shaped to provide a constant, or nearly constant, surface contact rate to a workpiece such as a semiconductor wafer, in order to effect improved planarity of the workpiece. The favored face shape is a sunburst pattern having nontapered rays, coaxial with the pad's rotation.

    摘要翻译: 一种用于半导体晶片的抛光垫,具有为了提高工件的平坦度提供与工件(例如半导体晶片)恒定或接近恒定的表面接触速率的表面。 喜欢的脸型是具有无铅射线的日射图案,与垫的旋转同轴。

    Process for metallizing integrated circuits with
electrolytically-deposited copper
    85.
    发明授权
    Process for metallizing integrated circuits with electrolytically-deposited copper 失效
    用电沉积铜金属化集成电路的工艺

    公开(公告)号:US5151168A

    公开(公告)日:1992-09-29

    申请号:US587302

    申请日:1990-09-24

    IPC分类号: H01L21/288 H01L21/768

    摘要: A masked, conformal electrodeposition process for copper metallization of integrated circuits. The process is considerably less complex than other metallization processes utilizing electrodeposition, and provides excellent step coverage for sub-micron contact openings. Full-step coverage has been obtained with the process for contact openings as small as 0.5 microns in diameter. The process begins with the blanket sputter or LPCVD deposition of a thin conductive barrier layer of a material such as titanium nitride, titanium-tungsten or nitrided titanium-tungsten. A photoresist reverse image of the maskwork that normally would be used to etch the metallization pattern on the circuitry is created on the wafer on top of the barrier layer. As an option, the reverse image of the desired metallization pattern may be created by etching a dielectric material layer such as silicon dioxide or silicon nitride, using a photoresist reverse image as a template. The wafer is then transferred to an electrolytic bath, preferably with a pH of 13.5, in which copper is complexed with EDTA molecules. Metallic copper is deposited on the barrier layer where it is not covered by photoresist. At current densities of less than 1 milliamp/cm.sup.2, the process will automatically fill contact/via openings to a uniform thickness which is independent of the depth of the opening. Following electrodeposition of the metallization layer to the desired thickness, the wafer is removed from the bath, and the photoresist or dielectric material reverse-pattern mask is stripped. At this point, an optional corrosion-resistant metal layer may be galvanically plated on the surface of the copper layer. Finally, portions of the barrier layer that were exposed by removal of the resist are then removed with either a wet or a dry etch.

    摘要翻译: 用于集成电路铜金属化的掩蔽的共形电沉积工艺。 该方法比使用电沉积的其它金属化方法复杂得多,并且为亚微米接触开口提供优异的台阶覆盖。 通过直径为0.5微米的接触开口的过程已经获得了全面的覆盖。 该过程开始于覆盖溅射或LPCVD沉积诸如氮化钛,钛 - 钨或氮化钛 - 钨的材料的薄导电阻挡层。 通常将用于蚀刻电路上的金属化图案的掩模的光致抗蚀剂反转图像在阻挡层顶部上的晶片上产生。 作为选择,可以通过使用光致抗蚀剂反向图像作为模板通过蚀刻诸如二氧化硅或氮化硅的介电材料层来产生所需金属化图案的反向图像。 然后将晶片转移到电解浴中,优选pH为13.5,其中铜与EDTA分子络合。 金属铜沉积在阻挡层上,未被光致抗蚀剂覆盖。 在小于1毫安/ cm2的电流密度下,该过程将自动地将接触/通孔开口填充到与开口深度无关的均匀厚度。 在将金属化层电沉积到所需厚度之后,将晶片从浴中移除,并且剥离光致抗蚀剂或介电材料反向图案掩模。 此时,可选的耐腐蚀金属层可以电镀在铜层的表面上。 最后,用湿法或干法蚀刻除去通过去除抗蚀剂而暴露的部分阻挡层。

    SEMICONDUCTOR DEVICE STRUCTURES
    88.
    发明申请
    SEMICONDUCTOR DEVICE STRUCTURES 有权
    半导体器件结构

    公开(公告)号:US20120313248A1

    公开(公告)日:2012-12-13

    申请号:US13590991

    申请日:2012-08-21

    申请人: Mark E. Tuttle

    发明人: Mark E. Tuttle

    IPC分类号: H01L23/48

    摘要: The present invention relates to methods for forming through-wafer interconnects in semiconductor substrates and the resulting structures. In one embodiment, a method for forming a through-wafer interconnect includes providing a substrate having a pad on a surface thereof, depositing a passivation layer over the pad and the surface of the substrate, and forming an aperture through the passivation layer and the pad using a substantially continuous process. An insulative layer is deposited in the aperture followed by a conductive layer and a conductive fill. In another embodiment of the invention, a semiconductor device is formed including a first interconnect structure that extends through a conductive pad and is electrically coupled with the conductive pad while a second interconnect structure is formed through another conductive pad while being electrically isolated therefrom. Semiconductor devices and assemblies produced with the methods are also disclosed.

    摘要翻译: 本发明涉及在半导体衬底中形成贯穿晶片互连的方法以及所得到的结构。 在一个实施例中,用于形成贯通晶片互连的方法包括提供在其表面上具有焊盘的衬底,在焊盘和衬底的表面上沉积钝化层,以及通过钝化层和焊盘形成孔 使用基本上连续的过程。 绝缘层沉积在孔中,随后是导电层和导电填料。 在本发明的另一实施例中,形成半导体器件,其包括延伸穿过导电焊盘并与导电焊盘电耦合的第一互连结构,而第二互连结构通过另一个导电焊盘形成,同时与之电绝缘。 还公开了使用该方法制造的半导体器件和组件。

    RFID interrogator with adjustable signal characteristics
    89.
    发明授权
    RFID interrogator with adjustable signal characteristics 失效
    RFID询问器具有可调信号特性

    公开(公告)号:US08179232B2

    公开(公告)日:2012-05-15

    申请号:US12115156

    申请日:2008-05-05

    申请人: Mark E. Tuttle

    发明人: Mark E. Tuttle

    IPC分类号: H04Q5/22

    摘要: A radio frequency identification (RFID) interrogator housed in a portable platform that includes at least one antenna, a transceiver for transmitting and receiving a radio frequency (RF) signal through the antenna, and a controller in communication with the transceiver for adjusting power and direction of the transmitted RF signal. The controller can be configured to adjust the antenna orientation, and can also selectively activate and deactivate one or more antennas.

    摘要翻译: 容纳在便携式平台中的射频识别(RFID)询问器,其包括至少一个天线,用于通过天线发送和接收射频(RF)信号的收发器,以及与收发器通信的控制器,用于调整功率和方向 的发射RF信号。 控制器可以被配置为调整天线方向,并且还可以选择性地激活和去激活一个或多个天线。