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115 条记录 (耗时 0.036 秒)

    On-Chip RF Shields with Through Substrate Conductors
    84.
    发明申请
    On-Chip RF Shields with Through Substrate Conductors 有权
    带有基板导体的片上RF屏蔽

    公开(公告)号：US20100078771A1

    公开(公告)日：2010-04-01

    申请号：US12242521

    申请日：2008-09-30

    申请人： Hans-Joachim Barth ,  Jens Pohl ,  Gottfried Beer ,  Oliver Nagy

    发明人： Hans-Joachim Barth ,  Jens Pohl ,  Gottfried Beer ,  Oliver Nagy

    IPC分类号： H01L23/552 ,  H01L21/44

    CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L23/552 ,  H01L23/585 ,  H01L23/66 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Structures of a system on chip and methods of forming a system on chip are disclosed. In one embodiment, the system on a chip includes an RF component disposed on a first part of a substrate, a semiconductor component disposed on a second part of the substrate, the semiconductor component and the RF component sharing a common boundary. The system on chip further includes through substrate conductors disposed in the substrate, the through substrate conductors coupled to a ground potential node, the through substrate conductors disposed around the RF component forming a fence around the RF circuit.

    摘要翻译： 公开了一种片上系统的结构以及片上系统的形成方法。 在一个实施例中，芯片上的系统包括设置在基板的第一部分上的RF部件，设置在基板的第二部分上的半导体部件，共享公共边界的半导体部件和RF部件。 芯片上的系统还包括通过设置在基板中的基板导体，连接到地电位节点的贯穿基板导体，围绕RF元件设置的贯穿基板导体，围绕RF电路形成围栏。

    CORRESPONDING CAPACITOR ARRANGEMENT AND METHOD FOR MAKING THE SAME
    85.
    发明申请
    CORRESPONDING CAPACITOR ARRANGEMENT AND METHOD FOR MAKING THE SAME 有权
    相应的电容器布置及其制造方法

    公开(公告)号：US20100001373A1

    公开(公告)日：2010-01-07

    申请号：US12562460

    申请日：2009-09-18

    申请人： Hans-Joachim Barth ,  Helmut Tews

    发明人： Hans-Joachim Barth ,  Helmut Tews

    IPC分类号： H01L29/92 ,  H01L21/02

    CPC分类号： H01L23/5223 ,  H01L27/0805 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The invention relates to a method for producing a capacitor arrangement, and to a corresponding capacitor arrangement, wherein the first insulating layer is formed at the surface of a carrier substrate and a first capacitor electrode with a multiplicity of interspaced first interconnects is produced in said insulating layer. Using a mask layer, partial regions of the first insulating layer are removed for the purpose of uncovering the multiplicity of first interconnects, and after the formation of a capacitor dielectric at the surface of the uncovered first interconnects, a second capacitor electrode is formed with a multiplicity of interspaced second interconnects lying between the first interconnects coated with capacitor dielectric. This additionally simplified production method enables self-aligning and cost-effective production of capacitors having a high capacitance per unit area and mechanical stability.

    摘要翻译： 本发明涉及一种用于制造电容器装置的方法和相应的电容器装置，其中第一绝缘层形成在载体衬底的表面，并且在所述绝缘体中产生具有多个间隔第一互连的第一电容器电极 层。 使用掩模层，为了揭露多个第一互连的目的，除去第一绝缘层的部分区域，并且在未覆盖的第一互连件的表面上形成电容器电介质之后，形成第二电容器电极 位于涂覆有电容器电介质的第一互连之间的间隔第二互连的多重性。 这种另外简化的制造方法能够实现具有每单位面积的高电容和机械稳定性的电容器的自对准和成本有效的生产。

    Barrier Layers for Conductive Features
    86.
    发明申请
    Barrier Layers for Conductive Features 有权
    导电特性的阻挡层

    公开(公告)号：US20090029108A1

    公开(公告)日：2009-01-29

    申请号：US12243008

    申请日：2008-10-01

    申请人： Hans-Joachim Barth ,  Juergen Holz

    发明人： Hans-Joachim Barth ,  Juergen Holz

    IPC分类号： B32B3/00

    CPC分类号： H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76873 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L2221/1089 ,  H01L2924/0002 ,  Y10T428/24479 ,  H01L2924/00

    摘要： Barrier layers for conductive features and methods of formation thereof are disclosed. A first barrier material is deposited on top surfaces of an insulating material, and a second barrier material is deposited on sidewalls of the insulating material, wherein the second barrier material is different than the first barrier material. The first barrier material induces grain growth of a subsequently deposited conductive material at a first rate, and the second barrier material induces grain growth of the conductive material at a second rate, wherein the second rate is slower than the first rate.

    摘要翻译： 公开了用于导电特征的阻挡层及其形成方法。 第一阻挡材料沉积在绝缘材料的顶表面上，并且第二阻挡材料沉积在绝缘材料的侧壁上，其中第二阻挡材料不同于第一阻挡材料。 第一阻挡材料以第一速率诱导随后沉积的导电材料的晶粒生长，并且第二阻挡材料以第二速率诱导导电材料的晶粒生长，其中第二速率比第一速率慢。

    Method for production of thin metal-containing layers having low electrical resistance
    89.
    发明申请
    Method for production of thin metal-containing layers having low electrical resistance 审中-公开
    用于生产具有低电阻的薄金属层的方法

    公开(公告)号：US20060005902A1

    公开(公告)日：2006-01-12

    申请号：US10512016

    申请日：2003-04-10

    申请人： Hans-Joachim Barth ,  Helmut Tews

    发明人： Hans-Joachim Barth ,  Helmut Tews

    IPC分类号： C22F1/00

    CPC分类号： H01L21/76886

    摘要： The invention relates to a method for fabricating thin metal-containing layers (5C) having low electrical resistance, firstly a metal-containing starting layer (5A) having a first grain size being formed on a carrier material (2). Afterwards, a locally delimited thermal region (W) is produced and moved in the metal-containing starting layer (5A) in such a way that a recrystallization of the metal-containing starting layer (5A) is carried out for the purpose of producing the metal-containing layer (5C) having a second grain size, which is enlarged with respect to the first grain size. A metal-containing layer having improved electrical properties is obtained in this way.

    摘要翻译： 本发明涉及一种用于制造具有低电阻的薄金属层（5C）的方法，首先在载体材料（2）上形成具有第一晶粒尺寸的含金属的起始层（5A）。 然后，在含金属的起始层（5A）中产生局部限制的热区（W）并移动，使得含金属的起始层（5A）的再结晶进行为 制备具有第二晶粒尺寸的含金属层（5 C），其相对于第一晶粒尺寸扩大。 以这种方式获得具有改善的电性能的含金属层。

    Method of preparing a self-passivating Cu laser fuse
    90.
    发明授权
    Method of preparing a self-passivating Cu laser fuse 失效
    制备自钝化铜激光熔丝的方法

    公开(公告)号：US06844245B2

    公开(公告)日：2005-01-18

    申请号：US10745263

    申请日：2003-12-23

    申请人： Hans-Joachim Barth

    发明人： Hans-Joachim Barth

    IPC分类号： H01L23/52 ,  H01L21/3205 ,  H01L21/82 ,  H01L23/525 ,  H01L21/326 ,  H01L21/479

    CPC分类号： H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of forming a semiconductor device, such as a self-passivating fuse, includes patterning an opening in a dielectric to form a fuse. A seed-layer of a copper-alloy is deposited in the opening and the opening is filled with pure copper. The copper is planarized and a passivation layer is deposited. This passivation layer can be thinned over a fuse portion of the copper. The fuse portion can then be laser fused to form a crater in an area surrounding a blown copper fuse. Exposed portions of the pure copper can then be self-passivated by annealing the device.

    摘要翻译： 形成诸如自钝化保险丝的半导体器件的方法包括图案化电介质中的开口以形成熔丝。 铜合金的种子层沉积在开口中，开口填充有纯铜。 铜被平坦化并且沉积钝化层。 该钝化层可以在铜的熔丝部分上变薄。 然后可以将熔丝部分激光熔合以在围绕熔断的铜熔丝的区域中形成一个凹坑。 纯铜的暴露部分然后可以通过退火器件而自钝化。