Simultaneous and Selective Partitioning of Via Structures Using Plating Resist
    84.
    发明申请
    Simultaneous and Selective Partitioning of Via Structures Using Plating Resist 有权
    使用电镀抗蚀剂的通孔结构的同时选择性分区

    公开(公告)号:US20090288874A1

    公开(公告)日:2009-11-26

    申请号:US12483223

    申请日:2009-06-11

    Abstract: Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the PCB stackup through conductive layers, dielelectric layers and through the plating resist. Thus, the PCB panel has multiple through-holes that can then be plated simultaneously by placing the PCB panel into a seed bath, followed by immersion in an electroless copper bath. Such partitioned vias increase wiring density and limit stub formation in via structures. Such partitioned vias allow a plurality of electrical signals to traverse each electrically isolated portion without interference from each other.

    Abstract translation: 公开了通过在PCB堆叠中使用电镀抗蚀剂将多个通孔结构同时分隔成电隔离部分的系统和方法。 通过在子复合结构中的一个或多个位置选择性地沉积电镀抗蚀剂来制造这种通孔结构。 具有在不同位置沉积的电镀抗蚀剂的多个亚复合结构层压以形成期望的PCB设计的PCB堆叠。 通过导电层,电介质层和电镀抗蚀剂在PCB堆叠中钻出通孔。 因此,PCB面板具有多个通孔,然后可以通过将PCB面板放置在种子池中,然后浸入无电解铜浴中而同时进行电镀。 这种分隔的通孔增加布线密度并限制通孔结构中的短截线形成。 这种分隔的通孔允许多个电信号穿过每个电隔离部分而没有彼此的干扰。

    ESD protection devices and methods of making same using standard manufacturing processes
    86.
    发明授权
    ESD protection devices and methods of making same using standard manufacturing processes 失效
    ESD保护装置以及使用标准制造工艺制造其的方法

    公开(公告)号:US07417194B2

    公开(公告)日:2008-08-26

    申请号:US10875372

    申请日:2004-06-24

    Inventor: Karen P. Shrier

    Abstract: Devices capable of protecting electronic components during the occurrence of a disturbance event using printed circuit board manufacturing techniques. A three (3) layer structure is formed comprising a polymer-based formulation sandwiched between two electrode layers. The devices can be manufactured in panel form providing high quantities of devices which can be removed from the panel and applied directly to the component to be protected. Desired patterns can be formed on either one of the electrode layers by photo-etch techniques thereby providing a process that can be tailored to a large number of applications.

    Abstract translation: 在使用印刷电路板制造技术的干扰事件发生期间能够保护电子部件的装置。 形成三(3)层结构,其包含夹在两个电极层之间的聚合物基配方。 这些装置可以以面板形式制造,提供大量的装置,其可以从面板上移除并直接施加到待保护的部件上。 期望的图案可以通过光蚀刻技术形成在任一个电极层上,从而提供可以针对大量应用而定制的工艺。

    Voltage variable substrate material
    87.
    发明授权
    Voltage variable substrate material 有权
    电压可变基板材料

    公开(公告)号:US07258819B2

    公开(公告)日:2007-08-21

    申请号:US09976964

    申请日:2001-10-11

    Abstract: The present invention provides an improved voltage variable material (“VVM”). More specifically, the present invention provides an improved printed circuit board substrate, an improved device having circuit protection an improved data communications cable having circuit protection and a method for mass producing devices employing the VVM substrate of the present invention. The VVM substrate eliminates the need for an intermediate daughter or carrier board by impregnating conductive particles and possibly semiconductive and/or insulative particles associated with known volatage variable materials into the varnish or epoxy resin associated with known printed circuit board substrates.

    Abstract translation: 本发明提供一种改进的电压可变材料(“VVM”)。 更具体地,本发明提供一种改进的印刷电路板基板,具有电路保护的改进的装置,具有电路保护的改进的数据通信电缆以及使用本发明的VVM基板的批量生产装置的方法。 VVM基板通过将与已知的挥发性可变材料相关联的导电颗粒和可能的半导体和/或绝缘颗粒浸渍到与已知印刷电路板基底相关联的清漆或环氧树脂中而不需要中间子体或载体板。

    FLEXIBLE CIRCUIT HAVING OVERVOLTAGE PROTECTION
    88.
    发明申请
    FLEXIBLE CIRCUIT HAVING OVERVOLTAGE PROTECTION 有权
    具有过电压保护功能的柔性电路

    公开(公告)号:US20070146941A1

    公开(公告)日:2007-06-28

    申请号:US11679061

    申请日:2007-02-26

    Abstract: A first voltage variable material (“VVM”) includes an insulative binder, first conductive particles with a core and a shell held in the insulating binder and second conductive particles without a shell held in the insulating binder; a second VVM includes an insulating binder, first conductive particles with a core and a shell held in the insulating binder, second conductive particles without a shell held in the insulating binder, and semiconductive particles with a core and a shell held in the insulating binder; a third VVM includes only first conductive particles with a core and a shell held in the insulating binder.

    Abstract translation: 第一电压可变材料(“VVM”)包括绝缘粘合剂,具有芯和保持在绝缘粘合剂中的壳的第一导电颗粒和没有保持在绝缘粘合剂中的壳的第二导电颗粒; 第二VVM包括绝缘粘合剂,具有芯和保持在绝缘粘合剂中的壳的第一导电颗粒,没有保持在绝缘粘合剂中的壳的第二导电颗粒和保持在绝缘粘合剂中的芯和壳的半导体颗粒; 第三VVM仅包括具有芯和保持在绝缘粘合剂中的壳的第一导电颗粒。

    OVERVOLTAGE PROTECTION MATERIALS AND PROCESS FOR PREPARING SAME
    90.
    发明申请
    OVERVOLTAGE PROTECTION MATERIALS AND PROCESS FOR PREPARING SAME 有权
    过电压保护材料及其制备方法

    公开(公告)号:US20070102675A1

    公开(公告)日:2007-05-10

    申请号:US11468736

    申请日:2006-08-30

    Abstract: The invention provides a process for preparing an overvoltage protection material comprising: (i) preparing a mixture comprising a polymer binder precursor and a conductive material; and (ii) heating the mixture to cause reaction of the polymer binder precursor and generate a polymer matrix having conductive material dispersed therein, wherein the polymer binder precursor is chosen such that substantially no solvent is generated during the reaction.

    Abstract translation: 本发明提供一种制备过电压保护材料的方法,包括:(i)制备包含聚合物粘合剂前体和导电材料的混合物; 和(ii)加热混合物以引起聚合物粘合剂前体的反应并产生其中分散有导电材料的聚合物基质,其中选择聚合物粘合剂前体使得在反应期间基本上不产生溶剂。

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