公开(公告)号：US08385080B2

公开(公告)日：2013-02-26

申请号：US13006692

申请日：2011-01-14

Applicant: Jung-Hoon Kim ,  Seong-Chan Han ,  Dong-Chun Lee ,  Jae-Hoon Choi ,  Sun-Kyu Hwang

Inventor： Jung-Hoon Kim ,  Seong-Chan Han ,  Dong-Chun Lee ,  Jae-Hoon Choi ,  Sun-Kyu Hwang

IPC: H05K7/00

CPC classification number: H05K7/00

Abstract: A semiconductor module, a socket for the same, and a semiconductor module/socket assembly are disclosed. The semiconductor module includes a printed circuit board including a plurality of semiconductor devices, a plurality of insulating layers and a plurality of metal layers, the plurality of insulating layers and the plurality of metal layers are alternately stacked. Exposed portions of the metal layers are exposed to the outside of the semiconductor module at a first and a second ends of the printed circuit board. The first end and the second end are at opposite ends of the printed circuit board.

Abstract translation: 公开了半导体模块，用于其的插座和半导体模块/插座组件。 半导体模块包括具有多个半导体器件，多个绝缘层和多个金属层的印刷电路板，多个绝缘层和多个金属层交替堆叠。 金属层的露出部分在印刷电路板的第一和第二端处暴露于半导体模块的外部。 第一端和第二端位于印刷电路板的相对端。

公开(公告)号：US08148828B2

公开(公告)日：2012-04-03

申请号：US12604680

申请日：2009-10-23

Applicant: Dong-Woo Shin ,  Seong-Chan Han ,  Sun-Kyu Hwang ,  Hyun-Jong Oh ,  Nam-Yong Oh

Inventor： Dong-Woo Shin ,  Seong-Chan Han ,  Sun-Kyu Hwang ,  Hyun-Jong Oh ,  Nam-Yong Oh

IPC: H01L23/48 ,  H01L23/34

CPC classification number: H01L23/24 ,  H01L25/105 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/1005 ,  H01L2225/1058 ,  H01L2924/00014 ,  H05K3/284 ,  H05K2201/10515 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2203/1316 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A semiconductor packaging device is provided. Semiconductor package groups, a side retainer wall, and a filling layer may be located on a base plate. The side retainer wall may be located around the semiconductor package groups. The filling layer may be located between the side retainer wall and the semiconductor package groups.

Abstract translation: 提供半导体封装装置。 半导体封装组，侧保持器壁和填充层可以位于基板上。 侧保持器壁可以位于半导体封装组周围。 填充层可以位于侧保持器壁和半导体封装组之间。

公开(公告)号：US20110281770A1

公开(公告)日：2011-11-17

申请号：US12849264

申请日：2010-08-03

Applicant: Shiu-Ru Lin ,  Hui-Jen Chang ,  Suz-Kai Hsiung ,  Chan-Han Wu

Inventor： Shiu-Ru Lin ,  Hui-Jen Chang ,  Suz-Kai Hsiung ,  Chan-Han Wu

IPC: C40B40/08

CPC classification number: C12Q1/6837 ,  G01N35/0098 ,  G01N35/0099 ,  G01N2035/00158 ,  G01N2035/00326 ,  G01N2035/00356 ,  G01N2035/00524 ,  G01N2035/00564

Abstract: A sample is diagnosed with a genechip array by the present disclosure. The sample is automatically diagnosed by devices revealed in the present disclosure for a fast diagnosis having high accuracy.

Abstract translation: 通过本公开将样品诊断为基因芯片阵列。 通过本公开中揭示的装置自动诊断样品，用于具有高精度的快速诊断。

公开(公告)号：US20110166018A1

公开(公告)日：2011-07-07

申请号：US13059990

申请日：2009-09-18

Applicant: Daniel Grohol ,  Chan Han ,  Aleksander J. Pyzik

Inventor： Daniel Grohol ,  Chan Han ,  Aleksander J. Pyzik

IPC: B01J32/00

CPC classification number: C04B35/195 ,  C04B35/185 ,  C04B41/5025 ,  C04B2235/3463 ,  C04B2235/3481

Abstract: Porous composites of mullite and cordierite are formed by firing an acicular mullite body in the presence of a magnesium source and a silicon source. In some variations of the process, the magnesium and silicon sources are present when the acicular mullite body is formed. In other variations, the magnesium source and the silicon source are applied to a previously-formed acicular mullite body. Surprisingly, the composites have coefficients of linear thermal expansion that are intermediate to those of mullite and cordierite alone, and have higher fracture strengths than cordierite at a similar porosity. Some of the cordierite forms at grain boundaries and/or points of intersection between mullite needles, rather than merely coating the needles. The presence of magnesium and silicon sources during acicular mullite formation does not significantly affect the ability to produce a highly porous network of mullite needles.

Abstract translation: 莫来石和堇青石的多孔复合材料是通过在镁源和硅源的存在下焙烧针状莫来石体形成的。 在该方法的一些变型中，当形成针状莫来石体时，存在镁和硅源。 在其它变型中，将镁源和硅源施加到预先形成的针状莫来石体上。 令人惊奇的是，复合材料的线性热膨胀系数与莫来石和堇青石单体的中间相似，并且具有比类似孔隙率的堇青石更高的断裂强度。 在莫来石针之间的晶界和/或交叉点处的一些堇青石形式，而不仅仅是涂覆针。 在针状莫来石形成过程中镁和硅源的存在并不会显着影响产生莫来石针的高度多孔网络的能力。

公开(公告)号：US07902664B2

公开(公告)日：2011-03-08

申请号：US11878084

申请日：2007-07-20

Applicant: Hyo-jae Bang ,  Dong-chun Lee ,  Seong-chan Han ,  Kyung-du Kim ,  Sun-kyu Hwang

Inventor： Hyo-jae Bang ,  Dong-chun Lee ,  Seong-chan Han ,  Kyung-du Kim ,  Sun-kyu Hwang

IPC: H01L23/34

CPC classification number: H01L23/13 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/45 ,  H01L24/48 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30107 ,  H05K1/0231 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: Example embodiments relate to a semiconductor package. The semiconductor package may include a mounting substrate, a semiconductor chip mounted to the mounting substrate, at least one passive component passing therethrough and mounted to the mounting substrate, and a cover covering the mounting substrate, the semiconductor chip and the at least one passive component.

Abstract translation: 示例实施例涉及半导体封装。 半导体封装可以包括安装基板，安装到安装基板的半导体芯片，穿过其中并安装到安装基板的至少一个无源部件，以及覆盖安装基板，半导体芯片和至少一个无源部件 。

公开(公告)号：US07856128B2

公开(公告)日：2010-12-21

申请号：US11639454

申请日：2006-12-14

Applicant: Hak Il Kim ,  Young Chan Han

Inventor： Hak Il Kim ,  Young Chan Han

IPC: G06K9/00

CPC classification number: G06K9/00067 ,  G06K9/3275

Abstract: A method of correcting distortion caused by fingerprint input sensors of heterogeneous fingerprint recognition systems. The method includes a first step of fabricating a measurement pattern for measuring resolutions of a fingerprint input sensor, a second step of measuring image resolutions of an image, acquired by the fingerprint input sensor, using the fabricated measurement pattern for predetermined locations and directions, a third step of designing control lines for compensating for the distortion caused by the fingerprint input sensor, based on the measured resolutions, a fourth step of obtaining average horizontal and vertical resolutions of the acquired image, a fifth step of modeling the control lines based on a ratio of the average horizontal resolution to the vertical average resolution, and a sixth step of compensating for the distortion of the acquired image based on results of the modeling.

Abstract translation: 一种校正由异质指纹识别系统的指纹输入传感器引起的失真的方法。 该方法包括：制造用于测量指纹输入传感器的分辨率的测量图案的第一步骤，使用所制造的测量图案预定位置和方向来测量由指纹输入传感器获取的图像的图像分辨率的第二步骤， 基于测量分辨率设计用于补偿由指纹输入传感器引起的失真的控制线的第三步骤，获得所获取的图像的平均水平和垂直分辨率的第四步骤，基于 平均水平分辨率与垂直平均分辨率的比率，以及基于建模结果补偿所获取图像的失真的第六步骤。

公开(公告)号：US20100105201A1

公开(公告)日：2010-04-29

申请号：US12650093

申请日：2009-12-30

Applicant: Hyo-Jae Bang ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Seong-Chan Han ,  Jung-Hyeon Kim

Inventor： Hyo-Jae Bang ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Seong-Chan Han ,  Jung-Hyeon Kim

IPC: H01L21/60

CPC classification number: H05K3/303 ,  H05K2201/0305 ,  H05K2201/09781 ,  H05K2201/10689 ,  H05K2201/2036 ,  Y02P70/613

Abstract: A semiconductor device includes a semiconductor package, a circuit board and an interval maintaining member. The semiconductor package has a body and a lead protruded from the body. The circuit board has a first land electrically connected to the lead. The interval maintaining member is interposed between the circuit board and the body. The interval maintaining member maintains an interval between the lead and the first land. Thus, an interval between the lead and the land is uniformly maintained, so that a thermal and/or mechanical reliability of the semiconductor device is improved.

Abstract translation: 半导体器件包括半导体封装，电路板和间隔保持元件。 半导体封装具有从主体突出的主体和引线。 电路板具有与引线电连接的第一焊盘。 间隔保持构件插入在电路板和主体之间。 间隔保持构件保持引线与第一焊盘之间的间隔。 因此，均匀地保持引线和焊盘之间的间隔，从而提高了半导体器件的热和/或机械可靠性。

公开(公告)号：US20100102427A1

公开(公告)日：2010-04-29

申请号：US12604680

申请日：2009-10-23

Applicant: Dong-Woo Shin ,  Seong-Chan Han ,  Sun-Kyu Hwang ,  Hyun-Jong Oh ,  Nam-Yong Ho

Inventor： Dong-Woo Shin ,  Seong-Chan Han ,  Sun-Kyu Hwang ,  Hyun-Jong Oh ,  Nam-Yong Ho

IPC: H01L25/065 ,  H01L23/52

CPC classification number: H01L23/24 ,  H01L25/105 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/1005 ,  H01L2225/1058 ,  H01L2924/00014 ,  H05K3/284 ,  H05K2201/10515 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2203/1316 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A semiconductor packaging device is provided. Semiconductor package groups, a side retainer wall, and a filling layer may be located on a base plate. The side retainer wall may be located around the semiconductor package groups. The filling layer may be located between the side retainer wall and the semiconductor package groups.

Abstract translation: 提供半导体封装装置。 半导体封装组，侧保持器壁和填充层可以位于基板上。 侧保持器壁可以位于半导体封装组周围。 填充层可以位于侧保持器壁和半导体封装组之间。

公开(公告)号：US20090324946A1

公开(公告)日：2009-12-31

申请号：US12492527

申请日：2009-06-26

Applicant: Chan Han ,  Robin Paul Ziebarth ,  Aleksander Jozef Pyzik

Inventor： Chan Han ,  Robin Paul Ziebarth ,  Aleksander Jozef Pyzik

IPC: C04B28/06

CPC classification number: C04B35/185 ,  B01D53/944 ,  B01D53/945 ,  B01D2255/1021 ,  B01D2255/2042 ,  B01D2255/2092 ,  B01D2255/30 ,  B01D2255/40 ,  B01D2255/9202 ,  B01D2255/9205 ,  B01D2258/012 ,  B01J23/58 ,  B01J35/04 ,  B01J37/0018 ,  B01J37/0215 ,  B01J37/0242 ,  C04B35/6365 ,  C04B38/00 ,  C04B2235/322 ,  C04B2235/3272 ,  C04B2235/3445 ,  C04B2235/349 ,  C04B2235/445 ,  C04B2235/6021 ,  C04B2235/658 ,  C04B2235/77 ,  C04B2235/96 ,  F01N2330/06 ,  Y02T10/22 ,  Y10T428/29 ,  C04B38/0054 ,  C04B38/0074 ,  C04B38/068

Abstract: Highly porous acicular mullite bodies are prepared. A green body containing mullite precursors and a porogen is formed using a wet method. The green body is heated to sequentially remove any binder, the porogen and calcine it. The calcined body is mullitized. The process formed a calcined body that has excellent strength and can be handled easily. The mullitized body has very high porosity, small pores and has excellent fracture strength.

Abstract translation: 制备高度多孔的针状莫来石体。 使用湿法形成含有莫来石前体和致孔剂的生坯。 将生坯加热至依次除去任何粘合剂，造孔剂并煅烧。 煅烧体被磨炼。 该方法形成了具有优异强度并且易于处理的煅烧体。 磨砂体具有非常高的孔隙率，小孔隙并且具有优异的断裂强度。

公开(公告)号：US07635446B2

公开(公告)日：2009-12-22

申请号：US11506720

申请日：2006-08-18

Applicant: John Porter Henley ,  Avani Maulik Patel ,  Arthur Richard Prunier, Jr. ,  Chan Han

Inventor： John Porter Henley ,  Avani Maulik Patel ,  Arthur Richard Prunier, Jr. ,  Chan Han

IPC: C04B33/32 ,  F27D5/00

CPC classification number: C04B38/0009 ,  C04B35/10 ,  C04B35/6365 ,  C04B35/638 ,  C04B2111/00129 ,  C04B2111/00793 ,  C04B2111/0081 ,  C04B2235/6583 ,  C04B38/0645

Abstract: An organic additive is removed from a ceramic honeycomb by an improved method by contacting each end of the extruded honeycomb with a member that has a gas permeability no greater than the outer wall, the member essentially covering the ends and heating the honeycomb to a temperature sufficient to remove the organic additive.

Abstract translation: 通过改进的方法将有机添加剂从陶瓷蜂窝体中除去，通过将挤出的蜂窝体的每一端与不超过外壁的气体渗透性的构件接触，该构件基本上覆盖端部并将蜂窝体加热到足够的温度 去除有机添加剂。