公开(公告)号：US08692383B2

公开(公告)日：2014-04-08

申请号：US13231856

申请日：2011-09-13

申请人： Soshi Kuroda ,  Kenya Hironaga ,  Hironori Matsushima ,  Masatoshi Yasunaga ,  Akira Yamazaki

发明人： Soshi Kuroda ,  Kenya Hironaga ,  Hironori Matsushima ,  Masatoshi Yasunaga ,  Akira Yamazaki

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L24/46 ,  H01L21/6836 ,  H01L23/3121 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/743 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/26175 ,  H01L2224/27312 ,  H01L2224/27334 ,  H01L2224/27436 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/83385 ,  H01L2224/838 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512

摘要： To achieve a reduction in cost of a semiconductor device, in a common board (a wiring board), a plurality of bonding leads each extend toward the center of the board, and a solder resist film as a die bonding region supporting a minimum chip is coated with a die bonding material. With this, even when a first semiconductor chip as a large chip is mounted, wire bonding can be performed without causing the die bonding material to cover the bonding leads. Thus, development cost can be reduced to reduce the cost of the semiconductor device (LGA).

摘要翻译： 为了实现半导体器件的成本降低，在公共板（布线板）中，多个接合引线各自朝向基板的中心延伸，并且作为支撑最小芯片的芯片接合区域的阻焊膜为 涂有芯片接合材料。 由此，即使安装作为大芯片的第一半导体芯片，也可以在不使芯片接合材料覆盖接合引线的情况下进行引线接合。 因此，可以降低开发成本以降低半导体器件（LGA）的成本。

公开(公告)号：US20100320623A1

公开(公告)日：2010-12-23

申请号：US12792166

申请日：2010-06-02

申请人： Soshi Kuroda ,  Masatoshi Yasunaga ,  Hironori Matsushima ,  Kenya Hironaga

发明人： Soshi Kuroda ,  Masatoshi Yasunaga ,  Hironori Matsushima ,  Kenya Hironaga

IPC分类号： H01L23/52 ,  H01L21/50

CPC分类号： H01L21/565 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/32013 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49171 ,  H01L2224/49431 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012

摘要： A multi-pin semiconductor device with improved reliability. In a multi-pin BGA, a plurality of wires for electrically coupling a semiconductor chip and a wiring substrate include a plurality of short and thin first wires located in an inner position and a plurality of second wires longer and thicker than the first wires. Since resin flows in from between thin first wires during resin molding, the resin pushes out air, thereby suppressing formation of voids. The reliability of the multi-pin BGA is thus improved.

摘要翻译： 一种具有改进可靠性的多针半导体器件。 在多引脚BGA中，用于电耦合半导体芯片和布线基板的多根导线包括位于内部位置的多个短而细的第一布线和比第一布线更长和更厚的多个第二布线。 由于在树脂成型时树脂从薄的第一布线之间流入，所以树脂推出空气，从而抑制空隙的形成。 因此，提高了多引脚BGA的可靠性。

公开(公告)号：US20110074019A1

公开(公告)日：2011-03-31

申请号：US12889023

申请日：2010-09-23

申请人： Masatoshi YASUNAGA ,  Hironori Matsushima ,  Kenya Hironaga ,  Soshi Kuroda

发明人： Masatoshi YASUNAGA ,  Hironori Matsushima ,  Kenya Hironaga ,  Soshi Kuroda

IPC分类号： H01L23/48

CPC分类号： H01L24/85 ,  H01L21/561 ,  H01L22/32 ,  H01L23/3128 ,  H01L23/49866 ,  H01L24/03 ,  H01L24/04 ,  H01L24/05 ,  H01L24/27 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/02166 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05018 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/32145 ,  H01L2224/43 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48482 ,  H01L2224/48499 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2224/48844 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49431 ,  H01L2224/85051 ,  H01L2224/85205 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/10162 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2924/20752 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/48824 ,  H01L2224/48744 ,  H01L2924/20758 ,  H01L2924/2075 ,  H01L2924/00015

摘要： To improve reliability of a semiconductor device in which wire bonding using a wire made of copper is performed. A semiconductor device is configured so that one of end parts (wide width part) of a copper wire is joined via a bump on a pad (electrode pad) formed over a main surface (first main surface) of a semiconductor chip of the semiconductor device. The bump is made of gold, which is a metal material having a hardness lower than that of copper, and the width of the bump is narrower than the width of the wide width part of the wire.

摘要翻译： 为了提高使用由铜制成的线进行引线接合的半导体器件的可靠性。 半导体器件被配置为使得铜线的端部（宽宽度部分）中的一个通过形成在半导体器件的半导体芯片的主表面（第一主表面）上的焊盘（电极焊盘）上的凸块接合 。 凸起由金制成，其是具有低于铜的硬度的金属材料，并且凸块的宽度比电线的宽幅部分的宽度窄。

公开(公告)号：US08772952B2

公开(公告)日：2014-07-08

申请号：US12889023

申请日：2010-09-23

申请人： Masatoshi Yasunaga ,  Hironori Matsushima ,  Kenya Hironaga ,  Soshi Kuroda

发明人： Masatoshi Yasunaga ,  Hironori Matsushima ,  Kenya Hironaga ,  Soshi Kuroda

IPC分类号： H01L29/40

CPC分类号： H01L24/85 ,  H01L21/561 ,  H01L22/32 ,  H01L23/3128 ,  H01L23/49866 ,  H01L24/03 ,  H01L24/04 ,  H01L24/05 ,  H01L24/27 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/02166 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05018 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/32145 ,  H01L2224/43 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48482 ,  H01L2224/48499 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2224/48844 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49431 ,  H01L2224/85051 ,  H01L2224/85205 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/10162 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2924/20752 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/48824 ,  H01L2224/48744 ,  H01L2924/20758 ,  H01L2924/2075 ,  H01L2924/00015

摘要： To improve reliability of a semiconductor device in which wire bonding using a wire made of copper is performed. A semiconductor device is configured so that one of end parts (wide width part) of a copper wire is joined via a bump on a pad (electrode pad) formed over a main surface (first main surface) of a semiconductor chip of the semiconductor device. The bump is made of gold, which is a metal material having a hardness lower than that of copper, and the width of the bump is narrower than the width of the wide width part of the wire.

摘要翻译： 为了提高使用由铜制成的线进行引线接合的半导体器件的可靠性。 半导体器件被配置为使得铜线的端部（宽宽度部分）中的一个通过形成在半导体器件的半导体芯片的主表面（第一主表面）上的焊盘（电极焊盘）上的凸块接合 。 凸起由金制成，其是具有低于铜的硬度的金属材料，并且凸块的宽度比电线的宽幅部分的宽度窄。

公开(公告)号：US08334172B2

公开(公告)日：2012-12-18

申请号：US13023976

申请日：2011-02-09

申请人： Soshi Kuroda ,  Masatoshi Yasunaga ,  Hironori Matsushima ,  Kenya Hironaga

发明人： Soshi Kuroda ,  Masatoshi Yasunaga ,  Hironori Matsushima ,  Kenya Hironaga

IPC分类号： H01L21/786 ,  H01L21/60 ,  H01L21/56 ,  H01L21/58 ,  H01L21/00

CPC分类号： H01L24/48 ,  H01L21/4853 ,  H01L23/295 ,  H01L23/296 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/544 ,  H01L24/45 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2223/54406 ,  H01L2223/54486 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48644 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85444 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2224/78 ,  H01L2924/00012

摘要： Technology capable of preventing the deterioration of the reliability of semiconductor devices caused by the gasification of a part of the material constituting a wiring substrate is provided. A wiring layer constituting a circuit pattern is formed over each of the front and rear surfaces of a glass epoxy substrate, and after the formation of a solder resist covering the wiring layer while exposing a part of the wiring layer and prior to a heat treatment (first heat treatment) at 100° C. to 150° C. for dehumidification, a heat treatment (second heat treatment) at 160° C. to 230° C. for gasifying and discharging an organic solvent contained in the material constituting a wiring substrate is performed for the wiring substrate.

摘要翻译： 提供了能够防止由构成布线基板的材料的一部分的气化引起的半导体器件的可靠性劣化的技术。 构成电路图案的布线层形成在玻璃环氧树脂基板的前表面和后表面之上，并且在暴露一部分布线层并且在热处理之前形成覆盖布线层的阻焊剂之后 第一热处理）在100℃至150℃下进行除湿，在160℃至230℃下进行热处理（第二热处理），用于气化和排出构成布线基板的材料中所含的有机溶剂 对布线基板进行。

公开(公告)号：US20120061850A1

公开(公告)日：2012-03-15

申请号：US13231856

申请日：2011-09-13

申请人： Soshi KURODA ,  Kenya Hironaga ,  Hironori Matsushima ,  Masatoshi Yasunaga ,  Akira Yamazaki

发明人： Soshi KURODA ,  Kenya Hironaga ,  Hironori Matsushima ,  Masatoshi Yasunaga ,  Akira Yamazaki

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L24/46 ,  H01L21/6836 ,  H01L23/3121 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/743 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/26175 ,  H01L2224/27312 ,  H01L2224/27334 ,  H01L2224/27436 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/83385 ,  H01L2224/838 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512

摘要： To achieve a reduction in cost of a semiconductor device, in a common board (a wiring board), a plurality of bonding leads each extend toward the center of the board, and a solder resist film as a die bonding region supporting a minimum chip is coated with a die bonding material. With this, even when a first semiconductor chip as a large chip is mounted, wire bonding can be performed without causing the die bonding material to cover the bonding leads. Thus, development cost can be reduced to reduce the cost of the semiconductor device (LGA).

摘要翻译： 为了实现半导体器件的成本降低，在公共板（布线板）中，多个接合引线各自朝向基板的中心延伸，并且作为支撑最小芯片的芯片接合区域的阻焊膜为 涂有芯片接合材料。 由此，即使安装作为大芯片的第一半导体芯片，也可以在不使芯片接合材料覆盖接合引线的情况下进行引线接合。 因此，可以降低开发成本以降低半导体器件（LGA）的成本。

公开(公告)号：US08605277B2

公开(公告)日：2013-12-10

申请号：US13244434

申请日：2011-09-24

申请人： Satoshi Yamada ,  Takashi Karashima ,  Kenya Hironaga ,  Masatoshi Yasunaga ,  Yuji Fujimoto

发明人： Satoshi Yamada ,  Takashi Karashima ,  Kenya Hironaga ,  Masatoshi Yasunaga ,  Yuji Fujimoto

IPC分类号： G01N21/00

CPC分类号： G01N21/95684 ,  G01B11/306 ,  G01N21/93 ,  H01L23/3128 ,  H01L2224/48227 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/00

摘要： Reliability of a semiconductor device is improved. In a flatness inspection of BGA (semiconductor device), there is formed a flatness standard where a permissible range in the direction of (+) of flatness at normal temperature is smaller than a permissible range in the direction of (−). With use of the above flatness standard, a flatness inspection of the semiconductor device at normal temperature is performed to determine whether the mounted item is non-defective or defective. With the above process, defective mounting caused by a package warp when heated during reflow soldering etc. is reduced and reliability of BGA is improved. At the same time, flatness management of a substrate-type semiconductor device with better consideration of a mounting state can be performed.

摘要翻译： 提高了半导体器件的可靠性。 在BGA（半导体器件）的平坦度检查中，形成了平坦度标准，其中常温平面度（+）方向上的允许范围小于（ - ）方向的允许范围。 使用上述平面度标准，进行半导体器件在常温下的平坦度检查，以确定安装的物品是否是有缺陷的或有缺陷的。 通过上述处理，在回流焊接等期间加热时由包装翘曲引起的安装不良导致BGA的可靠性提高。 同时，可以进行更好地考虑安装状态的基板型半导体器件的平坦度管理。

公开(公告)号：US20120081702A1

公开(公告)日：2012-04-05

申请号：US13244434

申请日：2011-09-24

申请人： Satoshi YAMADA ,  Takashi KARASHIMA ,  Kenya HIRONAGA ,  Masatoshi YASUNAGA ,  Yuji FUJIMOTO

发明人： Satoshi YAMADA ,  Takashi KARASHIMA ,  Kenya HIRONAGA ,  Masatoshi YASUNAGA ,  Yuji FUJIMOTO

IPC分类号： G01N21/00

CPC分类号： G01N21/95684 ,  G01B11/306 ,  G01N21/93 ,  H01L23/3128 ,  H01L2224/48227 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/00

摘要： Reliability of a semiconductor device is improved. In a flatness inspection of BGA (semiconductor device), there is formed a flatness standard where a permissible range in the direction of (+) of flatness at normal temperature is smaller than a permissible range in the direction of (−). With use of the above flatness standard, a flatness inspection of the semiconductor device at normal temperature is performed to determine whether the mounted item is non-defective or defective. With the above process, defective mounting caused by a package warp when heated during reflow soldering etc. is reduced and reliability of BGA is improved. At the same time, flatness management of a substrate-type semiconductor device with better consideration of a mounting state can be performed.

摘要翻译： 提高了半导体器件的可靠性。 在BGA（半导体器件）的平坦度检查中，形成了平坦度标准，其中常温平面度（+）方向上的允许范围小于（ - ）方向的允许范围。 使用上述平面度标准，进行半导体器件在常温下的平坦度检查，以确定安装的物品是否是有缺陷的或有缺陷的。 通过上述处理，在回流焊接等期间加热时由包装翘曲引起的安装不良导致BGA的可靠性提高。 同时，可以进行更好地考虑安装状态的基板型半导体器件的平坦度管理。

公开(公告)号：US20110201155A1

公开(公告)日：2011-08-18

申请号：US13023976

申请日：2011-02-09

申请人： Soshi Kuroda ,  Masatoshi Yasunaga ,  Hironori Matsushima ,  Kenya Hironaga

发明人： Soshi Kuroda ,  Masatoshi Yasunaga ,  Hironori Matsushima ,  Kenya Hironaga

IPC分类号： H01L21/786 ,  H01L21/60 ,  H01L21/56 ,  H01L21/58 ,  H01L21/00

CPC分类号： H01L24/48 ,  H01L21/4853 ,  H01L23/295 ,  H01L23/296 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/544 ,  H01L24/45 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2223/54406 ,  H01L2223/54486 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48644 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85444 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2224/78 ,  H01L2924/00012

摘要： To provide a technology capable of preventing the deterioration of the reliability of semiconductor devices caused by the gasification of a part of components of the material constituting a wiring substrate.A wiring layer constituting a circuit pattern is formed over each of the front and rear surfaces of a glass epoxy substrate, and after the formation of a solder resist covering the wiring layer while exposing a part of the wiring layer and prior to a heat treatment (first heat treatment) at 100° C. to 150° C. for dehumidification, a heat treatment (second heat treatment) at 160° C. to 230° C. for gasifying and discharging an organic solvent contained in the material constituting a wiring substrate is performed for the wiring substrate.

摘要翻译： 提供能够防止由构成布线基板的材料的一部分的部件的气化引起的半导体器件的可靠性劣化的技术。 构成电路图案的布线层形成在玻璃环氧树脂基板的前表面和后表面之上，并且在暴露一部分布线层并且在热处理之前形成覆盖布线层的阻焊剂之后 第一热处理）在100℃至150℃下进行除湿，在160℃至230℃下进行热处理（第二热处理），用于气化和排出构成布线基板的材料中所含的有机溶剂 对布线基板进行。