利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

17 条记录 (耗时 0.016 秒)

    MEMORY SYSTEMS INCLUDING AN INPUT/OUTPUT BUFFER CIRCUIT
    7.
    发明申请
    MEMORY SYSTEMS INCLUDING AN INPUT/OUTPUT BUFFER CIRCUIT 审中-公开
    包含输入/输出缓冲电路的存储器系统

    公开(公告)号：US20160117110A1

    公开(公告)日：2016-04-28

    申请号：US14986773

    申请日：2016-01-04

    申请人： Youngjin Jeon ,  Jeongdon Ihm ,  Kilsoo Kim ,  Jinman Han

    发明人： Youngjin Jeon ,  Jeongdon Ihm ,  Kilsoo Kim ,  Jinman Han

    IPC分类号： G06F3/06

    CPC分类号： G06F3/0604 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0679 ,  G11C7/04 ,  G11C7/1084 ,  G11C7/1093 ,  G11C7/1096 ,  G11C7/222 ,  H01L2224/48227 ,  H01L2924/181 ,  H01L2924/00012

    摘要： Memory systems are provided. A memory system may include a plurality of nonvolatile memories and a memory controller configured to control the plurality of nonvolatile memories. Moreover, the memory system may include an input/output buffer circuit connected between the memory controller and the plurality of nonvolatile memories. A data channel may be connected between the memory controller and the input/output buffer circuit, and first and second internal data channels may be connected between the input/output buffer circuit and respective first and second groups of the plurality of nonvolatile memories. The input/output buffer circuit may be configured to connect the data channel to one of the first and second internal data channels.

    摘要翻译： 提供内存系统。 存储器系统可以包括多个非易失性存储器和被配置为控制多个非易失性存储器的存储器控​​制器。 此外，存储器系统可以包括连接在存储器控制器和多个非易失性存储器之间的输入/输出缓冲器电路。 数据通道可以连接在存储器控制器和输入/输出缓冲器电路之间，并且第一和第二内部数据通道可以连接在输入/输出缓冲器电路和多个非易失性存储器的相应的第一和第二组之间。 输入/输出缓冲器电路可以被配置为将数据信道连接到第一和第二内部数据信道之一。

    Systems and methods for parameter dependent riccati equation approaches to adaptive control
    8.
    发明授权
    Systems and methods for parameter dependent riccati equation approaches to adaptive control 有权
    用于参数依赖riccati方程的系统和方法适应性控制

    公开(公告)号：US09058028B2

    公开(公告)日：2015-06-16

    申请号：US13460663

    申请日：2012-04-30

    申请人： Kilsoo Kim ,  Tansel Yucelen ,  Anthony J. Calise

    发明人： Kilsoo Kim ,  Tansel Yucelen ,  Anthony J. Calise

    IPC分类号： G05B13/02 ,  G06F17/10 ,  G06G7/48 ,  G06F15/18 ,  G06E3/00 ,  G06N7/00

    CPC分类号： G05B13/0205

    摘要： Systems and methods for adaptive control are disclosed. The systems and methods can control uncertain dynamic systems. The control system can comprise a controller that employs a parameter dependent Riccati equation. The controller can produce a response that causes the state of the system to remain bounded. The control system can control both minimum phase and non-minimum phase systems. The control system can augment an existing, non-adaptive control design without modifying the gains employed in that design. The control system can also avoid the use of high gains in both the observer design and the adaptive control law.

    摘要翻译： 公开了用于自适应控制的系统和方法。 系统和方法可以控制不确定的动态系统。 控制系统可以包括采用参数依赖Riccati方程的控制器。 控制器可以产生使系统状态保持有界的响应。 控制系统可以控制最小相位和非最小相位系统。 控制系统可以增加现有的非自适应控制设计，而无需修改该设计中采用的增益。 控制系统还可以避免在观察者设计和自适应控制规律中使用高增益。

    Systems and methods for derivative-free adaptive control
    9.
    发明授权
    Systems and methods for derivative-free adaptive control 有权
    无衍生自适应控制的系统和方法

    公开(公告)号：US08996195B2

    公开(公告)日：2015-03-31

    申请号：US13445610

    申请日：2012-04-12

    申请人： Tansel Yucelen ,  Kilsoo Kim ,  Anthony J. Calise

    发明人： Tansel Yucelen ,  Kilsoo Kim ,  Anthony J. Calise

    IPC分类号： G05B13/00 ,  G06F7/00 ,  G05B13/02 ,  G05B13/04

    CPC分类号： G05B13/042

    摘要： An adaptive control system is disclosed. The control system can control uncertain dynamic systems. The control system can employ one or more derivative-free adaptive control architectures. The control system can further employ one or more derivative-free weight update laws. The derivative-free weight update laws can comprise a time-varying estimate of an ideal vector of weights. The control system of the present invention can therefore quickly stabilize systems that undergo sudden changes in dynamics, caused by, for example, sudden changes in weight. Embodiments of the present invention can also provide a less complex control system than existing adaptive control systems. The control system can control aircraft and other dynamic systems, such as, for example, those with non-minimum phase dynamics.

    摘要翻译： 公开了一种自适应控制系统。 控制系统可以控制不确定的动态系统。 控制系统可以采用一个或多个无衍生的自适应控制架构。 控制系统可以进一步采用一个或多个无衍生的权重更新定律。 无衍生权重更新定律可以包括理想的权重向量的时变估计。 因此，本发明的控制系统可以快速地稳定由例如突然重量变化引起的动态突然变化的系统。 本发明的实施例还可以提供比现有的自适应控制系统更不复杂的控制系统。 控制系统可以控制飞机和其他动态系统，例如具有非最小相位动力学的系统。

    Stacked package of semiconductor device
    10.
    发明授权
    Stacked package of semiconductor device 有权
    堆叠封装的半导体器件

    公开(公告)号：US08368198B2

    公开(公告)日：2013-02-05

    申请号：US12941640

    申请日：2010-11-08

    申请人： Jun-Young Choi ,  Kilsoo Kim

    发明人： Jun-Young Choi ,  Kilsoo Kim

    IPC分类号： H01L23/22

    CPC分类号： H01L23/3107 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/18 ,  H01L2224/05554 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2224/32245 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： Provided is a stacked package of a semiconductor device and a method of manufacturing the same. The stacked package of a semiconductor device may include at least one first semiconductor chip, at least one second semiconductor chip, at least one interposer between the at least one first semiconductor chip and the at least one second semiconductor chip, and a third semiconductor chip on the at least one first semiconductor chip. The at least one first semiconductor chip and the at least one second semiconductor chip may be configured to perform a first function and a second function and each may include a plurality of bonding pads. The third semiconductor chip may be configured to perform a third function which is different from the first and the second functions. The package may further include external connection leads may be configured to electrically connect the third semiconductor chip to the outside.

    摘要翻译： 提供半导体器件的堆叠封装及其制造方法。 半导体器件的堆叠封装可以包括至少一个第一半导体芯片，至少一个第二半导体芯片，至少一个第一半导体芯片和至少一个第二半导体芯片之间的至少一个插入件，以及第三半导体芯片 所述至少一个第一半导体芯片。 所述至少一个第一半导体芯片和所述至少一个第二半导体芯片可以被配置为执行第一功能和第二功能，并且每个可以包括多个键合焊盘。 第三半导体芯片可以被配置为执行与第一和第二功能不同的第三功能。 封装还可以包括外部连接引线可以被配置为将第三半导体芯片电连接到外部。